blob: 399055b07813da939d3ef1230b38d0fc70ed523a [file] [log] [blame]
Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
Simon Glass3f4e1e82015-11-29 13:17:57 -070028#include <dm.h>
Simon Glass6854f872014-11-14 20:56:33 -070029#include <errno.h>
30#include <malloc.h>
31#include <pci.h>
32#include <pci_rom.h>
33#include <vbe.h>
34#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080035#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070036
Simon Glass3f4e1e82015-11-29 13:17:57 -070037__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070038{
39 return true;
40}
41
Bin Mengf698baa2016-06-14 02:02:40 -070042__weak bool board_should_load_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070043{
Bin Mengc0aea6b2016-06-14 02:02:39 -070044 return true;
Simon Glass6854f872014-11-14 20:56:33 -070045}
46
47__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
48{
49 return vendev;
50}
51
Simon Glass3f4e1e82015-11-29 13:17:57 -070052static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glass6854f872014-11-14 20:56:33 -070053{
Simon Glass3f4e1e82015-11-29 13:17:57 -070054 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Simon Glass6854f872014-11-14 20:56:33 -070055 struct pci_rom_header *rom_header;
56 struct pci_rom_data *rom_data;
Simon Glass40305242014-12-29 19:32:23 -070057 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080058 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070059 u32 vendev;
60 u32 mapped_vendev;
61 u32 rom_address;
62
Simon Glass3f4e1e82015-11-29 13:17:57 -070063 vendev = pplat->vendor << 16 | pplat->device;
Simon Glass6854f872014-11-14 20:56:33 -070064 mapped_vendev = board_map_oprom_vendev(vendev);
65 if (vendev != mapped_vendev)
66 debug("Device ID mapped to %#08x\n", mapped_vendev);
67
Bin Meng786a08e2015-07-06 16:31:33 +080068#ifdef CONFIG_VGA_BIOS_ADDR
69 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070070#else
Simon Glass4a2708a2015-01-14 21:37:04 -070071
Simon Glass3f4e1e82015-11-29 13:17:57 -070072 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glass6854f872014-11-14 20:56:33 -070073 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
74 debug("%s: rom_address=%x\n", __func__, rom_address);
75 return -ENOENT;
76 }
77
78 /* Enable expansion ROM address decoding. */
Simon Glass3f4e1e82015-11-29 13:17:57 -070079 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
80 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glass6854f872014-11-14 20:56:33 -070081#endif
82 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080083 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070084
85 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -070086 le16_to_cpu(rom_header->signature),
87 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -070088
Simon Glass40305242014-12-29 19:32:23 -070089 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -070090 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -070091 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +080092#ifndef CONFIG_VGA_BIOS_ADDR
93 /* Disable expansion ROM address decoding */
Simon Glass3f4e1e82015-11-29 13:17:57 -070094 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Mengf110da92015-07-08 13:06:41 +080095#endif
Simon Glass6854f872014-11-14 20:56:33 -070096 return -EINVAL;
97 }
98
Simon Glass40305242014-12-29 19:32:23 -070099 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
100 rom_vendor = le16_to_cpu(rom_data->vendor);
101 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700102
103 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700104 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700105
106 /* If the device id is mapped, a mismatch is expected */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700107 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700108 (vendev == mapped_vendev)) {
109 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700110 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700111 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700112 }
113
Bin Mengd57c2f22015-04-24 15:48:03 +0800114 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
115 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
116 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700117
Simon Glass3f4e1e82015-11-29 13:17:57 -0700118 if (pplat->class != rom_class) {
Bin Mengd57c2f22015-04-24 15:48:03 +0800119 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glass3f4e1e82015-11-29 13:17:57 -0700120 rom_class, pplat->class);
Simon Glass6854f872014-11-14 20:56:33 -0700121 }
122 *hdrp = rom_header;
123
124 return 0;
125}
126
Simon Glassd830b152016-01-15 05:23:22 -0700127/**
128 * pci_rom_load() - Load a ROM image and return a pointer to it
129 *
130 * @rom_header: Pointer to ROM image
131 * @ram_headerp: Returns a pointer to the image in RAM
132 * @allocedp: Returns true if @ram_headerp was allocated and needs
133 * to be freed
134 * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
135 * the error state. Even if this function returns an error, it may have
136 * allocated memory.
137 */
138static int pci_rom_load(struct pci_rom_header *rom_header,
139 struct pci_rom_header **ram_headerp, bool *allocedp)
Simon Glass6854f872014-11-14 20:56:33 -0700140{
141 struct pci_rom_data *rom_data;
142 unsigned int rom_size;
143 unsigned int image_size = 0;
144 void *target;
145
Simon Glassd830b152016-01-15 05:23:22 -0700146 *allocedp = false;
Simon Glass6854f872014-11-14 20:56:33 -0700147 do {
148 /* Get next image, until we see an x86 version */
149 rom_header = (struct pci_rom_header *)((void *)rom_header +
150 image_size);
151
152 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700153 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700154
Simon Glass40305242014-12-29 19:32:23 -0700155 image_size = le16_to_cpu(rom_data->ilen) * 512;
156 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700157
158 if (rom_data->type != 0)
159 return -EACCES;
160
161 rom_size = rom_header->size * 512;
162
Simon Glassbdc88d42014-12-29 19:32:24 -0700163#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700164 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700165#else
166 target = (void *)malloc(rom_size);
167 if (!target)
168 return -ENOMEM;
Simon Glassd830b152016-01-15 05:23:22 -0700169 *allocedp = true;
Simon Glassbdc88d42014-12-29 19:32:24 -0700170#endif
Simon Glass6854f872014-11-14 20:56:33 -0700171 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700172 ulong start = get_timer(0);
173
Simon Glass6854f872014-11-14 20:56:33 -0700174 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
175 rom_header, target, rom_size);
176 memcpy(target, rom_header, rom_size);
177 if (memcmp(target, rom_header, rom_size)) {
178 printf("VGA ROM copy failed\n");
179 return -EFAULT;
180 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700181 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700182 }
183 *ram_headerp = target;
184
185 return 0;
186}
187
Bin Meng153e1dd2015-08-13 00:29:16 -0700188struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700189
190int vbe_get_video_info(struct graphic_device *gdev)
191{
192#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
193 struct vesa_mode_info *vesa = &mode_info.vesa;
194
195 gdev->winSizeX = vesa->x_resolution;
196 gdev->winSizeY = vesa->y_resolution;
197
198 gdev->plnSizeX = vesa->x_resolution;
199 gdev->plnSizeY = vesa->y_resolution;
200
201 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
202
203 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800204 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700205 case 24:
206 gdev->gdfIndex = GDF_32BIT_X888RGB;
207 break;
208 case 16:
209 gdev->gdfIndex = GDF_16BIT_565RGB;
210 break;
211 default:
212 gdev->gdfIndex = GDF__8BIT_INDEX;
213 break;
214 }
215
216 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
217 gdev->pciBase = vesa->phys_base_ptr;
218
219 gdev->frameAdrs = vesa->phys_base_ptr;
220 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
221
222 gdev->vprBase = vesa->phys_base_ptr;
223 gdev->cprBase = vesa->phys_base_ptr;
224
Simon Glass23609c72015-01-01 16:18:00 -0700225 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700226#else
227 return -ENOSYS;
228#endif
229}
230
Bin Menga4520022015-07-06 16:31:36 +0800231void setup_video(struct screen_info *screen_info)
232{
Bin Menga4520022015-07-06 16:31:36 +0800233 struct vesa_mode_info *vesa = &mode_info.vesa;
234
Bin Meng1e7a0472015-07-30 03:49:13 -0700235 /* Sanity test on VESA parameters */
236 if (!vesa->x_resolution || !vesa->y_resolution)
237 return;
238
Bin Menga4520022015-07-06 16:31:36 +0800239 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
240
241 screen_info->lfb_width = vesa->x_resolution;
242 screen_info->lfb_height = vesa->y_resolution;
243 screen_info->lfb_depth = vesa->bits_per_pixel;
244 screen_info->lfb_linelength = vesa->bytes_per_scanline;
245 screen_info->lfb_base = vesa->phys_base_ptr;
246 screen_info->lfb_size =
247 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
248 65536);
249 screen_info->lfb_size >>= 16;
250 screen_info->red_size = vesa->red_mask_size;
251 screen_info->red_pos = vesa->red_mask_pos;
252 screen_info->green_size = vesa->green_mask_size;
253 screen_info->green_pos = vesa->green_mask_pos;
254 screen_info->blue_size = vesa->blue_mask_size;
255 screen_info->blue_pos = vesa->blue_mask_pos;
256 screen_info->rsvd_size = vesa->reserved_mask_size;
257 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800258}
259
Simon Glass3f4e1e82015-11-29 13:17:57 -0700260int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
261 int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700262{
Simon Glass3f4e1e82015-11-29 13:17:57 -0700263 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Andreas Bießmanned488992016-02-16 23:29:31 +0100264 struct pci_rom_header *rom = NULL, *ram = NULL;
Simon Glass6854f872014-11-14 20:56:33 -0700265 int vesa_mode = -1;
Simon Glassd830b152016-01-15 05:23:22 -0700266 bool emulate, alloced;
Simon Glass6854f872014-11-14 20:56:33 -0700267 int ret;
268
269 /* Only execute VGA ROMs */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700270 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
271 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glass6854f872014-11-14 20:56:33 -0700272 PCI_CLASS_DISPLAY_VGA);
273 return -ENODEV;
274 }
275
Bin Mengf698baa2016-06-14 02:02:40 -0700276 if (!board_should_load_oprom(dev))
Simon Glass6854f872014-11-14 20:56:33 -0700277 return -ENXIO;
278
Simon Glass3f4e1e82015-11-29 13:17:57 -0700279 ret = pci_rom_probe(dev, &rom);
Simon Glass6854f872014-11-14 20:56:33 -0700280 if (ret)
281 return ret;
282
Simon Glassd830b152016-01-15 05:23:22 -0700283 ret = pci_rom_load(rom, &ram, &alloced);
Simon Glass6854f872014-11-14 20:56:33 -0700284 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700285 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700286
Simon Glassd830b152016-01-15 05:23:22 -0700287 if (!board_should_run_oprom(dev)) {
288 ret = -ENXIO;
289 goto err;
290 }
Simon Glass6854f872014-11-14 20:56:33 -0700291
292#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
293 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
294 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
295#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700296 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700297
298 if (exec_method & PCI_ROM_USE_NATIVE) {
299#ifdef CONFIG_X86
300 emulate = false;
301#else
302 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
303 printf("BIOS native execution is only available on x86\n");
Simon Glassd830b152016-01-15 05:23:22 -0700304 ret = -ENOSYS;
305 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700306 }
307 emulate = true;
308#endif
309 } else {
310#ifdef CONFIG_BIOSEMU
311 emulate = true;
312#else
313 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
314 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
Simon Glassd830b152016-01-15 05:23:22 -0700315 ret = -ENOSYS;
316 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700317 }
318 emulate = false;
319#endif
320 }
321
Simon Glass6854f872014-11-14 20:56:33 -0700322 if (emulate) {
323#ifdef CONFIG_BIOSEMU
324 BE_VGAInfo *info;
325
Simon Glass72826722016-01-17 16:11:09 -0700326 ret = biosemu_setup(dev, &info);
Simon Glass6854f872014-11-14 20:56:33 -0700327 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700328 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700329 biosemu_set_interrupt_handler(0x15, int15_handler);
Simon Glass72826722016-01-17 16:11:09 -0700330 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
331 true, vesa_mode, &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700332 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700333 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700334#endif
335 } else {
336#ifdef CONFIG_X86
337 bios_set_interrupt_handler(0x15, int15_handler);
338
Simon Glass8beb0bd2015-11-29 13:17:58 -0700339 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
340 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700341#endif
342 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700343 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glassd830b152016-01-15 05:23:22 -0700344 ret = 0;
Simon Glass6854f872014-11-14 20:56:33 -0700345
Simon Glassd830b152016-01-15 05:23:22 -0700346err:
347 if (alloced)
348 free(ram);
349 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700350}