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Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
Simon Glass3f4e1e82015-11-29 13:17:57 -070028#include <dm.h>
Simon Glass6854f872014-11-14 20:56:33 -070029#include <errno.h>
30#include <malloc.h>
31#include <pci.h>
32#include <pci_rom.h>
33#include <vbe.h>
34#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080035#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070036
Simon Glass3f4e1e82015-11-29 13:17:57 -070037__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070038{
39 return true;
40}
41
Simon Glass3f4e1e82015-11-29 13:17:57 -070042static bool should_load_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070043{
Simon Glass6854f872014-11-14 20:56:33 -070044 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
45 return 1;
46 if (board_should_run_oprom(dev))
47 return 1;
48
49 return 0;
50}
51
52__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
53{
54 return vendev;
55}
56
Simon Glass3f4e1e82015-11-29 13:17:57 -070057static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glass6854f872014-11-14 20:56:33 -070058{
Simon Glass3f4e1e82015-11-29 13:17:57 -070059 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Simon Glass6854f872014-11-14 20:56:33 -070060 struct pci_rom_header *rom_header;
61 struct pci_rom_data *rom_data;
Simon Glass40305242014-12-29 19:32:23 -070062 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080063 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070064 u32 vendev;
65 u32 mapped_vendev;
66 u32 rom_address;
67
Simon Glass3f4e1e82015-11-29 13:17:57 -070068 vendev = pplat->vendor << 16 | pplat->device;
Simon Glass6854f872014-11-14 20:56:33 -070069 mapped_vendev = board_map_oprom_vendev(vendev);
70 if (vendev != mapped_vendev)
71 debug("Device ID mapped to %#08x\n", mapped_vendev);
72
Bin Meng786a08e2015-07-06 16:31:33 +080073#ifdef CONFIG_VGA_BIOS_ADDR
74 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070075#else
Simon Glass4a2708a2015-01-14 21:37:04 -070076
Simon Glass3f4e1e82015-11-29 13:17:57 -070077 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glass6854f872014-11-14 20:56:33 -070078 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
79 debug("%s: rom_address=%x\n", __func__, rom_address);
80 return -ENOENT;
81 }
82
83 /* Enable expansion ROM address decoding. */
Simon Glass3f4e1e82015-11-29 13:17:57 -070084 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
85 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glass6854f872014-11-14 20:56:33 -070086#endif
87 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080088 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070089
90 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -070091 le16_to_cpu(rom_header->signature),
92 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -070093
Simon Glass40305242014-12-29 19:32:23 -070094 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -070095 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -070096 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +080097#ifndef CONFIG_VGA_BIOS_ADDR
98 /* Disable expansion ROM address decoding */
Simon Glass3f4e1e82015-11-29 13:17:57 -070099 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Mengf110da92015-07-08 13:06:41 +0800100#endif
Simon Glass6854f872014-11-14 20:56:33 -0700101 return -EINVAL;
102 }
103
Simon Glass40305242014-12-29 19:32:23 -0700104 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
105 rom_vendor = le16_to_cpu(rom_data->vendor);
106 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700107
108 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700109 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700110
111 /* If the device id is mapped, a mismatch is expected */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700112 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700113 (vendev == mapped_vendev)) {
114 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700115 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700116 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700117 }
118
Bin Mengd57c2f22015-04-24 15:48:03 +0800119 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
120 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
121 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700122
Simon Glass3f4e1e82015-11-29 13:17:57 -0700123 if (pplat->class != rom_class) {
Bin Mengd57c2f22015-04-24 15:48:03 +0800124 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glass3f4e1e82015-11-29 13:17:57 -0700125 rom_class, pplat->class);
Simon Glass6854f872014-11-14 20:56:33 -0700126 }
127 *hdrp = rom_header;
128
129 return 0;
130}
131
Bin Meng81d0b352015-04-24 15:48:04 +0800132int pci_rom_load(struct pci_rom_header *rom_header,
Simon Glass6854f872014-11-14 20:56:33 -0700133 struct pci_rom_header **ram_headerp)
134{
135 struct pci_rom_data *rom_data;
136 unsigned int rom_size;
137 unsigned int image_size = 0;
138 void *target;
139
140 do {
141 /* Get next image, until we see an x86 version */
142 rom_header = (struct pci_rom_header *)((void *)rom_header +
143 image_size);
144
145 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700146 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700147
Simon Glass40305242014-12-29 19:32:23 -0700148 image_size = le16_to_cpu(rom_data->ilen) * 512;
149 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700150
151 if (rom_data->type != 0)
152 return -EACCES;
153
154 rom_size = rom_header->size * 512;
155
Simon Glassbdc88d42014-12-29 19:32:24 -0700156#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700157 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700158#else
159 target = (void *)malloc(rom_size);
160 if (!target)
161 return -ENOMEM;
162#endif
Simon Glass6854f872014-11-14 20:56:33 -0700163 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700164 ulong start = get_timer(0);
165
Simon Glass6854f872014-11-14 20:56:33 -0700166 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
167 rom_header, target, rom_size);
168 memcpy(target, rom_header, rom_size);
169 if (memcmp(target, rom_header, rom_size)) {
170 printf("VGA ROM copy failed\n");
171 return -EFAULT;
172 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700173 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700174 }
175 *ram_headerp = target;
176
177 return 0;
178}
179
Bin Meng153e1dd2015-08-13 00:29:16 -0700180struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700181
182int vbe_get_video_info(struct graphic_device *gdev)
183{
184#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
185 struct vesa_mode_info *vesa = &mode_info.vesa;
186
187 gdev->winSizeX = vesa->x_resolution;
188 gdev->winSizeY = vesa->y_resolution;
189
190 gdev->plnSizeX = vesa->x_resolution;
191 gdev->plnSizeY = vesa->y_resolution;
192
193 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
194
195 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800196 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700197 case 24:
198 gdev->gdfIndex = GDF_32BIT_X888RGB;
199 break;
200 case 16:
201 gdev->gdfIndex = GDF_16BIT_565RGB;
202 break;
203 default:
204 gdev->gdfIndex = GDF__8BIT_INDEX;
205 break;
206 }
207
208 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
209 gdev->pciBase = vesa->phys_base_ptr;
210
211 gdev->frameAdrs = vesa->phys_base_ptr;
212 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
213
214 gdev->vprBase = vesa->phys_base_ptr;
215 gdev->cprBase = vesa->phys_base_ptr;
216
Simon Glass23609c72015-01-01 16:18:00 -0700217 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700218#else
219 return -ENOSYS;
220#endif
221}
222
Bin Menga4520022015-07-06 16:31:36 +0800223void setup_video(struct screen_info *screen_info)
224{
Bin Menga4520022015-07-06 16:31:36 +0800225 struct vesa_mode_info *vesa = &mode_info.vesa;
226
Bin Meng1e7a0472015-07-30 03:49:13 -0700227 /* Sanity test on VESA parameters */
228 if (!vesa->x_resolution || !vesa->y_resolution)
229 return;
230
Bin Menga4520022015-07-06 16:31:36 +0800231 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
232
233 screen_info->lfb_width = vesa->x_resolution;
234 screen_info->lfb_height = vesa->y_resolution;
235 screen_info->lfb_depth = vesa->bits_per_pixel;
236 screen_info->lfb_linelength = vesa->bytes_per_scanline;
237 screen_info->lfb_base = vesa->phys_base_ptr;
238 screen_info->lfb_size =
239 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
240 65536);
241 screen_info->lfb_size >>= 16;
242 screen_info->red_size = vesa->red_mask_size;
243 screen_info->red_pos = vesa->red_mask_pos;
244 screen_info->green_size = vesa->green_mask_size;
245 screen_info->green_pos = vesa->green_mask_pos;
246 screen_info->blue_size = vesa->blue_mask_size;
247 screen_info->blue_pos = vesa->blue_mask_pos;
248 screen_info->rsvd_size = vesa->reserved_mask_size;
249 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800250}
251
Simon Glass3f4e1e82015-11-29 13:17:57 -0700252int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
253 int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700254{
Simon Glass3f4e1e82015-11-29 13:17:57 -0700255 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Simon Glass6854f872014-11-14 20:56:33 -0700256 struct pci_rom_header *rom, *ram;
257 int vesa_mode = -1;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700258 bool emulate;
Simon Glass6854f872014-11-14 20:56:33 -0700259 int ret;
260
261 /* Only execute VGA ROMs */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700262 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
263 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glass6854f872014-11-14 20:56:33 -0700264 PCI_CLASS_DISPLAY_VGA);
265 return -ENODEV;
266 }
267
268 if (!should_load_oprom(dev))
269 return -ENXIO;
270
Simon Glass3f4e1e82015-11-29 13:17:57 -0700271 ret = pci_rom_probe(dev, &rom);
Simon Glass6854f872014-11-14 20:56:33 -0700272 if (ret)
273 return ret;
274
Bin Meng81d0b352015-04-24 15:48:04 +0800275 ret = pci_rom_load(rom, &ram);
Simon Glass6854f872014-11-14 20:56:33 -0700276 if (ret)
277 return ret;
278
279 if (!board_should_run_oprom(dev))
280 return -ENXIO;
281
282#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
283 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
284 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
285#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700286 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700287
288 if (exec_method & PCI_ROM_USE_NATIVE) {
289#ifdef CONFIG_X86
290 emulate = false;
291#else
292 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
293 printf("BIOS native execution is only available on x86\n");
294 return -ENOSYS;
295 }
296 emulate = true;
297#endif
298 } else {
299#ifdef CONFIG_BIOSEMU
300 emulate = true;
301#else
302 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
303 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
304 return -ENOSYS;
305 }
306 emulate = false;
307#endif
308 }
309
Simon Glass6854f872014-11-14 20:56:33 -0700310 if (emulate) {
311#ifdef CONFIG_BIOSEMU
312 BE_VGAInfo *info;
313
Simon Glass3f4e1e82015-11-29 13:17:57 -0700314 ret = biosemu_setup(dm_pci_get_bdf(dev), &info);
Simon Glass6854f872014-11-14 20:56:33 -0700315 if (ret)
316 return ret;
317 biosemu_set_interrupt_handler(0x15, int15_handler);
Simon Glass3f4e1e82015-11-29 13:17:57 -0700318 ret = biosemu_run(dm_pci_get_bdf(dev), (uchar *)ram, 1 << 16,
319 info, true, vesa_mode, &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700320 if (ret)
321 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700322#endif
323 } else {
324#ifdef CONFIG_X86
325 bios_set_interrupt_handler(0x15, int15_handler);
326
Simon Glass8beb0bd2015-11-29 13:17:58 -0700327 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
328 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700329#endif
330 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700331 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glass6854f872014-11-14 20:56:33 -0700332
333 return 0;
334}