blob: 08d18b6da8829e4aa37bd917a1ec5f4833670bd8 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020010#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060011#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010019#include <led.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060020#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070021#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010022#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020023#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060024#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020025#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020026#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020027#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020028#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010029#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010030#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020031#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020032#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010033#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010034#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020035#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020036#include <jffs2/load_kernel.h>
Simon Glasscd93d622020-05-10 11:40:13 -060037#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060038#include <linux/delay.h>
Simon Glass61b29b82020-02-03 07:36:15 -070039#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020040#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020041#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010042#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010043
Patrick Delaunay03fb0382020-06-29 10:34:06 +020044#include "../../st/common/stusb160x.h"
45
Patrick Delaunay45459742019-02-27 17:01:24 +010046/* SYSCFG registers */
47#define SYSCFG_BOOTR 0x00
48#define SYSCFG_PMCSETR 0x04
49#define SYSCFG_IOCTRLSETR 0x18
50#define SYSCFG_ICNR 0x1C
51#define SYSCFG_CMPCR 0x20
52#define SYSCFG_CMPENSETR 0x24
53#define SYSCFG_PMCCLRR 0x44
54
55#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
56#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
57
58#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
59#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
60#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
61#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
62#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
63
64#define SYSCFG_CMPCR_SW_CTRL BIT(1)
65#define SYSCFG_CMPCR_READY BIT(8)
66
67#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
68
69#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
70#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
71
72#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
73
74#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020075#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
76#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
77#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010078
Patrick Delaunayf8598d92018-03-12 10:46:18 +010079/*
80 * Get a global data pointer
81 */
82DECLARE_GLOBAL_DATA_PTR;
83
Patrice Chotard28c064e2019-04-30 18:09:38 +020084#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010085#define USB_WARNING_LOW_THRESHOLD_UV 660000
86#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020087#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010088
Patrick Delaunayd1a4b092020-05-25 12:19:46 +020089int board_early_init_f(void)
90{
91 /* nothing to do, only used in SPL */
92 return 0;
93}
94
Patrick Delaunayd461f102019-02-12 11:44:41 +010095int checkboard(void)
96{
97 int ret;
98 char *mode;
99 u32 otp;
100 struct udevice *dev;
101 const char *fdt_compat;
102 int fdt_compat_len;
103
Patrick Delaunay43df0a12020-03-18 09:22:49 +0100104 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +0100105 mode = "trusted";
106 else
107 mode = "basic";
108
109 printf("Board: stm32mp1 in %s mode", mode);
110 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
111 &fdt_compat_len);
112 if (fdt_compat && fdt_compat_len)
113 printf(" (%s)", fdt_compat);
114 puts("\n");
115
Patrick Delaunay888dc682020-03-24 09:05:00 +0100116 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100117 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
118 ret = uclass_get_device_by_driver(UCLASS_MISC,
119 DM_GET_DRIVER(stm32mp_bsec),
120 &dev);
121 if (!ret)
122 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
123 &otp, sizeof(otp));
124 if (ret > 0 && otp)
125 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
126 otp >> 16,
127 (otp >> 12) & 0xF,
128 (otp >> 4) & 0xF,
129 ((otp >> 8) & 0xF) - 1 + 'A',
130 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100131 }
132
133 return 0;
134}
135
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100136static void board_key_check(void)
137{
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100138 ofnode node;
139 struct gpio_desc gpio;
140 enum forced_boot_mode boot_mode = BOOT_NORMAL;
141
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200142 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
143 return;
144
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100145 node = ofnode_path("/config");
146 if (!ofnode_valid(node)) {
147 debug("%s: no /config node?\n", __func__);
148 return;
149 }
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200150 if (IS_ENABLED(CONFIG_FASTBOOT)) {
151 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
152 &gpio, GPIOD_IS_IN)) {
153 debug("%s: could not find a /config/st,fastboot-gpios\n",
154 __func__);
155 } else {
156 if (dm_gpio_get_value(&gpio)) {
157 puts("Fastboot key pressed, ");
158 boot_mode = BOOT_FASTBOOT;
159 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100160
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200161 dm_gpio_free(NULL, &gpio);
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100162 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100163 }
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200164 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
165 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
166 &gpio, GPIOD_IS_IN)) {
167 debug("%s: could not find a /config/st,stm32prog-gpios\n",
168 __func__);
169 } else {
170 if (dm_gpio_get_value(&gpio)) {
171 puts("STM32Programmer key pressed, ");
172 boot_mode = BOOT_STM32PROG;
173 }
174 dm_gpio_free(NULL, &gpio);
175 }
176 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100177 if (boot_mode != BOOT_NORMAL) {
178 puts("entering download mode...\n");
179 clrsetbits_le32(TAMP_BOOT_CONTEXT,
180 TAMP_BOOT_FORCED_MASK,
181 boot_mode);
182 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100183}
184
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100185int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200186{
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100187 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200188 int ret;
189
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200190 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
191 return -ENODEV;
192
Patrick Delaunay03fb0382020-06-29 10:34:06 +0200193 /* if typec stusb160x is present, means DK1 or DK2 board */
194 ret = stusb160x_cable_connected();
195 if (ret >= 0)
196 return ret;
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100197
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100198 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
199 DM_GET_DRIVER(dwc2_udc_otg),
200 &dwc2_udc_otg);
201 if (!ret)
202 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200203
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100204 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200205}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200206
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200207#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200208#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
209#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
210
211int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
212{
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200213 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
214 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200215 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200216 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
217 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200218 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
219 &dev->idProduct);
220 else
221 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
222
223 return 0;
224}
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200225#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200226
Patrice Chotard395f1292019-02-12 16:50:40 +0100227static int get_led(struct udevice **dev, char *led_string)
228{
229 char *led_name;
230 int ret;
231
232 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
233 if (!led_name) {
234 pr_debug("%s: could not find %s config string\n",
235 __func__, led_string);
236 return -ENOENT;
237 }
238 ret = led_get_by_label(led_name, dev);
239 if (ret) {
240 debug("%s: get=%d\n", __func__, ret);
241 return ret;
242 }
243
244 return 0;
245}
246
247static int setup_led(enum led_state_t cmd)
248{
249 struct udevice *dev;
250 int ret;
251
Patrick Delaunay0c952952020-04-22 14:29:12 +0200252 if (!CONFIG_IS_ENABLED(LED))
253 return 0;
254
Patrice Chotard395f1292019-02-12 16:50:40 +0100255 ret = get_led(&dev, "u-boot,boot-led");
256 if (ret)
257 return ret;
258
259 ret = led_set_state(dev, cmd);
260 return ret;
261}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200262
263static void __maybe_unused led_error_blink(u32 nb_blink)
264{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200265 int ret;
266 struct udevice *led;
267 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200268
269 if (!nb_blink)
270 return;
271
Patrick Delaunay0c952952020-04-22 14:29:12 +0200272 if (CONFIG_IS_ENABLED(LED)) {
273 ret = get_led(&led, "u-boot,error-led");
274 if (!ret) {
275 /* make u-boot,error-led blinking */
276 /* if U32_MAX and 125ms interval, for 17.02 years */
277 for (i = 0; i < 2 * nb_blink; i++) {
278 led_set_state(led, LEDST_TOGGLE);
279 mdelay(125);
280 WATCHDOG_RESET();
281 }
282 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200283 }
284 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200285
286 /* infinite: the boot process must be stopped */
287 if (nb_blink == U32_MAX)
288 hang();
289}
Patrice Chotard395f1292019-02-12 16:50:40 +0100290
291static int board_check_usb_power(void)
292{
293 struct ofnode_phandle_args adc_args;
294 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100295 ofnode node;
296 unsigned int raw;
297 int max_uV = 0;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200298 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100299 int ret, uV, adc_count;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200300 u32 nb_blink;
301 u8 i;
Patrick Delaunayfeb61792020-07-31 16:31:44 +0200302
303 if (!IS_ENABLED(CONFIG_ADC))
304 return -ENODEV;
305
Patrice Chotard395f1292019-02-12 16:50:40 +0100306 node = ofnode_path("/config");
307 if (!ofnode_valid(node)) {
308 debug("%s: no /config node?\n", __func__);
309 return -ENOENT;
310 }
311
312 /*
313 * Retrieve the ADC channels devices and get measurement
314 * for each of them
315 */
316 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
317 "#io-channel-cells");
318 if (adc_count < 0) {
319 if (adc_count == -ENOENT)
320 return 0;
321
322 pr_err("%s: can't find adc channel (%d)\n", __func__,
323 adc_count);
324
325 return adc_count;
326 }
327
328 for (i = 0; i < adc_count; i++) {
329 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
330 "#io-channel-cells", 0, i,
331 &adc_args)) {
332 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
333 __func__);
334 return 0;
335 }
336
337 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
338 &adc);
339
340 if (ret) {
341 pr_err("%s: Can't get adc device(%d)\n", __func__,
342 ret);
343 return ret;
344 }
345
346 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
347 &raw);
348 if (ret) {
349 pr_err("%s: single shot failed for %s[%d]!\n",
350 __func__, adc->name, adc_args.args[0]);
351 return ret;
352 }
353 /* Convert to uV */
354 if (!adc_raw_to_uV(adc, raw, &uV)) {
355 if (uV > max_uV)
356 max_uV = uV;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200357 if (uV < min_uV)
358 min_uV = uV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100359 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
360 adc->name, adc_args.args[0], raw, uV);
361 } else {
362 pr_err("%s: Can't get uV value for %s[%d]\n",
363 __func__, adc->name, adc_args.args[0]);
364 }
365 }
366
367 /*
368 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
369 * board is plugged on an USB-C 3A power supply and boot process can
370 * continue.
371 */
372 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotard28c064e2019-04-30 18:09:38 +0200373 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
374 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100375 return 0;
376
Patrice Chotard28c064e2019-04-30 18:09:38 +0200377 pr_err("****************************************************\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100378
Patrice Chotard28c064e2019-04-30 18:09:38 +0200379 /*
380 * If highest and lowest value are either both below
381 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
382 * means USB TYPE-C is in unattached mode, this is an issue, make
383 * u-boot,error-led blinking and stop boot process.
384 */
385 if ((max_uV > USB_LOW_THRESHOLD_UV &&
386 min_uV > USB_LOW_THRESHOLD_UV) ||
387 (max_uV <= USB_LOW_THRESHOLD_UV &&
388 min_uV <= USB_LOW_THRESHOLD_UV)) {
389 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
390 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
391 /* with 125ms interval, led will blink for 17.02 years ....*/
392 nb_blink = U32_MAX;
393 }
394
395 if (max_uV > USB_LOW_THRESHOLD_UV &&
396 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
397 min_uV <= USB_LOW_THRESHOLD_UV) {
398 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100399 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200400 }
401
402 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
403 max_uV <= USB_START_LOW_THRESHOLD_UV &&
404 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard5eff1682020-04-30 18:41:05 +0200405 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100406 nb_blink = 3;
407 }
408
Patrice Chotard28c064e2019-04-30 18:09:38 +0200409 /*
410 * If highest value is above 2.15 Volts that means that the USB TypeC
411 * supplies more than 3 Amp, this is not compliant with TypeC specification
412 */
413 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
414 pr_err("* USB TYPE-C charger not compliant with *\n");
415 pr_err("* specification *\n");
416 pr_err("****************************************************\n\n");
417 /* with 125ms interval, led will blink for 17.02 years ....*/
418 nb_blink = U32_MAX;
419 } else {
420 pr_err("* Current too low, use a 3A power supply! *\n");
421 pr_err("****************************************************\n\n");
422 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100423
Patrick Delaunaydd281082019-07-30 19:16:39 +0200424 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100425
426 return 0;
427}
428
Patrick Delaunay45459742019-02-27 17:01:24 +0100429static void sysconf_init(void)
430{
Patrick Delaunay45459742019-02-27 17:01:24 +0100431 u8 *syscfg;
Patrick Delaunay45459742019-02-27 17:01:24 +0100432 struct udevice *pwr_dev;
433 struct udevice *pwr_reg;
434 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100435 u32 otp = 0;
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200436 int ret;
437 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100438
439 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
440
441 /* interconnect update : select master using the port 1 */
442 /* LTDC = AXI_M9 */
443 /* GPU = AXI_M8 */
444 /* today information is hardcoded in U-Boot */
445 writel(BIT(9), syscfg + SYSCFG_ICNR);
446
447 /* disable Pull-Down for boot pin connected to VDD */
448 bootr = readl(syscfg + SYSCFG_BOOTR);
449 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
450 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
451 writel(bootr, syscfg + SYSCFG_BOOTR);
452
Patrick Delaunay45459742019-02-27 17:01:24 +0100453 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
454 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
455 * The customer will have to disable this for low frequencies
456 * or if AFMUX is selected but the function not used, typically for
457 * TRACE. Otherwise, impact on power consumption.
458 *
459 * WARNING:
460 * enabling High Speed mode while VDD>2.7V
461 * with the OTP product_below_2v5 (OTP 18, BIT 13)
462 * erroneously set to 1 can damage the IC!
463 * => U-Boot set the register only if VDD < 2.7V (in DT)
464 * but this value need to be consistent with board design
465 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200466 ret = uclass_get_device_by_driver(UCLASS_PMIC,
467 DM_GET_DRIVER(stm32mp_pwr_pmic),
468 &pwr_dev);
Patrick Delaunay3434bbe2020-07-31 16:31:45 +0200469 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay45459742019-02-27 17:01:24 +0100470 ret = uclass_get_device_by_driver(UCLASS_MISC,
471 DM_GET_DRIVER(stm32mp_bsec),
472 &dev);
473 if (ret) {
474 pr_err("Can't find stm32mp_bsec driver\n");
475 return;
476 }
477
478 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200479 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100480 otp = otp & BIT(13);
481
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200482 /* get VDD = vdd-supply */
483 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100484 &pwr_reg);
485
486 /* check if VDD is Low Voltage */
487 if (!ret) {
488 if (regulator_get_value(pwr_reg) < 2700000) {
489 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
490 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
491 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
492 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
493 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
494 syscfg + SYSCFG_IOCTRLSETR);
495
496 if (!otp)
497 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
498 } else {
499 if (otp)
500 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
501 }
502 } else {
503 debug("VDD unknown");
504 }
505 }
Patrick Delaunay45459742019-02-27 17:01:24 +0100506
507 /* activate automatic I/O compensation
508 * warning: need to ensure CSI enabled and ready in clock driver
509 */
510 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
511
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200512 /* poll until ready (1s timeout) */
513 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
514 val & SYSCFG_CMPCR_READY,
515 1000000);
516 if (ret) {
517 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
518 led_error_blink(10);
519 }
520
Patrick Delaunay45459742019-02-27 17:01:24 +0100521 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay45459742019-02-27 17:01:24 +0100522}
523
Patrick Delaunayd573e462019-07-30 19:16:38 +0200524/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
525static int dk2_i2c1_fix(void)
526{
527 ofnode node;
528 struct gpio_desc hdmi, audio;
529 int ret = 0;
530
Patrick Delaunaye817c8e2020-07-31 16:31:47 +0200531 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
532 return -ENODEV;
533
Patrick Delaunayd573e462019-07-30 19:16:38 +0200534 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
535 if (!ofnode_valid(node)) {
536 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
537 return -ENOENT;
538 }
539
540 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
541 &hdmi, GPIOD_IS_OUT)) {
542 pr_debug("%s: could not find reset-gpios\n",
543 __func__);
544 return -ENOENT;
545 }
546
547 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
548 if (!ofnode_valid(node)) {
549 pr_debug("%s: no cs42l51@4a ?\n", __func__);
550 return -ENOENT;
551 }
552
553 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
554 &audio, GPIOD_IS_OUT)) {
555 pr_debug("%s: could not find reset-gpios\n",
556 __func__);
557 return -ENOENT;
558 }
559
560 /* before power up, insure that HDMI and AUDIO IC is under reset */
561 ret = dm_gpio_set_value(&hdmi, 1);
562 if (ret) {
563 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
564 goto error;
565 }
566 ret = dm_gpio_set_value(&audio, 1);
567 if (ret) {
568 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
569 goto error;
570 }
571
572 /* power-up audio IC */
573 regulator_autoset_by_name("v1v8_audio", NULL);
574
575 /* power-up HDMI IC */
576 regulator_autoset_by_name("v1v2_hdmi", NULL);
577 regulator_autoset_by_name("v3v3_hdmi", NULL);
578
579error:
580 return ret;
581}
582
583static bool board_is_dk2(void)
584{
Patrick Delaunay84625482020-01-13 15:17:42 +0100585 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200586 of_machine_is_compatible("st,stm32mp157c-dk2"))
587 return true;
588
589 return false;
590}
Patrick Delaunayd573e462019-07-30 19:16:38 +0200591
Patrick Delaunay055065a2020-04-22 14:29:13 +0200592static bool board_is_ev1(void)
593{
594 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
595 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
596 of_machine_is_compatible("st,stm32mp157c-ev1") ||
597 of_machine_is_compatible("st,stm32mp157d-ev1") ||
598 of_machine_is_compatible("st,stm32mp157f-ev1")))
599 return true;
600
601 return false;
602}
603
604/* touchscreen driver: only used for pincontrol configuration */
605static const struct udevice_id goodix_ids[] = {
606 { .compatible = "goodix,gt9147", },
607 { }
608};
609
610U_BOOT_DRIVER(goodix) = {
611 .name = "goodix",
612 .id = UCLASS_NOP,
613 .of_match = goodix_ids,
614};
615
616static void board_ev1_init(void)
617{
618 struct udevice *dev;
619
620 /* configure IRQ line on EV1 for touchscreen before LCD reset */
621 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
622}
623
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100624/* board dependent setup after realloc */
625int board_init(void)
626{
627 /* address of boot parameters */
628 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
629
Patrick Delaunay29e4ce32020-06-04 14:30:24 +0200630 if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
631 gpio_hog_probe_all();
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100632
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100633 board_key_check();
634
Patrick Delaunay055065a2020-04-22 14:29:13 +0200635 if (board_is_ev1())
636 board_ev1_init();
637
Patrick Delaunayd573e462019-07-30 19:16:38 +0200638 if (board_is_dk2())
639 dk2_i2c1_fix();
640
Patrick Delaunaye817c8e2020-07-31 16:31:47 +0200641 if (IS_ENABLED(CONFIG_DM_REGULATOR))
642 regulators_enable_boot_on(_DEBUG);
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200643
Patrick Delaunay3434bbe2020-07-31 16:31:45 +0200644 if (!IS_ENABLED(CONFIG_TFABOOT))
645 sysconf_init();
Patrick Delaunay45459742019-02-27 17:01:24 +0100646
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200647 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200648 led_default_state();
649
Patrick Delaunay0c952952020-04-22 14:29:12 +0200650 setup_led(LEDST_ON);
651
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100652 return 0;
653}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100654
655int board_late_init(void)
656{
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100657 const void *fdt_compat;
658 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200659 int ret;
660 u32 otp;
661 struct udevice *dev;
662 char buf[10];
Patrick Delaunay72b09982020-07-31 16:31:48 +0200663 char dtb_name[256];
664 int buf_len;
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100665
Patrick Delaunay72b09982020-07-31 16:31:48 +0200666 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
667 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
668 &fdt_compat_len);
669 if (fdt_compat && fdt_compat_len) {
670 if (strncmp(fdt_compat, "st,", 3) != 0) {
671 env_set("board_name", fdt_compat);
672 } else {
673 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200674
Patrick Delaunay72b09982020-07-31 16:31:48 +0200675 buf_len = sizeof(dtb_name);
676 strncpy(dtb_name, fdt_compat + 3, buf_len);
677 buf_len -= strlen(fdt_compat + 3);
678 strncat(dtb_name, ".dtb", buf_len);
679 env_set("fdtfile", dtb_name);
680 }
681 }
682 ret = uclass_get_device_by_driver(UCLASS_MISC,
683 DM_GET_DRIVER(stm32mp_bsec),
684 &dev);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200685
Patrick Delaunay72b09982020-07-31 16:31:48 +0200686 if (!ret)
687 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
688 &otp, sizeof(otp));
689 if (ret > 0 && otp) {
690 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
691 env_set("board_id", buf);
692
693 snprintf(buf, sizeof(buf), "0x%04x",
694 ((otp >> 8) & 0xF) - 1 + 0xA);
695 env_set("board_rev", buf);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200696 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100697 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100698
Patrice Chotard395f1292019-02-12 16:50:40 +0100699 /* for DK1/DK2 boards */
700 board_check_usb_power();
701
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100702 return 0;
703}
Patrice Chotard395f1292019-02-12 16:50:40 +0100704
705void board_quiesce_devices(void)
706{
707 setup_led(LEDST_OFF);
708}
Patrice Chotard87471642019-05-02 18:07:14 +0200709
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200710/* eth init function : weak called in eqos driver */
711int board_interface_eth_init(struct udevice *dev,
712 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200713{
714 u8 *syscfg;
715 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200716 bool eth_clk_sel_reg = false;
717 bool eth_ref_clk_sel_reg = false;
718
719 /* Gigabit Ethernet 125MHz clock selection. */
720 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
721
722 /* Ethernet 50Mhz RMII clock selection */
723 eth_ref_clk_sel_reg =
724 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200725
726 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
727
728 if (!syscfg)
729 return -ENODEV;
730
731 switch (interface_type) {
732 case PHY_INTERFACE_MODE_MII:
733 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
734 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
735 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
736 break;
737 case PHY_INTERFACE_MODE_GMII:
738 if (eth_clk_sel_reg)
739 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
740 SYSCFG_PMCSETR_ETH_CLK_SEL;
741 else
742 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
743 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
744 break;
745 case PHY_INTERFACE_MODE_RMII:
746 if (eth_ref_clk_sel_reg)
747 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
748 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
749 else
750 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
751 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
752 break;
753 case PHY_INTERFACE_MODE_RGMII:
754 case PHY_INTERFACE_MODE_RGMII_ID:
755 case PHY_INTERFACE_MODE_RGMII_RXID:
756 case PHY_INTERFACE_MODE_RGMII_TXID:
757 if (eth_clk_sel_reg)
758 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
759 SYSCFG_PMCSETR_ETH_CLK_SEL;
760 else
761 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
762 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
763 break;
764 default:
765 debug("%s: Do not manage %d interface\n",
766 __func__, interface_type);
767 /* Do not manage others interfaces */
768 return -EINVAL;
769 }
770
771 /* clear and set ETH configuration bits */
772 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
773 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
774 syscfg + SYSCFG_PMCCLRR);
775 writel(value, syscfg + SYSCFG_PMCSETR);
776
777 return 0;
778}
779
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200780enum env_location env_get_location(enum env_operation op, int prio)
781{
782 u32 bootmode = get_bootmode();
783
784 if (prio)
785 return ENVL_UNKNOWN;
786
787 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200788 case BOOT_FLASH_SD:
789 case BOOT_FLASH_EMMC:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200790 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
791 return ENVL_MMC;
792 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
793 return ENVL_EXT4;
794 else
795 return ENVL_NOWHERE;
796
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200797 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100798 case BOOT_FLASH_SPINAND:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200799 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
800 return ENVL_UBI;
801 else
802 return ENVL_NOWHERE;
803
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200804 case BOOT_FLASH_NOR:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200805 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
806 return ENVL_SPI_FLASH;
807 else
808 return ENVL_NOWHERE;
809
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200810 default:
811 return ENVL_NOWHERE;
812 }
813}
814
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200815const char *env_ext4_get_intf(void)
816{
817 u32 bootmode = get_bootmode();
818
819 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
820 case BOOT_FLASH_SD:
821 case BOOT_FLASH_EMMC:
822 return "mmc";
823 default:
824 return "";
825 }
826}
827
828const char *env_ext4_get_dev_part(void)
829{
830 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
831 u32 bootmode = get_bootmode();
832
833 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
834}
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200835int mmc_get_env_dev(void)
836{
837 u32 bootmode = get_bootmode();
838
839 return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
840}
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200841
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200842#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900843int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200844{
845#ifdef CONFIG_FDT_FIXUP_PARTITIONS
846 struct node_info nodes[] = {
847 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100848 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200849 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
850 };
851 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
852#endif
853
854 return 0;
855}
856#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200857
858static void board_copro_image_process(ulong fw_image, size_t fw_size)
859{
860 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
861
862 if (!rproc_is_initialized())
863 if (rproc_init()) {
864 printf("Remote Processor %d initialization failed\n",
865 id);
866 return;
867 }
868
869 ret = rproc_load(id, fw_image, fw_size);
870 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
871 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
872
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100873 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200874 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200875}
876
877U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);