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Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap393cb362011-12-06 23:34:12 +00004 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyape21185b2011-05-24 20:02:56 +00005 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyape21185b2011-05-24 20:02:56 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/* High Level Configuration Options */
Chander Kashyape21185b2011-05-24 20:02:56 +000013#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
14#define CONFIG_S5P 1 /* S5P Family */
Chander Kashyap393cb362011-12-06 23:34:12 +000015#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyape21185b2011-05-24 20:02:56 +000016#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
17
18#include <asm/arch/cpu.h> /* get chip and board defs */
19
20#define CONFIG_ARCH_CPU_INIT
21#define CONFIG_DISPLAY_CPUINFO
22#define CONFIG_DISPLAY_BOARDINFO
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +053023#define CONFIG_BOARD_EARLY_INIT_F
Chander Kashyape21185b2011-05-24 20:02:56 +000024
Chander Kashyapb3c5a492011-09-20 21:25:01 +000025/* Mach Type */
26#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
27
Chander Kashyape21185b2011-05-24 20:02:56 +000028#define CONFIG_SYS_SDRAM_BASE 0x40000000
29#define CONFIG_SYS_TEXT_BASE 0x43E00000
30
31/* input clock of PLL: SMDKV310 has 24MHz input clock */
32#define CONFIG_SYS_CLK_FREQ 24000000
33
34#define CONFIG_SETUP_MEMORY_TAGS
35#define CONFIG_CMDLINE_TAG
36#define CONFIG_INITRD_TAG
37#define CONFIG_CMDLINE_EDITING
38
39/* Handling Sleep Mode*/
40#define S5P_CHECK_SLEEP 0x00000BAD
41#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053042#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyape21185b2011-05-24 20:02:56 +000043
44/* Size of malloc() pool */
45#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
46
47/* select serial console configuration */
Chander Kashyape21185b2011-05-24 20:02:56 +000048#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
49#define CONFIG_BAUDRATE 115200
Chander Kashyap393cb362011-12-06 23:34:12 +000050#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
Chander Kashyape21185b2011-05-24 20:02:56 +000051
52/* SD/MMC configuration */
Jaehoon Chung7d2d58b2012-04-23 02:36:29 +000053#define CONFIG_GENERIC_MMC
54#define CONFIG_MMC
55#define CONFIG_SDHCI
56#define CONFIG_S5P_SDHCI
Chander Kashyape21185b2011-05-24 20:02:56 +000057
58/* PWM */
59#define CONFIG_PWM 1
60
61/* allow to overwrite serial and ethaddr */
62#define CONFIG_ENV_OVERWRITE
63
64/* Command definition*/
65#include <config_cmd_default.h>
66
67#define CONFIG_CMD_PING
68#define CONFIG_CMD_ELF
69#define CONFIG_CMD_DHCP
70#define CONFIG_CMD_MMC
71#define CONFIG_CMD_NET
72#define CONFIG_CMD_FAT
73
74#define CONFIG_BOOTDELAY 3
75#define CONFIG_ZERO_BOOTDELAY_CHECK
Chander Kashyap5187d8d2011-09-20 21:25:03 +000076
77/* MMC SPL */
78#define CONFIG_SPL
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053079#define CONFIG_SKIP_LOWLEVEL_INIT
Chander Kashyap9b3ab1c2011-09-20 21:25:04 +000080#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyape21185b2011-05-24 20:02:56 +000081
Inderpal Singh8a000612013-04-04 23:09:21 +000082#define CONFIG_SPL_TEXT_BASE 0x02021410
83
Chander Kashyape21185b2011-05-24 20:02:56 +000084#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
85
86/* Miscellaneous configurable options */
87#define CONFIG_SYS_LONGHELP /* undef to save memory */
88#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Chander Kashyape21185b2011-05-24 20:02:56 +000089#define CONFIG_SYS_PROMPT "SMDKV310 # "
90#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
91#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
92#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
93#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
94/* Boot Argument Buffer Size */
95#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
96/* memtest works on */
97#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
98#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
99#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
100
Chander Kashyape21185b2011-05-24 20:02:56 +0000101/* SMDKV310 has 4 bank of DRAM */
102#define CONFIG_NR_DRAM_BANKS 4
103#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
104#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
105#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
106#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
107#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
108#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
109#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
110#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
111#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
112
113/* FLASH and environment organization */
114#define CONFIG_SYS_NO_FLASH 1
115#undef CONFIG_CMD_IMLS
116#define CONFIG_IDENT_STRING " for SMDKC210/V310"
117
Chander Kashyape21185b2011-05-24 20:02:56 +0000118#define CONFIG_CLK_1000_400_200
119
120/* MIU (Memory Interleaving Unit) */
121#define CONFIG_MIU_2BIT_INTERLEAVED
122
123#define CONFIG_ENV_IS_IN_MMC 1
124#define CONFIG_SYS_MMC_ENV_DEV 0
125#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
126#define RESERVE_BLOCK_SIZE (512)
127#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
128#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
129#define CONFIG_DOS_PARTITION 1
130
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +0530131#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
132#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
133
134#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyape21185b2011-05-24 20:02:56 +0000135
136/* U-boot copy size from boot Media to DRAM.*/
137#define COPY_BL2_SIZE 0x80000
138#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
139#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
140
141/* Ethernet Controllor Driver */
142#ifdef CONFIG_CMD_NET
Chander Kashyape21185b2011-05-24 20:02:56 +0000143#define CONFIG_SMC911X
144#define CONFIG_SMC911X_BASE 0x5000000
145#define CONFIG_SMC911X_16_BIT
146#define CONFIG_ENV_SROM_BANK 1
147#endif /*CONFIG_CMD_NET*/
Thomas Abraham07407d92011-06-03 22:52:17 +0000148
149/* Enable devicetree support */
150#define CONFIG_OF_LIBFDT
Chander Kashyape21185b2011-05-24 20:02:56 +0000151#endif /* __CONFIG_H */