Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Test-related constants for sandbox |
| 4 | * |
| 5 | * Copyright (c) 2014 Google, Inc |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_TEST_H |
| 9 | #define __ASM_TEST_H |
| 10 | |
Pali Rohár | f02b396 | 2022-02-18 13:16:18 +0100 | [diff] [blame] | 11 | #include <pci_ids.h> |
Simon Glass | 8657ad4 | 2021-11-19 13:23:50 -0700 | [diff] [blame] | 12 | |
Simon Glass | 756c014 | 2022-09-06 20:27:10 -0600 | [diff] [blame] | 13 | struct unit_test_state; |
| 14 | |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 15 | /* The sandbox driver always permits an I2C device with this address */ |
Simon Glass | 9569c40 | 2015-03-05 12:25:26 -0700 | [diff] [blame] | 16 | #define SANDBOX_I2C_TEST_ADDR 0x59 |
| 17 | |
| 18 | #define SANDBOX_PCI_VENDOR_ID 0x1234 |
Simon Glass | 3414581 | 2019-09-25 08:56:01 -0600 | [diff] [blame] | 19 | #define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678 |
Simon Glass | 3b65ee3 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 20 | #define SANDBOX_PCI_PMC_EMUL_ID 0x5677 |
Simon Glass | 3e17ffb | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 21 | #define SANDBOX_PCI_P2SB_EMUL_ID 0x5676 |
Pali Rohár | f02b396 | 2022-02-18 13:16:18 +0100 | [diff] [blame] | 22 | #define SANDBOX_PCI_CLASS_CODE (PCI_CLASS_COMMUNICATION_SERIAL >> 8) |
| 23 | #define SANDBOX_PCI_CLASS_SUB_CODE (PCI_CLASS_COMMUNICATION_SERIAL & 0xff) |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 24 | |
Bin Meng | 95e1106 | 2018-08-03 01:14:53 -0700 | [diff] [blame] | 25 | #define PCI_CAP_ID_PM_OFFSET 0x50 |
| 26 | #define PCI_CAP_ID_EXP_OFFSET 0x60 |
| 27 | #define PCI_CAP_ID_MSIX_OFFSET 0x70 |
Alex Marginean | 21ebbaf | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 28 | #define PCI_CAP_ID_EA_OFFSET 0x80 |
Bin Meng | 95e1106 | 2018-08-03 01:14:53 -0700 | [diff] [blame] | 29 | |
| 30 | #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100 |
| 31 | #define PCI_EXT_CAP_ID_VC_OFFSET 0x200 |
| 32 | #define PCI_EXT_CAP_ID_DSN_OFFSET 0x300 |
| 33 | |
Bin Meng | 59a160e | 2018-08-03 01:14:46 -0700 | [diff] [blame] | 34 | /* Useful for PCI_VDEVICE() macro */ |
| 35 | #define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID |
| 36 | #define SWAP_CASE_DRV_DATA 0x55aa |
| 37 | |
Simon Glass | 6a1c7ce | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 38 | #define SANDBOX_CLK_RATE 32768 |
| 39 | |
Alex Marginean | 21ebbaf | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 40 | /* Macros used to test PCI EA capability structure */ |
| 41 | #define PCI_CAP_EA_BASE_LO0 0x00100000 |
| 42 | #define PCI_CAP_EA_BASE_LO1 0x00110000 |
| 43 | #define PCI_CAP_EA_BASE_LO2 0x00120000 |
| 44 | #define PCI_CAP_EA_BASE_LO4 0x00140000 |
| 45 | #define PCI_CAP_EA_BASE_HI2 0x00020000ULL |
| 46 | #define PCI_CAP_EA_BASE_HI4 0x00040000ULL |
| 47 | #define PCI_CAP_EA_SIZE_LO 0x0000ffff |
| 48 | #define PCI_CAP_EA_SIZE_HI 0x00000010ULL |
| 49 | #define PCI_EA_BAR2_MAGIC 0x72727272 |
| 50 | #define PCI_EA_BAR4_MAGIC 0x74747474 |
| 51 | |
Simon Glass | ba87607 | 2020-02-06 09:54:57 -0700 | [diff] [blame] | 52 | enum { |
| 53 | SANDBOX_IRQN_PEND = 1, /* Interrupt number for 'pending' test */ |
| 54 | }; |
| 55 | |
Simon Glass | 04035fd | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 56 | /* System controller driver data */ |
| 57 | enum { |
| 58 | SYSCON0 = 32, |
| 59 | SYSCON1, |
| 60 | |
| 61 | SYSCON_COUNT |
| 62 | }; |
| 63 | |
Simon Glass | 182bf92 | 2015-04-20 12:37:15 -0600 | [diff] [blame] | 64 | /** |
Simon Glass | d8e9a93 | 2021-01-16 14:52:22 -0700 | [diff] [blame] | 65 | */ |
| 66 | enum cros_ec_test_t { |
| 67 | CROSECT_BREAK_HELLO = BIT(1), |
Simon Glass | 3a6c994 | 2021-01-16 14:52:28 -0700 | [diff] [blame] | 68 | CROSECT_LID_OPEN = BIT(2), |
Simon Glass | d8e9a93 | 2021-01-16 14:52:22 -0700 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | /** |
Simon Glass | 182bf92 | 2015-04-20 12:37:15 -0600 | [diff] [blame] | 72 | * sandbox_i2c_set_test_mode() - set test mode for running unit tests |
| 73 | * |
| 74 | * See sandbox_i2c_xfer() for the behaviour changes. |
| 75 | * |
| 76 | * @bus: sandbox I2C bus to adjust |
| 77 | * @test_mode: true to select test mode, false to run normally |
| 78 | */ |
| 79 | void sandbox_i2c_set_test_mode(struct udevice *bus, bool test_mode); |
| 80 | |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 81 | enum sandbox_i2c_eeprom_test_mode { |
| 82 | SIE_TEST_MODE_NONE, |
| 83 | /* Permits read/write of only one byte per I2C transaction */ |
| 84 | SIE_TEST_MODE_SINGLE_BYTE, |
| 85 | }; |
| 86 | |
| 87 | void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, |
| 88 | enum sandbox_i2c_eeprom_test_mode mode); |
| 89 | |
| 90 | void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len); |
| 91 | |
Robert Beckett | 951674a | 2019-10-28 17:44:59 +0000 | [diff] [blame] | 92 | void sandbox_i2c_eeprom_set_chip_addr_offset_mask(struct udevice *dev, |
| 93 | uint mask); |
| 94 | |
Robert Beckett | 22e9351 | 2019-10-28 17:44:58 +0000 | [diff] [blame] | 95 | uint sanbox_i2c_eeprom_get_prev_addr(struct udevice *dev); |
| 96 | |
| 97 | uint sanbox_i2c_eeprom_get_prev_offset(struct udevice *dev); |
| 98 | |
Simon Glass | dd18e5d | 2015-04-20 12:37:24 -0600 | [diff] [blame] | 99 | /** |
| 100 | * sandbox_i2c_rtc_set_offset() - set the time offset from system/base time |
| 101 | * |
| 102 | * @dev: RTC device to adjust |
| 103 | * @use_system_time: true to use system time, false to use @base_time |
| 104 | * @offset: RTC offset from current system/base time (-1 for no |
| 105 | * change) |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 106 | * Return: old value of RTC offset |
Simon Glass | dd18e5d | 2015-04-20 12:37:24 -0600 | [diff] [blame] | 107 | */ |
| 108 | long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time, |
| 109 | int offset); |
| 110 | |
| 111 | /** |
| 112 | * sandbox_i2c_rtc_get_set_base_time() - get and set the base time |
| 113 | * |
| 114 | * @dev: RTC device to adjust |
| 115 | * @base_time: New base system time (set to -1 for no change) |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 116 | * Return: old base time |
Simon Glass | dd18e5d | 2015-04-20 12:37:24 -0600 | [diff] [blame] | 117 | */ |
| 118 | long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time); |
| 119 | |
Simon Glass | d8a26f0 | 2015-11-08 23:48:06 -0700 | [diff] [blame] | 120 | int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str); |
| 121 | |
Mario Six | 4eea531 | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 122 | /** |
| 123 | * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD |
| 124 | * |
| 125 | * @dev: OSD device for which to access the internal memory for |
| 126 | * @buf: pointer to buffer to receive the OSD memory data |
| 127 | * @buflen: length of buffer in bytes |
| 128 | */ |
| 129 | int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen); |
Simon Glass | 5d9a88f | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 130 | |
| 131 | /** |
| 132 | * sandbox_pwm_get_config() - get the PWM config for a channel |
| 133 | * |
| 134 | * @dev: Device to check |
| 135 | * @channel: Channel number to check |
| 136 | * @period_ns: Period of the PWM in nanoseconds |
| 137 | * @duty_ns: Current duty cycle of the PWM in nanoseconds |
| 138 | * @enable: true if the PWM is enabled |
| 139 | * @polarity: true if the PWM polarity is active high |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 140 | * Return: 0 if OK, -ENOSPC if the PWM number is invalid |
Simon Glass | 5d9a88f | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 141 | */ |
| 142 | int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, |
| 143 | uint *duty_nsp, bool *enablep, bool *polarityp); |
| 144 | |
Simon Glass | a58986c | 2018-11-06 15:21:41 -0700 | [diff] [blame] | 145 | /** |
| 146 | * sandbox_sf_set_block_protect() - Set the BP bits of the status register |
| 147 | * |
| 148 | * @dev: Device to update |
| 149 | * @bp_mask: BP bits to set (bits 2:0, so a value of 0 to 7) |
| 150 | */ |
| 151 | void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask); |
| 152 | |
Simon Glass | ce6d99a | 2018-12-10 10:37:33 -0700 | [diff] [blame] | 153 | /** |
| 154 | * sandbox_get_codec_params() - Read back codec parameters |
| 155 | * |
| 156 | * This reads back the parameters set by audio_codec_set_params() for the |
| 157 | * sandbox audio driver. Arguments are as for that function. |
| 158 | */ |
| 159 | void sandbox_get_codec_params(struct udevice *dev, int *interfacep, int *ratep, |
| 160 | int *mclk_freqp, int *bits_per_samplep, |
| 161 | uint *channelsp); |
| 162 | |
Simon Glass | e96fa6c | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 163 | /** |
| 164 | * sandbox_get_i2s_sum() - Read back the sum of the audio data so far |
| 165 | * |
| 166 | * This data is provided to the sandbox driver by the I2S tx_data() method. |
| 167 | * |
| 168 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 169 | * Return: sum of audio data |
Simon Glass | e96fa6c | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 170 | */ |
| 171 | int sandbox_get_i2s_sum(struct udevice *dev); |
| 172 | |
Simon Glass | d490189 | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 173 | /** |
| 174 | * sandbox_get_setup_called() - Returns the number of times setup(*) was called |
| 175 | * |
| 176 | * This is used in the sound test |
| 177 | * |
| 178 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 179 | * Return: call count for the setup() method |
Simon Glass | d490189 | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 180 | */ |
| 181 | int sandbox_get_setup_called(struct udevice *dev); |
| 182 | |
| 183 | /** |
Simon Glass | 3062cd1 | 2020-02-03 07:36:06 -0700 | [diff] [blame] | 184 | * sandbox_get_sound_active() - Returns whether sound play is in progress |
| 185 | * |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 186 | * Return: true if active, false if not |
Simon Glass | 3062cd1 | 2020-02-03 07:36:06 -0700 | [diff] [blame] | 187 | */ |
| 188 | int sandbox_get_sound_active(struct udevice *dev); |
| 189 | |
| 190 | /** |
Heinrich Schuchardt | 968eaae | 2022-12-04 17:11:41 +0100 | [diff] [blame] | 191 | * sandbox_get_sound_count() - Read back the count of the sound data so far |
| 192 | * |
| 193 | * This data is provided to the sandbox driver by the sound play() method. |
| 194 | * |
| 195 | * @dev: Device to check |
| 196 | * Return: count of audio data |
| 197 | */ |
| 198 | int sandbox_get_sound_count(struct udevice *dev); |
| 199 | |
| 200 | /** |
Simon Glass | d490189 | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 201 | * sandbox_get_sound_sum() - Read back the sum of the sound data so far |
| 202 | * |
| 203 | * This data is provided to the sandbox driver by the sound play() method. |
| 204 | * |
| 205 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 206 | * Return: sum of audio data |
Simon Glass | d490189 | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 207 | */ |
| 208 | int sandbox_get_sound_sum(struct udevice *dev); |
| 209 | |
Simon Glass | b45c833 | 2019-02-16 20:24:50 -0700 | [diff] [blame] | 210 | /** |
Simon Glass | 2850266 | 2019-02-16 20:24:54 -0700 | [diff] [blame] | 211 | * sandbox_set_allow_beep() - Set whether the 'beep' interface is supported |
| 212 | * |
| 213 | * @dev: Device to update |
| 214 | * @allow: true to allow the start_beep() method, false to disallow it |
| 215 | */ |
| 216 | void sandbox_set_allow_beep(struct udevice *dev, bool allow); |
| 217 | |
| 218 | /** |
| 219 | * sandbox_get_beep_frequency() - Get the frequency of the current beep |
| 220 | * |
| 221 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 222 | * Return: frequency of beep, if there is an active beep, else 0 |
Simon Glass | 2850266 | 2019-02-16 20:24:54 -0700 | [diff] [blame] | 223 | */ |
| 224 | int sandbox_get_beep_frequency(struct udevice *dev); |
| 225 | |
| 226 | /** |
Ovidiu Panait | add685f | 2020-12-14 19:06:49 +0200 | [diff] [blame] | 227 | * sandbox_spi_get_speed() - Get current speed setting of a sandbox spi bus |
| 228 | * |
| 229 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 230 | * Return: current bus speed |
Ovidiu Panait | add685f | 2020-12-14 19:06:49 +0200 | [diff] [blame] | 231 | */ |
| 232 | uint sandbox_spi_get_speed(struct udevice *dev); |
| 233 | |
| 234 | /** |
| 235 | * sandbox_spi_get_mode() - Get current mode setting of a sandbox spi bus |
| 236 | * |
| 237 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 238 | * Return: current mode |
Ovidiu Panait | add685f | 2020-12-14 19:06:49 +0200 | [diff] [blame] | 239 | */ |
| 240 | uint sandbox_spi_get_mode(struct udevice *dev); |
| 241 | |
| 242 | /** |
Simon Glass | b45c833 | 2019-02-16 20:24:50 -0700 | [diff] [blame] | 243 | * sandbox_get_pch_spi_protect() - Get the PCI SPI protection status |
| 244 | * |
| 245 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 246 | * Return: 0 if not protected, 1 if protected |
Simon Glass | b45c833 | 2019-02-16 20:24:50 -0700 | [diff] [blame] | 247 | */ |
| 248 | int sandbox_get_pch_spi_protect(struct udevice *dev); |
| 249 | |
Ramon Fried | f2a55ac | 2019-04-27 11:15:24 +0300 | [diff] [blame] | 250 | /** |
| 251 | * sandbox_get_pci_ep_irq_count() - Get the PCI EP IRQ count |
| 252 | * |
| 253 | * @dev: Device to check |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 254 | * Return: irq count |
Ramon Fried | f2a55ac | 2019-04-27 11:15:24 +0300 | [diff] [blame] | 255 | */ |
| 256 | int sandbox_get_pci_ep_irq_count(struct udevice *dev); |
| 257 | |
Simon Glass | 75d8f49 | 2019-09-25 08:56:42 -0600 | [diff] [blame] | 258 | /** |
| 259 | * sandbox_pci_read_bar() - Read the BAR value for a read_config operation |
| 260 | * |
| 261 | * This is used in PCI emulators to read a base address reset. This has special |
| 262 | * rules because when the register is set to 0xffffffff it can be used to |
| 263 | * discover the type and size of the BAR. |
| 264 | * |
| 265 | * @barval: Current value of the BAR |
| 266 | * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or |
| 267 | * PCI_BASE_ADDRESS_MEM_TYPE_32) |
| 268 | * @size: Size of BAR in bytes |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 269 | * Return: BAR value to return from emulator |
Simon Glass | 75d8f49 | 2019-09-25 08:56:42 -0600 | [diff] [blame] | 270 | */ |
| 271 | uint sandbox_pci_read_bar(u32 barval, int type, uint size); |
| 272 | |
Simon Glass | 619025b | 2019-10-11 16:16:48 -0600 | [diff] [blame] | 273 | /** |
| 274 | * sandbox_set_enable_memio() - Enable readl/writel() for sandbox |
| 275 | * |
| 276 | * Normally these I/O functions do nothing with sandbox. Certain tests need them |
| 277 | * to work as for other architectures, so this function can be used to enable |
| 278 | * them. |
| 279 | * |
| 280 | * @enable: true to enable, false to disable |
| 281 | */ |
| 282 | void sandbox_set_enable_memio(bool enable); |
| 283 | |
Simon Glass | d8e9a93 | 2021-01-16 14:52:22 -0700 | [diff] [blame] | 284 | /** |
| 285 | * sandbox_cros_ec_set_test_flags() - Set behaviour for testing purposes |
| 286 | * |
| 287 | * @dev: Device to check |
| 288 | * @flags: Flags to control behaviour (CROSECT_...) |
| 289 | */ |
| 290 | void sandbox_cros_ec_set_test_flags(struct udevice *dev, uint flags); |
| 291 | |
Alper Nebi Yasak | e712245 | 2021-05-19 19:33:31 +0300 | [diff] [blame] | 292 | /** |
| 293 | * sandbox_cros_ec_get_pwm_duty() - Get EC PWM config for testing purposes |
| 294 | * |
| 295 | * @dev: Device to check |
| 296 | * @index: PWM channel index |
| 297 | * @duty: Current duty cycle in 0..EC_PWM_MAX_DUTY range. |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 298 | * Return: 0 if OK, -ENOSPC if the PWM number is invalid |
Alper Nebi Yasak | e712245 | 2021-05-19 19:33:31 +0300 | [diff] [blame] | 299 | */ |
| 300 | int sandbox_cros_ec_get_pwm_duty(struct udevice *dev, uint index, uint *duty); |
| 301 | |
Simon Glass | 2662b54 | 2022-07-30 15:52:22 -0600 | [diff] [blame] | 302 | /** |
| 303 | * sandbox_set_fake_efi_mgr_dev() - Control EFI bootmgr producing valid bootflow |
| 304 | * |
| 305 | * This is only used for testing. |
| 306 | * |
| 307 | * @dev: efi_mgr bootmeth device |
| 308 | * @fake_dev: true to produce a valid bootflow when requested, false to produce |
| 309 | * an error |
| 310 | */ |
| 311 | void sandbox_set_fake_efi_mgr_dev(struct udevice *dev, bool fake_dev); |
| 312 | |
Simon Glass | 756c014 | 2022-09-06 20:27:10 -0600 | [diff] [blame] | 313 | /** |
| 314 | * sandbox_load_other_fdt() - load the 'other' FDT into the test state |
| 315 | * |
| 316 | * This copies the other.dtb file into the test state, so that a fresh version |
| 317 | * can be used for a test that is about to run. |
| 318 | * |
| 319 | * If @uts->other_fdt is NULL, as it is when first set up, this allocates a |
| 320 | * buffer for the other FDT and sets @uts->other_fdt_size to its size. |
| 321 | * |
| 322 | * In any case, the other FDT is copied from the sandbox state into |
| 323 | * @uts->other_fdt ready for use. |
| 324 | * |
| 325 | * @uts: Unit test state |
| 326 | * @return 0 if OK, -ve on error |
| 327 | */ |
| 328 | int sandbox_load_other_fdt(void **fdtp, int *sizep); |
| 329 | |
Simon Glass | f43b2df | 2023-01-17 10:47:27 -0700 | [diff] [blame] | 330 | /** |
| 331 | * sandbox_set_eth_enable() - Enable / disable Ethernet |
| 332 | * |
| 333 | * Allows control of whether Ethernet packets are actually send/received |
| 334 | * |
| 335 | * @enable: true to enable Ethernet, false to disable |
| 336 | */ |
| 337 | void sandbox_set_eth_enable(bool enable); |
| 338 | |
| 339 | /** |
| 340 | * sandbox_eth_enabled() - Check if Ethernet is enabled |
| 341 | * |
| 342 | * Returns: true if Ethernet is enabled on sandbox, False if not |
| 343 | */ |
| 344 | bool sandbox_eth_enabled(void); |
| 345 | |
Simon Glass | 081bdc5 | 2023-01-17 10:48:02 -0700 | [diff] [blame] | 346 | /** |
| 347 | * sandbox_sf_bootdev_enabled() - Check if SPI flash bootdevs should be bound |
| 348 | * |
| 349 | * Returns: true if sandbox should bind bootdevs for SPI flash, false if not |
| 350 | */ |
| 351 | bool sandbox_sf_bootdev_enabled(void); |
| 352 | |
| 353 | /** |
| 354 | * sandbox_sf_set_enable_bootdevs() - Enable / disable the SPI flash bootdevs |
| 355 | * |
| 356 | * @enable: true to bind the SPI flash bootdevs, false to skip |
| 357 | */ |
| 358 | void sandbox_sf_set_enable_bootdevs(bool enable); |
| 359 | |
Simon Glass | 6ec1b75 | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 360 | #endif |