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Masahiro Yamada0b11dbf2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass59e11eb2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +090028
Masahiro Yamadab6036bc2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczak705fcf42015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glasscaa4daa2020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewskie3114822019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glass4bba9d32015-02-13 12:20:48 -070038
Igor Opaniukd1f3abe2021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Tom Rini55dabcc2021-08-18 23:12:24 -040050config SYS_I2C_LEGACY
51 bool "Enable legacy I2C subsystem and drivers"
52 depends on !DM_I2C
53 help
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
56 in SPL or TPL.
57
58config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
61 help
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
64
65config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
68 help
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
71
Tom Rini52c7e372021-08-18 23:12:25 -040072config SYS_I2C_EARLY_INIT
73 bool "Enable legacy I2C subsystem early in boot"
74 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
75 help
76 Add the function prototype for i2c_early_init_f which is called in
77 board_early_init_f.
78
Simon Glasscc456bd2015-08-03 08:19:23 -060079config I2C_CROS_EC_TUNNEL
80 tristate "Chrome OS EC tunnel I2C bus"
81 depends on CROS_EC
82 help
83 This provides an I2C bus that will tunnel i2c commands through to
84 the other side of the Chrome OS EC to the I2C bus connected there.
85 This will work whatever the interface used to talk to the EC (SPI,
86 I2C or LPC). Some Chromebooks use this when the hardware design
87 does not allow direct access to the main PMIC from the AP.
88
Simon Glassf48eaf02015-08-03 08:19:24 -060089config I2C_CROS_EC_LDO
90 bool "Provide access to LDOs on the Chrome OS EC"
91 depends on CROS_EC
92 ---help---
93 On many Chromebooks the main PMIC is inaccessible to the AP. This is
94 often dealt with by using an I2C pass-through interface provided by
95 the EC. On some unfortunate models (e.g. Spring) the pass-through
96 is not available, and an LDO message is available instead. This
97 option enables a driver which provides very basic access to those
98 regulators, via the EC. We implement this as an I2C bus which
99 emulates just the TPS65090 messages we know about. This is done to
100 avoid duplicating the logic in the TPS65090 regulator driver for
101 enabling/disabling an LDO.
Simon Glasscc456bd2015-08-03 08:19:23 -0600102
Lukasz Majewskie46f8a32017-03-21 12:08:25 +0100103config I2C_SET_DEFAULT_BUS_NUM
104 bool "Set default I2C bus number"
105 depends on DM_I2C
106 help
107 Set default number of I2C bus to be accessed. This option provides
108 behaviour similar to old (i.e. pre DM) I2C bus driver.
109
110config I2C_DEFAULT_BUS_NUMBER
111 hex "I2C default bus number"
112 depends on I2C_SET_DEFAULT_BUS_NUM
113 default 0x0
114 help
115 Number of default I2C bus to use
116
Przemyslaw Marczakc54473c2015-03-31 18:57:18 +0200117config DM_I2C_GPIO
118 bool "Enable Driver Model for software emulated I2C bus driver"
119 depends on DM_I2C && DM_GPIO
120 help
121 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
122 configuration is given by the device tree. Kernel-style device tree
123 bindings are supported.
124 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
125
Igor Opaniukd1f3abe2021-02-09 13:52:43 +0200126config SPL_DM_I2C_GPIO
127 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass83061db2021-07-10 21:14:30 -0600128 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniukd1f3abe2021-02-09 13:52:43 +0200129 default y
130 help
131 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
132 configuration is given by the device tree. Kernel-style device tree
133 bindings are supported.
134 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
135
Songjun Wu8800e0f2016-06-20 13:22:38 +0800136config SYS_I2C_AT91
137 bool "Atmel I2C driver"
138 depends on DM_I2C && ARCH_AT91
139 help
140 Add support for the Atmel I2C driver. A serious problem is that there
141 is no documented way to issue repeated START conditions for more than
142 two messages, as needed to support combined I2C messages. Use the
143 i2c-gpio driver unless your system can cope with this limitation.
144 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
145
Rayagonda Kokatanur956d57a2020-04-08 11:12:27 +0530146config SYS_I2C_IPROC
147 bool "Broadcom I2C driver"
148 depends on DM_I2C
149 help
150 Broadcom I2C driver.
151 Add support for Broadcom I2C driver.
152 Say yes here to to enable the Broadco I2C driver.
153
mario.six@gdsys.ccdbc82ce2016-04-25 08:31:09 +0200154config SYS_I2C_FSL
155 bool "Freescale I2C bus driver"
156 depends on DM_I2C
157 help
158 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
159 MPC85xx processors.
160
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800161config SYS_I2C_CADENCE
162 tristate "Cadence I2C Controller"
Michal Simek664e16c2020-08-06 15:18:36 +0200163 depends on DM_I2C
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800164 help
165 Say yes here to select Cadence I2C Host Controller. This controller is
166 e.g. used by Xilinx Zynq.
167
Arthur Li7f5ea252020-06-01 12:56:31 -0700168config SYS_I2C_CA
169 tristate "Cortina-Access I2C Controller"
170 depends on DM_I2C && CORTINA_PLATFORM
171 default n
172 help
173 Add support for the Cortina Access I2C host controller.
174 Say yes here to select Cortina-Access I2C Host Controller.
175
Adam Ford9f8cf762018-08-10 05:05:22 -0500176config SYS_I2C_DAVINCI
177 bool "Davinci I2C Controller"
178 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
179 help
180 Say yes here to add support for Davinci and Keystone I2C controller
181
Stefan Roesee32d0db2016-04-28 09:47:17 +0200182config SYS_I2C_DW
183 bool "Designware I2C Controller"
184 default n
185 help
186 Say yes here to select the Designware I2C Host Controller. This
187 controller is used in various SoCs, e.g. the ST SPEAr, Altera
188 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
189
maxims@google.com4dc038f2017-04-17 12:00:30 -0700190config SYS_I2C_ASPEED
191 bool "Aspeed I2C Controller"
192 depends on DM_I2C && ARCH_ASPEED
193 help
194 Say yes here to select Aspeed I2C Host Controller. The driver
195 supports AST2500 and AST2400 controllers, but is very limited.
196 Only single master mode is supported and only byte-by-byte
197 synchronous reads and writes are supported, no Pool Buffers or DMA.
198
Simon Glassabb0b012016-01-17 16:11:44 -0700199config SYS_I2C_INTEL
200 bool "Intel I2C/SMBUS driver"
201 depends on DM_I2C
202 help
203 Add support for the Intel SMBUS driver. So far this driver is just
204 a stub which perhaps some basic init. There is no implementation of
205 the I2C API meaning that any I2C operations will immediately fail
206 for now.
207
Peng Fan7ee3f142017-02-24 09:54:18 +0800208config SYS_I2C_IMX_LPI2C
209 bool "NXP i.MX LPI2C driver"
Peng Fan7ee3f142017-02-24 09:54:18 +0800210 help
211 Add support for the NXP i.MX LPI2C driver.
212
Trevor Woerner07055562021-06-10 22:37:08 -0400213config SYS_I2C_LPC32XX
214 bool "LPC32XX I2C driver"
215 depends on ARCH_LPC32XX
216 help
217 Enable support for the LPC32xx I2C driver.
218
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100219config SYS_I2C_MESON
220 bool "Amlogic Meson I2C driver"
221 depends on DM_I2C && ARCH_MESON
222 help
Beniamino Galvani4ecbb8b2017-11-26 17:40:54 +0100223 Add support for the I2C controller available in Amlogic Meson
224 SoCs. The controller supports programmable bus speed including
225 standard (100kbits/s) and fast (400kbit/s) speed and allows the
226 software to define a flexible format of the bit streams. It has an
227 internal buffer holding up to 8 bytes for transfers and supports
228 both 7-bit and 10-bit addresses.
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100229
Jagan Teki72c8c102016-12-06 00:00:57 +0100230config SYS_I2C_MXC
Sriram Dash942ecc82018-02-06 11:26:30 +0530231 bool "NXP MXC I2C driver"
Jagan Teki72c8c102016-12-06 00:00:57 +0100232 help
Chris Packham74751452019-01-13 22:13:25 +1300233 Add support for the NXP I2C driver. This supports up to four bus
234 channels and operating on standard mode up to 100 kbits/s and fast
235 mode up to 400 kbits/s.
Jagan Teki72c8c102016-12-06 00:00:57 +0100236
Tom Rini15e7b762021-08-18 23:12:33 -0400237if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
Sriram Dash942ecc82018-02-06 11:26:30 +0530238config SYS_I2C_MXC_I2C1
239 bool "NXP MXC I2C1"
240 help
241 Add support for NXP MXC I2C Controller 1.
242 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
243
244config SYS_I2C_MXC_I2C2
245 bool "NXP MXC I2C2"
246 help
247 Add support for NXP MXC I2C Controller 2.
248 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
249
250config SYS_I2C_MXC_I2C3
251 bool "NXP MXC I2C3"
252 help
253 Add support for NXP MXC I2C Controller 3.
254 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
255
256config SYS_I2C_MXC_I2C4
257 bool "NXP MXC I2C4"
258 help
259 Add support for NXP MXC I2C Controller 4.
260 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dashfa452192018-02-06 11:26:31 +0530261
262config SYS_I2C_MXC_I2C5
263 bool "NXP MXC I2C5"
264 help
265 Add support for NXP MXC I2C Controller 5.
266 Required for SoCs which have I2C MXC controller 5 eg LX2160A
267
268config SYS_I2C_MXC_I2C6
269 bool "NXP MXC I2C6"
270 help
271 Add support for NXP MXC I2C Controller 6.
272 Required for SoCs which have I2C MXC controller 6 eg LX2160A
273
274config SYS_I2C_MXC_I2C7
275 bool "NXP MXC I2C7"
276 help
277 Add support for NXP MXC I2C Controller 7.
278 Required for SoCs which have I2C MXC controller 7 eg LX2160A
279
280config SYS_I2C_MXC_I2C8
281 bool "NXP MXC I2C8"
282 help
283 Add support for NXP MXC I2C Controller 8.
284 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash942ecc82018-02-06 11:26:30 +0530285endif
286
287if SYS_I2C_MXC_I2C1
288config SYS_MXC_I2C1_SPEED
289 int "I2C Channel 1 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500290 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530291 default 100000
292 help
293 MXC I2C Channel 1 speed
294
295config SYS_MXC_I2C1_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400296 hex "I2C1 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530297 default 0
298 help
299 MXC I2C1 Slave
300endif
301
302if SYS_I2C_MXC_I2C2
303config SYS_MXC_I2C2_SPEED
304 int "I2C Channel 2 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500305 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530306 default 100000
307 help
308 MXC I2C Channel 2 speed
309
310config SYS_MXC_I2C2_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400311 hex "I2C2 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530312 default 0
313 help
314 MXC I2C2 Slave
315endif
316
317if SYS_I2C_MXC_I2C3
318config SYS_MXC_I2C3_SPEED
319 int "I2C Channel 3 speed"
320 default 100000
321 help
322 MXC I2C Channel 3 speed
323
324config SYS_MXC_I2C3_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400325 hex "I2C3 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530326 default 0
327 help
328 MXC I2C3 Slave
329endif
330
331if SYS_I2C_MXC_I2C4
332config SYS_MXC_I2C4_SPEED
333 int "I2C Channel 4 speed"
334 default 100000
335 help
336 MXC I2C Channel 4 speed
337
338config SYS_MXC_I2C4_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400339 hex "I2C4 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530340 default 0
341 help
342 MXC I2C4 Slave
343endif
344
Sriram Dashfa452192018-02-06 11:26:31 +0530345if SYS_I2C_MXC_I2C5
346config SYS_MXC_I2C5_SPEED
347 int "I2C Channel 5 speed"
348 default 100000
349 help
350 MXC I2C Channel 5 speed
351
352config SYS_MXC_I2C5_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400353 hex "I2C5 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530354 default 0
355 help
356 MXC I2C5 Slave
357endif
358
359if SYS_I2C_MXC_I2C6
360config SYS_MXC_I2C6_SPEED
361 int "I2C Channel 6 speed"
362 default 100000
363 help
364 MXC I2C Channel 6 speed
365
366config SYS_MXC_I2C6_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400367 hex "I2C6 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530368 default 0
369 help
370 MXC I2C6 Slave
371endif
372
373if SYS_I2C_MXC_I2C7
374config SYS_MXC_I2C7_SPEED
375 int "I2C Channel 7 speed"
376 default 100000
377 help
378 MXC I2C Channel 7 speed
379
380config SYS_MXC_I2C7_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400381 hex "I2C7 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530382 default 0
383 help
384 MXC I2C7 Slave
385endif
386
387if SYS_I2C_MXC_I2C8
388config SYS_MXC_I2C8_SPEED
389 int "I2C Channel 8 speed"
390 default 100000
391 help
392 MXC I2C Channel 8 speed
393
394config SYS_MXC_I2C8_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400395 hex "I2C8 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530396 default 0
397 help
398 MXC I2C8 Slave
399endif
400
Stefan Boschc25e9e02020-07-10 19:07:28 +0200401config SYS_I2C_NEXELL
402 bool "Nexell I2C driver"
403 depends on DM_I2C
404 help
405 Add support for the Nexell I2C driver. This is used with various
406 Nexell parts such as S5Pxx18 series SoCs. All chips
407 have several I2C ports and all are provided, controlled by the
408 device tree.
409
Pragnesh Patelb2d4cbe2020-11-14 14:42:34 +0530410config SYS_I2C_OCORES
411 bool "ocores I2C driver"
412 depends on DM_I2C
413 help
414 Add support for ocores I2C controller. For details see
415 https://opencores.org/projects/i2c
416
Adam Forddaa0f052017-08-07 13:11:34 -0500417config SYS_I2C_OMAP24XX
418 bool "TI OMAP2+ I2C driver"
Vignesh R14106bc2019-06-04 18:08:11 -0500419 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Forddaa0f052017-08-07 13:11:34 -0500420 help
421 Add support for the OMAP2+ I2C driver.
422
Marek Vasuta06a0ac2018-04-21 18:57:28 +0200423config SYS_I2C_RCAR_I2C
424 bool "Renesas RCar I2C driver"
425 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
426 help
427 Support for Renesas RCar I2C controller.
428
Marek Vasut9e75ea42017-11-28 08:02:27 +0100429config SYS_I2C_RCAR_IIC
430 bool "Renesas RCar Gen3 IIC driver"
Marek Vasutf51155e2018-02-17 02:17:40 +0100431 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut9e75ea42017-11-28 08:02:27 +0100432 help
433 Support for Renesas RCar Gen3 IIC controller.
434
Simon Glass34374692015-08-30 16:55:39 -0600435config SYS_I2C_ROCKCHIP
436 bool "Rockchip I2C driver"
437 depends on DM_I2C
438 help
439 Add support for the Rockchip I2C driver. This is used with various
440 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham74751452019-01-13 22:13:25 +1300441 have several I2C ports and all are provided, controlled by the
Simon Glass34374692015-08-30 16:55:39 -0600442 device tree.
443
Simon Glass1174aad2015-03-06 13:19:04 -0700444config SYS_I2C_SANDBOX
445 bool "Sandbox I2C driver"
446 depends on SANDBOX && DM_I2C
447 help
448 Enable I2C support for sandbox. This is an emulation of a real I2C
449 bus. Devices can be attached to the bus using the device tree
Masahiro Yamadac77c7db2017-02-11 12:39:55 +0900450 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass1174aad2015-03-06 13:19:04 -0700451
Tom Rinide695722021-08-17 17:59:46 -0400452config SYS_I2C_SOFT
453 bool "Legacy software I2C interface"
454 help
455 Enable the legacy software defined I2C interface
456
457config SYS_I2C_SOFT_SPEED
458 int "Software I2C bus speed"
459 depends on SYS_I2C_SOFT
460 default 100000
461 help
462 Speed of the software I2C bus
463
464config SYS_I2C_SOFT_SLAVE
465 hex "Software I2C slave address"
466 depends on SYS_I2C_SOFT
467 default 0xfe
468 help
469 Slave address of the software I2C bus
470
Suneel Garapati5c2c3e82020-05-26 14:13:07 +0200471config SYS_I2C_OCTEON
472 bool "Octeon II/III/TX/TX2 I2C driver"
473 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
474 default y
475 help
476 Add support for the Marvell Octeon I2C driver. This is used with
477 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
478 chips have several I2C ports and all are provided, controlled by
479 the device tree.
480
Jaehoon Chung1d61ad92017-01-09 14:47:52 +0900481config SYS_I2C_S3C24X0
482 bool "Samsung I2C driver"
Tom Rini0283da42021-08-17 17:59:42 -0400483 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
Jaehoon Chung1d61ad92017-01-09 14:47:52 +0900484 help
485 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass1174aad2015-03-06 13:19:04 -0700486
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200487config SYS_I2C_STM32F7
488 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay2514c2d2018-03-12 10:46:10 +0100489 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200490 help
491 Enable this option to add support for STM32 I2C controller
492 introduced with STM32F7/H7 SoCs. This I2C controller supports :
493 _ Slave and master modes
494 _ Multimaster capability
495 _ Standard-mode (up to 100 kHz)
496 _ Fast-mode (up to 400 kHz)
497 _ Fast-mode Plus (up to 1 MHz)
498 _ 7-bit and 10-bit addressing mode
499 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
500 _ All 7-bit addresses acknowledge mode
501 _ General call
502 _ Programmable setup and hold times
503 _ Easy to use event management
504 _ Optional clock stretching
505 _ Software reset
506
Jassi Brar4483fba2021-06-04 18:44:48 +0900507config SYS_I2C_SYNQUACER
508 bool "Socionext SynQuacer I2C controller"
509 depends on ARCH_SYNQUACER && DM_I2C
510 help
511 Support for Socionext Synquacer I2C controller. This I2C controller
512 will be used for RTC and LS-connector on DeveloperBox.
513
Peter Robinson02253d42019-02-20 12:17:26 +0000514config SYS_I2C_TEGRA
515 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner18138ab2020-05-06 08:02:41 -0400516 depends on ARCH_TEGRA
Peter Robinson02253d42019-02-20 12:17:26 +0000517 help
518 Support for NVIDIA I2C controller available in Tegra SoCs.
519
Masahiro Yamada26f820f2015-01-13 12:44:36 +0900520config SYS_I2C_UNIPHIER
521 bool "UniPhier I2C driver"
522 depends on ARCH_UNIPHIER && DM_I2C
523 default y
524 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900525 Support for UniPhier I2C controller driver. This I2C controller
526 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900527
528config SYS_I2C_UNIPHIER_F
529 bool "UniPhier FIFO-builtin I2C driver"
530 depends on ARCH_UNIPHIER && DM_I2C
531 default y
532 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900533 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900534 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass3d1957f2015-08-03 08:19:21 -0600535
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200536config SYS_I2C_VERSATILE
537 bool "Arm Ltd Versatile I2C bus driver"
Tom Rinic6c26a02021-02-20 20:05:47 -0500538 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200539 help
540 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
541 controller is present in the development boards manufactured by Arm Ltd.
542
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200543config SYS_I2C_MVTWSI
544 bool "Marvell I2C driver"
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200545 help
546 Support for Marvell I2C controllers as used on the orion5x and
547 kirkwood SoC families.
548
Stephen Warren34f1c9f2016-08-08 11:28:27 -0600549config TEGRA186_BPMP_I2C
550 bool "Enable Tegra186 BPMP-based I2C driver"
551 depends on TEGRA186_BPMP
552 help
553 Support for Tegra I2C controllers managed by the BPMP (Boot and
554 Power Management Processor). On Tegra186, some I2C controllers are
555 directly controlled by the main CPU, whereas others are controlled
556 by the BPMP, and can only be accessed by the main CPU via IPC
557 requests to the BPMP. This driver covers the latter case.
558
Tom Rinia5752f82021-08-18 23:12:32 -0400559config SYS_I2C_SLAVE
560 hex "I2C Slave address channel (all buses)"
561 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
562 default 0xfe
563 help
564 I2C Slave address channel 0 for all buses in the legacy drivers.
565 Many boards/controllers/drivers don't support an I2C slave
566 interface so provide a default slave address for them for use in
567 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
568 defined for any board which does support a slave interface and
569 this default used otherwise.
570
571config SYS_I2C_SPEED
572 int "I2C Slave channel 0 speed (all buses)"
573 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
574 default 100000
575 help
576 I2C Slave speed channel 0 for all buses in the legacy drivers.
577
Adam Fordfc760cc2017-08-11 06:39:34 -0500578config SYS_I2C_BUS_MAX
579 int "Max I2C busses"
580 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
581 default 2 if TI816X
582 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
583 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
584 default 5 if OMAP54XX
585 help
586 Define the maximum number of available I2C buses.
587
Marek Vasutad827a52018-12-19 12:26:27 +0100588config SYS_I2C_XILINX_XIIC
589 bool "Xilinx AXI I2C driver"
590 depends on DM_I2C
591 help
592 Support for Xilinx AXI I2C controller.
593
Mario Six92164212018-01-15 11:08:11 +0100594config SYS_I2C_IHS
595 bool "gdsys IHS I2C driver"
596 depends on DM_I2C
597 help
598 Support for gdsys IHS I2C driver on FPGA bus.
599
Simon Glass3d1957f2015-08-03 08:19:21 -0600600source "drivers/i2c/muxes/Kconfig"
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900601
Simon Glass59e11eb2021-07-10 21:14:35 -0600602endif