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wdenkfe8c2802002-11-03 00:38:21 +00001/*
wdenkd4ca31c2004-01-02 14:00:00 +00002 * (C) Copyright 2000-2004
wdenkfe8c2802002-11-03 00:38:21 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
wdenkfe8c2802002-11-03 00:38:21 +000029#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
wdenk0db5bca2003-03-31 17:27:09 +000032#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
wdenkcbd8a352004-02-24 02:00:03 +000035#ifdef CONFIG_MPC5xxx
wdenk945af8d2003-07-16 21:53:01 +000036#include <mpc5xxx.h>
37#endif
wdenkfe8c2802002-11-03 00:38:21 +000038#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
wdenk281e00a2004-08-01 22:48:16 +000051#include <serial.h>
wdenkfe8c2802002-11-03 00:38:21 +000052#ifdef CFG_ALLOC_DPRAM
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050053#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +000054#include <commproc.h>
55#endif
wdenk7aa78612003-05-03 15:50:43 +000056#endif
wdenkfe8c2802002-11-03 00:38:21 +000057#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
wdenk56f94be2002-11-05 16:35:14 +000065#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
wdenk42d1f032003-10-15 23:53:47 +000068#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
wdenk1c437712004-01-16 00:30:56 +000071#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
wdenkfe8c2802002-11-03 00:38:21 +000074
75#if (CONFIG_COMMANDS & CFG_CMD_DOC)
76void doc_init (void);
77#endif
78#if defined(CONFIG_HARD_I2C) || \
79 defined(CONFIG_SOFT_I2C)
80#include <i2c.h>
81#endif
stroesebedc4972003-05-23 11:16:49 +000082#if (CONFIG_COMMANDS & CFG_CMD_NAND)
83void nand_init (void);
84#endif
wdenkfe8c2802002-11-03 00:38:21 +000085
86static char *failed = "*** failed ***\n";
87
wdenk17d704e2004-04-10 20:43:50 +000088#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
wdenkfe8c2802002-11-03 00:38:21 +000089extern flash_info_t flash_info[];
wdenk17d704e2004-04-10 20:43:50 +000090#endif
wdenkfe8c2802002-11-03 00:38:21 +000091
92#include <environment.h>
Wolfgang Denkbce84c42005-08-30 14:13:23 +020093DECLARE_GLOBAL_DATA_PTR;
wdenkfe8c2802002-11-03 00:38:21 +000094
wdenk7e780362004-04-08 22:31:29 +000095#if defined(CFG_ENV_IS_EMBEDDED)
96#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
97#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
wdenk04a85b32004-04-15 18:22:41 +000098 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
wdenk7e780362004-04-08 22:31:29 +000099 defined(CFG_ENV_IS_IN_NVRAM)
wdenkfe8c2802002-11-03 00:38:21 +0000100#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
101#else
102#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
103#endif
104
wdenk3b57fe02003-05-30 12:48:29 +0000105extern ulong __init_end;
106extern ulong _end;
wdenk3b57fe02003-05-30 12:48:29 +0000107ulong monitor_flash_len;
108
wdenk8bde7f72003-06-27 21:31:46 +0000109#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
110#include <bedbug/type.h>
111#endif
112
wdenkfe8c2802002-11-03 00:38:21 +0000113/*
114 * Begin and End of memory area for malloc(), and current "brk"
115 */
116static ulong mem_malloc_start = 0;
117static ulong mem_malloc_end = 0;
118static ulong mem_malloc_brk = 0;
119
120/************************************************************************
121 * Utilities *
122 ************************************************************************
123 */
124
125/*
126 * The Malloc area is immediately below the monitor copy in DRAM
127 */
128static void mem_malloc_init (void)
129{
wdenkfe8c2802002-11-03 00:38:21 +0000130 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
131
132 mem_malloc_end = dest_addr;
133 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
134 mem_malloc_brk = mem_malloc_start;
135
136 memset ((void *) mem_malloc_start,
137 0,
138 mem_malloc_end - mem_malloc_start);
139}
140
141void *sbrk (ptrdiff_t increment)
142{
143 ulong old = mem_malloc_brk;
144 ulong new = old + increment;
145
146 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
147 return (NULL);
148 }
149 mem_malloc_brk = new;
150 return ((void *) old);
151}
152
153char *strmhz (char *buf, long hz)
154{
155 long l, n;
156 long m;
157
158 n = hz / 1000000L;
159 l = sprintf (buf, "%ld", n);
160 m = (hz % 1000000L) / 1000L;
161 if (m != 0)
162 sprintf (buf + l, ".%03ld", m);
163 return (buf);
164}
165
wdenkfe8c2802002-11-03 00:38:21 +0000166/*
167 * All attempts to come up with a "common" initialization sequence
168 * that works for all boards and architectures failed: some of the
169 * requirements are just _too_ different. To get rid of the resulting
170 * mess of board dependend #ifdef'ed code we now make the whole
171 * initialization sequence configurable to the user.
172 *
173 * The requirements for any new initalization function is simple: it
174 * receives a pointer to the "global data" structure as it's only
175 * argument, and returns an integer return code, where 0 means
176 * "continue" and != 0 means "fatal error, hang the system".
177 */
178typedef int (init_fnc_t) (void);
179
180/************************************************************************
181 * Init Utilities *
182 ************************************************************************
183 * Some of this code should be moved into the core functions,
184 * but let's get it working (again) first...
185 */
186
187static int init_baudrate (void)
188{
wdenkfe8c2802002-11-03 00:38:21 +0000189 uchar tmp[64]; /* long enough for environment variables */
190 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
191
192 gd->baudrate = (i > 0)
193 ? (int) simple_strtoul (tmp, NULL, 10)
194 : CONFIG_BAUDRATE;
wdenkfe8c2802002-11-03 00:38:21 +0000195 return (0);
196}
197
198/***********************************************************************/
199
200static int init_func_ram (void)
201{
wdenkfe8c2802002-11-03 00:38:21 +0000202#ifdef CONFIG_BOARD_TYPES
203 int board_type = gd->board_type;
204#else
205 int board_type = 0; /* use dummy arg */
206#endif
207 puts ("DRAM: ");
208
209 if ((gd->ram_size = initdram (board_type)) > 0) {
210 print_size (gd->ram_size, "\n");
211 return (0);
212 }
213 puts (failed);
214 return (1);
215}
216
217/***********************************************************************/
218
219#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
220static int init_func_i2c (void)
221{
222 puts ("I2C: ");
223 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
224 puts ("ready\n");
225 return (0);
226}
227#endif
228
229/***********************************************************************/
230
231#if defined(CONFIG_WATCHDOG)
232static int init_func_watchdog_init (void)
233{
234 puts (" Watchdog enabled\n");
235 WATCHDOG_RESET ();
236 return (0);
237}
238# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
239
240static int init_func_watchdog_reset (void)
241{
242 WATCHDOG_RESET ();
243 return (0);
244}
245# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
246#else
247# define INIT_FUNC_WATCHDOG_INIT /* undef */
248# define INIT_FUNC_WATCHDOG_RESET /* undef */
249#endif /* CONFIG_WATCHDOG */
250
251/************************************************************************
252 * Initialization sequence *
253 ************************************************************************
254 */
255
256init_fnc_t *init_sequence[] = {
257
wdenkc837dcb2004-01-20 23:12:12 +0000258#if defined(CONFIG_BOARD_EARLY_INIT_F)
259 board_early_init_f,
wdenkfe8c2802002-11-03 00:38:21 +0000260#endif
wdenkc178d3d2004-01-24 20:25:54 +0000261
wdenk66ca92a2004-09-28 17:59:53 +0000262#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkfe8c2802002-11-03 00:38:21 +0000263 get_clocks, /* get CPU and bus clocks (etc.) */
wdenke9132ea2004-04-24 23:23:30 +0000264#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
265 adjust_sdram_tbs_8xx,
266#endif
wdenkfe8c2802002-11-03 00:38:21 +0000267 init_timebase,
wdenkc178d3d2004-01-24 20:25:54 +0000268#endif
wdenkfe8c2802002-11-03 00:38:21 +0000269#ifdef CFG_ALLOC_DPRAM
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500270#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000271 dpram_init,
272#endif
wdenk7aa78612003-05-03 15:50:43 +0000273#endif
wdenkfe8c2802002-11-03 00:38:21 +0000274#if defined(CONFIG_BOARD_POSTCLK_INIT)
275 board_postclk_init,
276#endif
277 env_init,
wdenk66ca92a2004-09-28 17:59:53 +0000278#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkc178d3d2004-01-24 20:25:54 +0000279 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
280 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
281 init_timebase,
282#endif
wdenkfe8c2802002-11-03 00:38:21 +0000283 init_baudrate,
284 serial_init,
285 console_init_f,
286 display_options,
287#if defined(CONFIG_8260)
288 prt_8260_rsr,
289 prt_8260_clks,
290#endif /* CONFIG_8260 */
Eran Libertyf046ccd2005-07-28 10:08:46 -0500291
292#if defined(CONFIG_MPC83XX)
293 print_clock_conf,
294#endif
295
wdenkfe8c2802002-11-03 00:38:21 +0000296 checkcpu,
wdenkcbd8a352004-02-24 02:00:03 +0000297#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000298 prt_mpc5xxx_clks,
wdenkcbd8a352004-02-24 02:00:03 +0000299#endif /* CONFIG_MPC5xxx */
wdenk983fda82004-10-28 00:09:35 +0000300#if defined(CONFIG_MPC8220)
301 prt_mpc8220_clks,
302#endif
wdenkfe8c2802002-11-03 00:38:21 +0000303 checkboard,
304 INIT_FUNC_WATCHDOG_INIT
wdenkc837dcb2004-01-20 23:12:12 +0000305#if defined(CONFIG_MISC_INIT_F)
wdenkfe8c2802002-11-03 00:38:21 +0000306 misc_init_f,
307#endif
308 INIT_FUNC_WATCHDOG_RESET
309#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
310 init_func_i2c,
311#endif
312#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
313 dtt_init,
314#endif
wdenk4532cb62003-04-27 22:52:51 +0000315#ifdef CONFIG_POST
316 post_init_f,
317#endif
wdenkfe8c2802002-11-03 00:38:21 +0000318 INIT_FUNC_WATCHDOG_RESET
319 init_func_ram,
320#if defined(CFG_DRAM_TEST)
321 testdram,
322#endif /* CFG_DRAM_TEST */
323 INIT_FUNC_WATCHDOG_RESET
324
325 NULL, /* Terminate this list */
326};
327
328/************************************************************************
329 *
330 * This is the first part of the initialization sequence that is
331 * implemented in C, but still running from ROM.
332 *
333 * The main purpose is to provide a (serial) console interface as
334 * soon as possible (so we can see any error messages), and to
335 * initialize the RAM so that we can relocate the monitor code to
336 * RAM.
337 *
338 * Be aware of the restrictions: global data is read-only, BSS is not
339 * initialized, and stack space is limited to a few kB.
340 *
341 ************************************************************************
342 */
343
344void board_init_f (ulong bootflag)
345{
wdenkfe8c2802002-11-03 00:38:21 +0000346 bd_t *bd;
347 ulong len, addr, addr_sp;
Wolfgang Denk7bc5ee02005-08-26 01:36:03 +0200348 ulong *s;
wdenkfe8c2802002-11-03 00:38:21 +0000349 gd_t *id;
350 init_fnc_t **init_fnc_ptr;
351#ifdef CONFIG_PRAM
352 int i;
353 ulong reg;
354 uchar tmp[64]; /* long enough for environment variables */
355#endif
356
357 /* Pointer is writable since we allocated a register for it */
358 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
wdenk93f6a672004-07-01 20:28:03 +0000359 /* compiler optimization barrier needed for GCC >= 3.4 */
360 __asm__ __volatile__("": : :"memory");
wdenkfe8c2802002-11-03 00:38:21 +0000361
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500362#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000363 /* Clear initial global data */
364 memset ((void *) gd, 0, sizeof (gd_t));
365#endif
366
367 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
368 if ((*init_fnc_ptr) () != 0) {
369 hang ();
370 }
371 }
372
373 /*
374 * Now that we have DRAM mapped and working, we can
375 * relocate the code and continue running from DRAM.
376 *
377 * Reserve memory at end of RAM for (top down in that order):
wdenk8bde7f72003-06-27 21:31:46 +0000378 * - kernel log buffer
wdenkfe8c2802002-11-03 00:38:21 +0000379 * - protected RAM
380 * - LCD framebuffer
381 * - monitor code
382 * - board info struct
383 */
wdenk3b57fe02003-05-30 12:48:29 +0000384 len = (ulong)&_end - CFG_MONITOR_BASE;
wdenkfe8c2802002-11-03 00:38:21 +0000385
386#ifndef CONFIG_VERY_BIG_RAM
387 addr = CFG_SDRAM_BASE + gd->ram_size;
388#else
389 /* only allow stack below 256M */
390 addr = CFG_SDRAM_BASE +
391 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
392#endif
393
wdenk228f29a2002-12-08 09:53:23 +0000394#ifdef CONFIG_LOGBUFFER
395 /* reserve kernel log buffer */
396 addr -= (LOGBUFF_RESERVE);
wdenk9d2b18a2003-06-28 23:11:04 +0000397 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
wdenk228f29a2002-12-08 09:53:23 +0000398#endif
399
wdenkfe8c2802002-11-03 00:38:21 +0000400#ifdef CONFIG_PRAM
401 /*
402 * reserve protected RAM
403 */
404 i = getenv_r ("pram", tmp, sizeof (tmp));
405 reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM;
406 addr -= (reg << 10); /* size is in kB */
wdenk9d2b18a2003-06-28 23:11:04 +0000407 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000408#endif /* CONFIG_PRAM */
409
410 /* round down to next 4 kB limit */
411 addr &= ~(4096 - 1);
wdenk9d2b18a2003-06-28 23:11:04 +0000412 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
wdenkfe8c2802002-11-03 00:38:21 +0000413
414#ifdef CONFIG_LCD
415 /* reserve memory for LCD display (always full pages) */
416 addr = lcd_setmem (addr);
417 gd->fb_base = addr;
418#endif /* CONFIG_LCD */
419
420#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
421 /* reserve memory for video display (always full pages) */
422 addr = video_setmem (addr);
423 gd->fb_base = addr;
424#endif /* CONFIG_VIDEO */
425
426 /*
427 * reserve memory for U-Boot code, data & bss
wdenk682011f2003-06-03 23:54:09 +0000428 * round down to next 4 kB limit
wdenkfe8c2802002-11-03 00:38:21 +0000429 */
430 addr -= len;
wdenk682011f2003-06-03 23:54:09 +0000431 addr &= ~(4096 - 1);
Wolfgang Denk7d314992005-10-05 00:00:54 +0200432#ifdef CONFIG_E500
433 /* round down to next 64 kB limit so that IVPR stays aligned */
434 addr &= ~(65536 - 1);
435#endif
wdenkfe8c2802002-11-03 00:38:21 +0000436
wdenk9d2b18a2003-06-28 23:11:04 +0000437 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000438
wdenkc7de8292002-11-19 11:04:11 +0000439#ifdef CONFIG_AMIGAONEG3SE
440 gd->relocaddr = addr;
441#endif
442
wdenkfe8c2802002-11-03 00:38:21 +0000443 /*
444 * reserve memory for malloc() arena
445 */
446 addr_sp = addr - TOTAL_MALLOC_LEN;
wdenk9d2b18a2003-06-28 23:11:04 +0000447 debug ("Reserving %dk for malloc() at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000448 TOTAL_MALLOC_LEN >> 10, addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000449
450 /*
451 * (permanently) allocate a Board Info struct
452 * and a permanent copy of the "global" data
453 */
454 addr_sp -= sizeof (bd_t);
455 bd = (bd_t *) addr_sp;
456 gd->bd = bd;
wdenk9d2b18a2003-06-28 23:11:04 +0000457 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000458 sizeof (bd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000459 addr_sp -= sizeof (gd_t);
460 id = (gd_t *) addr_sp;
wdenk9d2b18a2003-06-28 23:11:04 +0000461 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000462 sizeof (gd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000463
464 /*
465 * Finally, we set up a new (bigger) stack.
466 *
467 * Leave some safety gap for SP, force alignment on 16 byte boundary
468 * Clear initial stack frame
469 */
470 addr_sp -= 16;
471 addr_sp &= ~0xF;
Wolfgang Denk7bc5ee02005-08-26 01:36:03 +0200472 s = (ulong *)addr_sp;
473 *s-- = 0;
474 *s-- = 0;
475 addr_sp = (ulong)s;
wdenk9d2b18a2003-06-28 23:11:04 +0000476 debug ("Stack Pointer at: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000477
478 /*
479 * Save local variables to board info struct
480 */
481
wdenkc837dcb2004-01-20 23:12:12 +0000482 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000483 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
484
485#ifdef CONFIG_IP860
wdenkc837dcb2004-01-20 23:12:12 +0000486 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
487 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
wdenk983fda82004-10-28 00:09:35 +0000488#elif defined CONFIG_MPC8220
489 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
490 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000491#else
wdenkc837dcb2004-01-20 23:12:12 +0000492 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
493 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000494#endif
495
wdenk42d1f032003-10-15 23:53:47 +0000496#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
497 defined(CONFIG_E500)
wdenkfe8c2802002-11-03 00:38:21 +0000498 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
499#endif
wdenkcbd8a352004-02-24 02:00:03 +0000500#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000501 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
502#endif
Eran Libertyf046ccd2005-07-28 10:08:46 -0500503#if defined(CONFIG_MPC83XX)
504 bd->bi_immrbar = CFG_IMMRBAR;
505#endif
wdenk983fda82004-10-28 00:09:35 +0000506#if defined(CONFIG_MPC8220)
507 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
508 bd->bi_inpfreq = gd->inp_clk;
509 bd->bi_pcifreq = gd->pci_clk;
510 bd->bi_vcofreq = gd->vco_clk;
511 bd->bi_pevfreq = gd->pev_clk;
512 bd->bi_flbfreq = gd->flb_clk;
513
514 /* store bootparam to sram (backward compatible), here? */
515 {
wdenk9d5028c2004-11-21 00:06:33 +0000516 u32 *sram = (u32 *)CFG_SRAM_BASE;
517 *sram++ = gd->ram_size;
518 *sram++ = gd->bus_clk;
519 *sram++ = gd->inp_clk;
520 *sram++ = gd->cpu_clk;
521 *sram++ = gd->vco_clk;
522 *sram++ = gd->flb_clk;
523 *sram++ = 0xb8c3ba11; /* boot signature */
wdenk983fda82004-10-28 00:09:35 +0000524 }
525#endif
wdenkfe8c2802002-11-03 00:38:21 +0000526
527 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
528
529 WATCHDOG_RESET ();
530 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
531 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500532#if defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000533 bd->bi_cpmfreq = gd->cpm_clk;
534 bd->bi_brgfreq = gd->brg_clk;
535 bd->bi_sccfreq = gd->scc_clk;
536 bd->bi_vco = gd->vco_out;
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500537#endif /* CONFIG_CPM2 */
wdenkcbd8a352004-02-24 02:00:03 +0000538#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000539 bd->bi_ipbfreq = gd->ipb_clk;
540 bd->bi_pcifreq = gd->pci_clk;
wdenkcbd8a352004-02-24 02:00:03 +0000541#endif /* CONFIG_MPC5xxx */
wdenkfe8c2802002-11-03 00:38:21 +0000542 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
543
544#ifdef CFG_EXTBDINFO
545 strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
546 strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
547
548 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
549 bd->bi_plb_busfreq = gd->bus_clk;
Stefan Roese846b0dd2005-08-08 12:42:22 +0200550#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
wdenkfe8c2802002-11-03 00:38:21 +0000551 bd->bi_pci_busfreq = get_PCI_freq ();
wdenk109c0e32004-03-23 21:43:07 +0000552 bd->bi_opbfreq = get_OPB_freq ();
wdenk028ab6b2004-02-23 23:54:43 +0000553#elif defined(CONFIG_XILINX_ML300)
554 bd->bi_pci_busfreq = get_PCI_freq ();
wdenkfe8c2802002-11-03 00:38:21 +0000555#endif
556#endif
557
wdenk9d2b18a2003-06-28 23:11:04 +0000558 debug ("New Stack Pointer is: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000559
560 WATCHDOG_RESET ();
561
562#ifdef CONFIG_POST
563 post_bootmode_init();
wdenk6dff5522003-07-15 07:45:49 +0000564 post_run (NULL, POST_ROM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +0000565#endif
566
567 WATCHDOG_RESET();
568
wdenk27b207f2003-07-24 23:38:38 +0000569 memcpy (id, (void *)gd, sizeof (gd_t));
wdenkfe8c2802002-11-03 00:38:21 +0000570
571 relocate_code (addr_sp, id, addr);
572
573 /* NOTREACHED - relocate_code() does not return */
574}
575
576
577/************************************************************************
578 *
579 * This is the next part if the initialization sequence: we are now
580 * running from RAM and have a "normal" C environment, i. e. global
581 * data can be written, BSS has been cleared, the stack size in not
582 * that critical any more, etc.
583 *
584 ************************************************************************
585 */
586
587void board_init_r (gd_t *id, ulong dest_addr)
588{
wdenkfe8c2802002-11-03 00:38:21 +0000589 cmd_tbl_t *cmdtp;
590 char *s, *e;
591 bd_t *bd;
592 int i;
593 extern void malloc_bin_reloc (void);
594#ifndef CFG_ENV_IS_NOWHERE
595 extern char * env_name_spec;
596#endif
597
598#ifndef CFG_NO_FLASH
599 ulong flash_size;
600#endif
601
602 gd = id; /* initialize RAM version of global data */
603 bd = gd->bd;
604
605 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
606
wdenk9d2b18a2003-06-28 23:11:04 +0000607 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000608
609 WATCHDOG_RESET ();
610
wdenkc837dcb2004-01-20 23:12:12 +0000611#if defined(CONFIG_BOARD_EARLY_INIT_R)
612 board_early_init_r ();
613#endif
614
wdenkfe8c2802002-11-03 00:38:21 +0000615 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
wdenk8bde7f72003-06-27 21:31:46 +0000616
wdenk3b57fe02003-05-30 12:48:29 +0000617 monitor_flash_len = (ulong)&__init_end - dest_addr;
wdenkfe8c2802002-11-03 00:38:21 +0000618
wdenk281e00a2004-08-01 22:48:16 +0000619#ifdef CONFIG_SERIAL_MULTI
620 serial_initialize();
621#endif
622
wdenkfe8c2802002-11-03 00:38:21 +0000623 /*
624 * We have to relocate the command table manually
625 */
wdenk8bde7f72003-06-27 21:31:46 +0000626 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
wdenkfe8c2802002-11-03 00:38:21 +0000627 ulong addr;
wdenkfe8c2802002-11-03 00:38:21 +0000628 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
629#if 0
630 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
631 cmdtp->name, (ulong) (cmdtp->cmd), addr);
632#endif
633 cmdtp->cmd =
634 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
635
636 addr = (ulong)(cmdtp->name) + gd->reloc_off;
637 cmdtp->name = (char *)addr;
638
639 if (cmdtp->usage) {
640 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
641 cmdtp->usage = (char *)addr;
642 }
643#ifdef CFG_LONGHELP
644 if (cmdtp->help) {
645 addr = (ulong)(cmdtp->help) + gd->reloc_off;
646 cmdtp->help = (char *)addr;
647 }
648#endif
649 }
650 /* there are some other pointer constants we must deal with */
651#ifndef CFG_ENV_IS_NOWHERE
652 env_name_spec += gd->reloc_off;
653#endif
654
655 WATCHDOG_RESET ();
656
wdenk56f94be2002-11-05 16:35:14 +0000657#ifdef CONFIG_LOGBUFFER
wdenk228f29a2002-12-08 09:53:23 +0000658 logbuff_init_ptrs ();
wdenk56f94be2002-11-05 16:35:14 +0000659#endif
wdenkfe8c2802002-11-03 00:38:21 +0000660#ifdef CONFIG_POST
wdenk228f29a2002-12-08 09:53:23 +0000661 post_output_backlog ();
wdenkfe8c2802002-11-03 00:38:21 +0000662 post_reloc ();
663#endif
664
665 WATCHDOG_RESET();
666
667#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
668 icache_enable (); /* it's time to enable the instruction cache */
669#endif
670
wdenk42d1f032003-10-15 23:53:47 +0000671#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
wdenkc837dcb2004-01-20 23:12:12 +0000672 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
wdenk42d1f032003-10-15 23:53:47 +0000673#endif
674
wdenk3bac3512003-03-12 10:41:04 +0000675#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000676 /*
wdenk3bac3512003-03-12 10:41:04 +0000677 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
678 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
679 * bridge there.
wdenkfe8c2802002-11-03 00:38:21 +0000680 */
681 pci_init ();
wdenk3bac3512003-03-12 10:41:04 +0000682#endif
683#if defined(CONFIG_BAB7xx)
wdenkfe8c2802002-11-03 00:38:21 +0000684 /*
685 * Initialise the ISA bridge
686 */
687 initialise_w83c553f ();
688#endif
689
690 asm ("sync ; isync");
691
692 /*
693 * Setup trap handlers
694 */
695 trap_init (dest_addr);
696
697#if !defined(CFG_NO_FLASH)
698 puts ("FLASH: ");
699
700 if ((flash_size = flash_init ()) > 0) {
wdenk0cb61d72003-08-30 00:05:50 +0000701# ifdef CFG_FLASH_CHECKSUM
wdenkfe8c2802002-11-03 00:38:21 +0000702 print_size (flash_size, "");
703 /*
704 * Compute and print flash CRC if flashchecksum is set to 'y'
705 *
706 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
707 */
708 s = getenv ("flashchecksum");
709 if (s && (*s == 'y')) {
710 printf (" CRC: %08lX",
wdenk7e780362004-04-08 22:31:29 +0000711 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
712 );
wdenkfe8c2802002-11-03 00:38:21 +0000713 }
714 putc ('\n');
wdenk0cb61d72003-08-30 00:05:50 +0000715# else /* !CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000716 print_size (flash_size, "\n");
wdenk0cb61d72003-08-30 00:05:50 +0000717# endif /* CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000718 } else {
719 puts (failed);
720 hang ();
721 }
722
723 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
724 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
wdenk7e780362004-04-08 22:31:29 +0000725# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
726 /* flash mapped at end of memory map */
727 bd->bi_flashoffset = TEXT_BASE + flash_size;
wdenk0cb61d72003-08-30 00:05:50 +0000728# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
wdenk3b57fe02003-05-30 12:48:29 +0000729 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
wdenk0cb61d72003-08-30 00:05:50 +0000730# else
wdenkfe8c2802002-11-03 00:38:21 +0000731 bd->bi_flashoffset = 0;
wdenk0cb61d72003-08-30 00:05:50 +0000732# endif
733#else /* CFG_NO_FLASH */
wdenkfe8c2802002-11-03 00:38:21 +0000734
735 bd->bi_flashsize = 0;
736 bd->bi_flashstart = 0;
737 bd->bi_flashoffset = 0;
738#endif /* !CFG_NO_FLASH */
739
740 WATCHDOG_RESET ();
741
742 /* initialize higher level parts of CPU like time base and timers */
743 cpu_init_r ();
744
745 WATCHDOG_RESET ();
746
747 /* initialize malloc() area */
748 mem_malloc_init ();
749 malloc_bin_reloc ();
750
751#ifdef CONFIG_SPI
752# if !defined(CFG_ENV_IS_IN_EEPROM)
753 spi_init_f ();
754# endif
755 spi_init_r ();
756#endif
757
758 /* relocate environment function pointers etc. */
759 env_relocate ();
760
761 /*
762 * Fill in missing fields of bd_info.
wdenk8bde7f72003-06-27 21:31:46 +0000763 * We do this here, where we have "normal" access to the
764 * environment; we used to do this still running from ROM,
765 * where had to use getenv_r(), which can be pretty slow when
766 * the environment is in EEPROM.
wdenkfe8c2802002-11-03 00:38:21 +0000767 */
wdenk7abf0c52004-04-18 21:45:42 +0000768
769#if defined(CFG_EXTBDINFO)
770#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
771#if defined(CONFIG_I2CFAST)
772 /*
773 * set bi_iic_fast for linux taking environment variable
774 * "i2cfast" into account
775 */
776 {
777 char *s = getenv ("i2cfast");
778 if (s && ((*s == 'y') || (*s == 'Y'))) {
779 bd->bi_iic_fast[0] = 1;
780 bd->bi_iic_fast[1] = 1;
781 } else {
782 bd->bi_iic_fast[0] = 0;
783 bd->bi_iic_fast[1] = 0;
784 }
785 }
786#else
787 bd->bi_iic_fast[0] = 0;
788 bd->bi_iic_fast[1] = 0;
789#endif /* CONFIG_I2CFAST */
790#endif /* CONFIG_405GP, CONFIG_405EP */
791#endif /* CFG_EXTBDINFO */
792
wdenkfe8c2802002-11-03 00:38:21 +0000793 s = getenv ("ethaddr");
794#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
795 if (s == NULL)
796 board_get_enetaddr (bd->bi_enetaddr);
797 else
798#endif
799 for (i = 0; i < 6; ++i) {
800 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
801 if (s)
802 s = (*e) ? e + 1 : e;
803 }
804#ifdef CONFIG_HERMES
805 if ((gd->board_type >> 16) == 2)
806 bd->bi_ethspeed = gd->board_type & 0xFFFF;
807 else
808 bd->bi_ethspeed = 0xFFFF;
809#endif
810
811#ifdef CONFIG_NX823
812 load_sernum_ethaddr ();
813#endif
814
wdenke2ffd592004-12-31 09:32:47 +0000815#ifdef CONFIG_HAS_ETH1
wdenkfe8c2802002-11-03 00:38:21 +0000816 /* handle the 2nd ethernet address */
817
818 s = getenv ("eth1addr");
819
820 for (i = 0; i < 6; ++i) {
821 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
822 if (s)
823 s = (*e) ? e + 1 : e;
824 }
825#endif
wdenke2ffd592004-12-31 09:32:47 +0000826#ifdef CONFIG_HAS_ETH2
wdenkfe8c2802002-11-03 00:38:21 +0000827 /* handle the 3rd ethernet address */
828
829 s = getenv ("eth2addr");
Stefan Roeseb79316f2005-08-15 12:31:23 +0200830#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenkba56f622004-02-06 23:19:44 +0000831 if (s == NULL)
832 board_get_enetaddr(bd->bi_enet2addr);
833 else
834#endif
wdenkfe8c2802002-11-03 00:38:21 +0000835 for (i = 0; i < 6; ++i) {
836 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
837 if (s)
838 s = (*e) ? e + 1 : e;
839 }
840#endif
841
wdenke2ffd592004-12-31 09:32:47 +0000842#ifdef CONFIG_HAS_ETH3
wdenkba56f622004-02-06 23:19:44 +0000843 /* handle 4th ethernet address */
844 s = getenv("eth3addr");
Stefan Roeseb79316f2005-08-15 12:31:23 +0200845#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenkba56f622004-02-06 23:19:44 +0000846 if (s == NULL)
847 board_get_enetaddr(bd->bi_enet3addr);
848 else
849#endif
850 for (i = 0; i < 6; ++i) {
851 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
852 if (s)
853 s = (*e) ? e + 1 : e;
854 }
855#endif
wdenkfe8c2802002-11-03 00:38:21 +0000856
857#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
wdenk02b11f82004-05-12 22:54:36 +0000858 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
wdenkfe8c2802002-11-03 00:38:21 +0000859 load_sernum_ethaddr ();
860#endif
861 /* IP Address */
862 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
863
864 WATCHDOG_RESET ();
865
wdenk979bdbc2004-06-01 21:08:17 +0000866#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000867 /*
868 * Do pci configuration
869 */
870 pci_init ();
871#endif
872
873/** leave this here (after malloc(), environment and PCI are working) **/
874 /* Initialize devices */
875 devices_init ();
876
wdenk27b207f2003-07-24 23:38:38 +0000877 /* Initialize the jump table for applications */
878 jumptable_init ();
wdenkfe8c2802002-11-03 00:38:21 +0000879
880 /* Initialize the console (after the relocation and devices init) */
881 console_init_r ();
wdenkfe8c2802002-11-03 00:38:21 +0000882
883#if defined(CONFIG_CCM) || \
884 defined(CONFIG_COGENT) || \
885 defined(CONFIG_CPCI405) || \
886 defined(CONFIG_EVB64260) || \
wdenk56f94be2002-11-05 16:35:14 +0000887 defined(CONFIG_KUP4K) || \
wdenk0608e042004-03-25 19:29:38 +0000888 defined(CONFIG_KUP4X) || \
wdenkfe8c2802002-11-03 00:38:21 +0000889 defined(CONFIG_LWMON) || \
890 defined(CONFIG_PCU_E) || \
891 defined(CONFIG_W7O) || \
892 defined(CONFIG_MISC_INIT_R)
893 /* miscellaneous platform dependent initialisations */
894 misc_init_r ();
895#endif
896
897#ifdef CONFIG_HERMES
898 if (bd->bi_ethspeed != 0xFFFF)
899 hermes_start_lxt980 ((int) bd->bi_ethspeed);
900#endif
901
902#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
903 defined(CONFIG_CCM) || \
wdenk3bac3512003-03-12 10:41:04 +0000904 defined(CONFIG_ELPT860) || \
wdenkfe8c2802002-11-03 00:38:21 +0000905 defined(CONFIG_EP8260) || \
906 defined(CONFIG_IP860) || \
907 defined(CONFIG_IVML24) || \
908 defined(CONFIG_IVMS8) || \
wdenkfe8c2802002-11-03 00:38:21 +0000909 defined(CONFIG_MPC8260ADS) || \
wdenk5d232d02003-05-22 22:52:13 +0000910 defined(CONFIG_MPC8266ADS) || \
wdenk42d1f032003-10-15 23:53:47 +0000911 defined(CONFIG_MPC8560ADS) || \
wdenkfe8c2802002-11-03 00:38:21 +0000912 defined(CONFIG_PCU_E) || \
913 defined(CONFIG_RPXSUPER) || \
wdenk7abf0c52004-04-18 21:45:42 +0000914 defined(CONFIG_STXGP3) || \
wdenkba91e262005-05-30 23:55:42 +0000915 defined(CONFIG_SPD823TS) || \
916 defined(CONFIG_RESET_PHY_R) )
wdenkfe8c2802002-11-03 00:38:21 +0000917
918 WATCHDOG_RESET ();
wdenk9d2b18a2003-06-28 23:11:04 +0000919 debug ("Reset Ethernet PHY\n");
wdenkfe8c2802002-11-03 00:38:21 +0000920 reset_phy ();
921#endif
922
923#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
924 WATCHDOG_RESET ();
925 puts ("KGDB: ");
926 kgdb_init ();
927#endif
928
wdenk9d2b18a2003-06-28 23:11:04 +0000929 debug ("U-Boot relocated to %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000930
931 /*
932 * Enable Interrupts
933 */
934 interrupt_init ();
935
936 /* Must happen after interrupts are initialized since
937 * an irq handler gets installed
938 */
wdenk42dfe7a2004-03-14 22:25:36 +0000939#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
wdenkfe8c2802002-11-03 00:38:21 +0000940 serial_buffered_init();
941#endif
942
943#ifdef CONFIG_STATUS_LED
944 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
945#endif
946
947 udelay (20);
948
949 set_timer (0);
950
wdenkfe8c2802002-11-03 00:38:21 +0000951 /* Initialize from environment */
952 if ((s = getenv ("loadaddr")) != NULL) {
953 load_addr = simple_strtoul (s, NULL, 16);
954 }
955#if (CONFIG_COMMANDS & CFG_CMD_NET)
956 if ((s = getenv ("bootfile")) != NULL) {
957 copy_filename (BootFile, s, sizeof (BootFile));
958 }
959#endif /* CFG_CMD_NET */
960
961 WATCHDOG_RESET ();
962
963#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
964 WATCHDOG_RESET ();
965 puts ("SCSI: ");
966 scsi_init ();
967#endif
968
969#if (CONFIG_COMMANDS & CFG_CMD_DOC)
970 WATCHDOG_RESET ();
971 puts ("DOC: ");
972 doc_init ();
973#endif
974
stroesebedc4972003-05-23 11:16:49 +0000975#if (CONFIG_COMMANDS & CFG_CMD_NAND)
976 WATCHDOG_RESET ();
stroeseb7eaad82004-12-16 17:53:17 +0000977 puts ("NAND: ");
stroesebedc4972003-05-23 11:16:49 +0000978 nand_init(); /* go init the NAND */
979#endif
980
wdenkfe8c2802002-11-03 00:38:21 +0000981#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
982 WATCHDOG_RESET ();
983 puts ("Net: ");
984 eth_initialize (bd);
985#endif
986
987#ifdef CONFIG_POST
wdenk6dff5522003-07-15 07:45:49 +0000988 post_run (NULL, POST_RAM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +0000989#endif
990
991#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
992 WATCHDOG_RESET ();
993 puts ("PCMCIA:");
994 pcmcia_init ();
995#endif
996
997#if (CONFIG_COMMANDS & CFG_CMD_IDE)
998 WATCHDOG_RESET ();
999# ifdef CONFIG_IDE_8xx_PCCARD
1000 puts ("PCMCIA:");
1001# else
1002 puts ("IDE: ");
1003#endif
1004 ide_init ();
1005#endif /* CFG_CMD_IDE */
1006
1007#ifdef CONFIG_LAST_STAGE_INIT
1008 WATCHDOG_RESET ();
1009 /*
1010 * Some parts can be only initialized if all others (like
1011 * Interrupts) are up and running (i.e. the PC-style ISA
1012 * keyboard).
1013 */
1014 last_stage_init ();
1015#endif
1016
1017#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1018 WATCHDOG_RESET ();
1019 bedbug_init ();
1020#endif
1021
wdenk228f29a2002-12-08 09:53:23 +00001022#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
wdenkfe8c2802002-11-03 00:38:21 +00001023 /*
1024 * Export available size of memory for Linux,
1025 * taking into account the protected RAM at top of memory
1026 */
1027 {
1028 ulong pram;
wdenkfe8c2802002-11-03 00:38:21 +00001029 uchar memsz[32];
wdenk228f29a2002-12-08 09:53:23 +00001030#ifdef CONFIG_PRAM
1031 char *s;
wdenkfe8c2802002-11-03 00:38:21 +00001032
1033 if ((s = getenv ("pram")) != NULL) {
1034 pram = simple_strtoul (s, NULL, 10);
1035 } else {
1036 pram = CONFIG_PRAM;
1037 }
wdenk228f29a2002-12-08 09:53:23 +00001038#else
1039 pram=0;
1040#endif
1041#ifdef CONFIG_LOGBUFFER
1042 /* Also take the logbuffer into account (pram is in kB) */
1043 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1044#endif
wdenkfe8c2802002-11-03 00:38:21 +00001045 sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1046 setenv ("mem", memsz);
1047 }
1048#endif
1049
wdenk1c437712004-01-16 00:30:56 +00001050#ifdef CONFIG_PS2KBD
1051 puts ("PS/2: ");
1052 kbd_init();
1053#endif
1054
wdenk4532cb62003-04-27 22:52:51 +00001055#ifdef CONFIG_MODEM_SUPPORT
1056 {
1057 extern int do_mdm_init;
1058 do_mdm_init = gd->do_mdm_init;
1059 }
1060#endif
1061
wdenkfe8c2802002-11-03 00:38:21 +00001062 /* Initialization complete - start the monitor */
1063
1064 /* main_loop() can return to retry autoboot, if so just run it again. */
1065 for (;;) {
1066 WATCHDOG_RESET ();
1067 main_loop ();
1068 }
1069
1070 /* NOTREACHED - no way out of command loop except booting */
1071}
1072
1073void hang (void)
1074{
1075 puts ("### ERROR ### Please RESET the board ###\n");
wdenk63e73c92004-02-23 22:22:28 +00001076#ifdef CONFIG_SHOW_BOOT_PROGRESS
1077 show_boot_progress(-30);
1078#endif
wdenkfe8c2802002-11-03 00:38:21 +00001079 for (;;);
1080}
1081
wdenk4532cb62003-04-27 22:52:51 +00001082#ifdef CONFIG_MODEM_SUPPORT
1083/* called from main loop (common/main.c) */
1084extern void dbg(const char *fmt, ...);
1085int mdm_init (void)
1086{
1087 char env_str[16];
1088 char *init_str;
1089 int i;
1090 extern char console_buffer[];
1091 static inline void mdm_readline(char *buf, int bufsiz);
1092 extern void enable_putc(void);
1093 extern int hwflow_onoff(int);
1094
1095 enable_putc(); /* enable serial_putc() */
1096
1097#ifdef CONFIG_HWFLOW
1098 init_str = getenv("mdm_flow_control");
1099 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1100 hwflow_onoff (1);
1101 else
1102 hwflow_onoff(-1);
1103#endif
1104
1105 for (i = 1;;i++) {
1106 sprintf(env_str, "mdm_init%d", i);
1107 if ((init_str = getenv(env_str)) != NULL) {
1108 serial_puts(init_str);
1109 serial_puts("\n");
1110 for(;;) {
1111 mdm_readline(console_buffer, CFG_CBSIZE);
1112 dbg("ini%d: [%s]", i, console_buffer);
1113
1114 if ((strcmp(console_buffer, "OK") == 0) ||
1115 (strcmp(console_buffer, "ERROR") == 0)) {
1116 dbg("ini%d: cmd done", i);
1117 break;
1118 } else /* in case we are originating call ... */
1119 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1120 dbg("ini%d: connect", i);
1121 return 0;
1122 }
1123 }
1124 } else
1125 break; /* no init string - stop modem init */
1126
1127 udelay(100000);
1128 }
1129
1130 udelay(100000);
1131
1132 /* final stage - wait for connect */
1133 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1134 message from modem */
1135 mdm_readline(console_buffer, CFG_CBSIZE);
1136 dbg("ini_f: [%s]", console_buffer);
1137 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1138 dbg("ini_f: connected");
1139 return 0;
1140 }
1141 }
1142
1143 return 0;
1144}
1145
1146/* 'inline' - We have to do it fast */
1147static inline void mdm_readline(char *buf, int bufsiz)
1148{
1149 char c;
1150 char *p;
1151 int n;
1152
1153 n = 0;
1154 p = buf;
1155 for(;;) {
1156 c = serial_getc();
1157
1158 /* dbg("(%c)", c); */
1159
1160 switch(c) {
1161 case '\r':
1162 break;
1163 case '\n':
1164 *p = '\0';
1165 return;
1166
1167 default:
1168 if(n++ > bufsiz) {
1169 *p = '\0';
1170 return; /* sanity check */
1171 }
1172 *p = c;
1173 p++;
1174 break;
1175 }
1176 }
1177}
1178#endif
1179
wdenkfe8c2802002-11-03 00:38:21 +00001180#if 0 /* We could use plain global data, but the resulting code is bigger */
1181/*
1182 * Pointer to initial global data area
1183 *
1184 * Here we initialize it.
1185 */
1186#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1187#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1188DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1189#endif /* 0 */
1190
1191/************************************************************************/