blob: 6eca8db6d5ff5c65a61c64f8b56b9dde290ad6e9 [file] [log] [blame]
Masahiro Yamada3491ba62014-08-31 07:11:01 +09001if ARCH_DAVINCI
2
3choice
4 prompt "DaVinci board select"
Joe Hershbergera26cd042015-05-12 14:46:23 -05005 optional
Masahiro Yamada3491ba62014-08-31 07:11:01 +09006
Masahiro Yamada3491ba62014-08-31 07:11:01 +09007config TARGET_DA850EVM
8 bool "DA850 EVM board"
Adam Ford6aa4ad82018-01-11 08:20:27 -06009 select MACH_DAVINCI_DA850_EVM
10 select SOC_DA850
Masahiro Yamada02627352014-10-20 17:45:56 +090011 select SUPPORT_SPL
Masahiro Yamada3491ba62014-08-31 07:11:01 +090012
Simon Glass67619462015-08-30 19:18:59 -060013config TARGET_OMAPL138_LCDK
14 bool "OMAPL138 LCDK"
Tom Rini2e879802018-01-31 15:34:49 -050015 select SOC_DA8XX
Simon Glass67619462015-08-30 19:18:59 -060016 select SUPPORT_SPL
Bartosz Golaszewski598d9bc2019-11-14 16:10:30 +010017 select SPL_BOARD_INIT
Masahiro Yamada3491ba62014-08-31 07:11:01 +090018
David Lechner2ac07f72016-02-26 00:46:07 -060019config TARGET_LEGOEV3
20 bool "LEGO MINDSTORMS EV3"
Adam Ford6aa4ad82018-01-11 08:20:27 -060021 select MACH_DAVINCI_DA850_EVM
22 select SOC_DA850
David Lechner2ac07f72016-02-26 00:46:07 -060023
Masahiro Yamada3491ba62014-08-31 07:11:01 +090024endchoice
25
Masahiro Yamada3491ba62014-08-31 07:11:01 +090026config SYS_SOC
Masahiro Yamada3491ba62014-08-31 07:11:01 +090027 default "davinci"
28
Adam Ford6aa4ad82018-01-11 08:20:27 -060029config DA850_LOWLEVEL
30 bool "Enable Lowlevel DA850 initialization"
31 depends on SOC_DA850
32
Fabien Parentf519b362016-11-29 14:23:36 +010033config SYS_DA850_PLL_INIT
34 bool
35
Fabien Parentb31bf372016-11-29 14:23:37 +010036config SYS_DA850_DDR_INIT
37 bool
38
Adam Ford6aa4ad82018-01-11 08:20:27 -060039config SOC_DA850
40 bool
41 select SOC_DA8XX
Adam Ford6aa4ad82018-01-11 08:20:27 -060042
43config SOC_DA8XX
44 bool
Lokesh Vutla891ab742018-03-16 14:22:12 +053045 select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
Michal Simek58008cb2018-07-23 15:55:15 +020046 select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
Adam Ford6aa4ad82018-01-11 08:20:27 -060047
48config MACH_DAVINCI_DA850_EVM
49 bool
50
Adam Ford76e22222018-01-23 04:04:28 -060051if SYS_DA850_PLL_INIT
52comment "DA850 PLL Initialization Parameters"
53
54config SYS_DV_CLKMODE
55 int "PLLCTL Clock Mode"
Tom Rini2e879802018-01-31 15:34:49 -050056 default 0
Adam Ford76e22222018-01-23 04:04:28 -060057 help
58 Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
59
60config SYS_DA850_PLL0_POSTDIV
61 int "PLLC0 PLL Post-Divider"
Tom Rini2e879802018-01-31 15:34:49 -050062 default 1
Adam Ford76e22222018-01-23 04:04:28 -060063 help
64 Value written to PLLC0 PLL Post-Divider Control Register
65
66config SYS_DA850_PLL0_PLLDIV1
67 hex "PLLC0 Divider 1"
Tom Rini2e879802018-01-31 15:34:49 -050068 default 0x8000
Adam Ford76e22222018-01-23 04:04:28 -060069 help
70 Value written to PLLC0 Divider 1 register
71
72config SYS_DA850_PLL0_PLLDIV2
73 hex "PLLC0 Divider 2"
Tom Rini2e879802018-01-31 15:34:49 -050074 default 0x8001
Adam Ford76e22222018-01-23 04:04:28 -060075 help
76 Value written to PLLC0 Divider 2 register
77
78config SYS_DA850_PLL0_PLLDIV3
79 hex "PLLC0 Divider 3"
Tom Rini2e879802018-01-31 15:34:49 -050080 default 0x8002
Adam Ford76e22222018-01-23 04:04:28 -060081 help
82 Value written to PLLC0 Divider 3 register
83
84config SYS_DA850_PLL0_PLLDIV4
85 hex "PLLC0 Divider 4"
Tom Rini2e879802018-01-31 15:34:49 -050086 default 0x8003
Adam Ford76e22222018-01-23 04:04:28 -060087 help
88 Value written to PLLC0 Divider 4 register
89
90config SYS_DA850_PLL0_PLLDIV5
91 hex "PLLC0 Divider 5"
Tom Rini2e879802018-01-31 15:34:49 -050092 default 0x8002
Adam Ford76e22222018-01-23 04:04:28 -060093 help
94 Value written to PLLC0 Divider 5 register
95
96config SYS_DA850_PLL0_PLLDIV6
97 hex "PLLC0 Divider 6"
Tom Rini2e879802018-01-31 15:34:49 -050098 default 0x8000
Adam Ford76e22222018-01-23 04:04:28 -060099 help
100 Value written to PLLC0 Divider 6 register
101
102config SYS_DA850_PLL0_PLLDIV7
103 hex "PLLC0 Divider 7"
Tom Rini2e879802018-01-31 15:34:49 -0500104 default 0x8005
Adam Ford76e22222018-01-23 04:04:28 -0600105 help
106 Value written to PLLC0 Divider 7 register
107
108config SYS_DA850_PLL1_POSTDIV
109 hex "PLLC1 PLL Post-Divider"
Tom Rini2e879802018-01-31 15:34:49 -0500110 default 1
Adam Ford76e22222018-01-23 04:04:28 -0600111 help
112 Value written to PLLC1 PLL Post-Divider Control Register
113
114config SYS_DA850_PLL1_PLLDIV1
115 hex "PLLC1 Divider 2"
Tom Rini2e879802018-01-31 15:34:49 -0500116 default 0x8000
Adam Ford76e22222018-01-23 04:04:28 -0600117 help
118 Value written to PLLC1 Divider 1 register
119
120config SYS_DA850_PLL1_PLLDIV2
121 hex "PLLC1 Divider 2"
Tom Rini2e879802018-01-31 15:34:49 -0500122 default 0x8001
Adam Ford76e22222018-01-23 04:04:28 -0600123 help
124 Value written to PLLC1 Divider 2 register
125
126config SYS_DA850_PLL1_PLLDIV3
127 hex "PLLC1 Divider 3"
Tom Rini2e879802018-01-31 15:34:49 -0500128 default 0x8002
Adam Ford76e22222018-01-23 04:04:28 -0600129 help
130 Value written to PLLC1 Divider 3 register
131
132endif
133
Masahiro Yamada3491ba62014-08-31 07:11:01 +0900134source "board/davinci/da8xxevm/Kconfig"
David Lechner2ac07f72016-02-26 00:46:07 -0600135source "board/lego/ev3/Kconfig"
Masahiro Yamada3491ba62014-08-31 07:11:01 +0900136
Philipp Tomsichb5299932017-08-03 23:23:55 +0200137config SPL_LDSCRIPT
Tom Rini2c594122020-03-11 18:11:14 -0400138 default "board/davinci/da8xxevm/u-boot-spl-da850evm.lds"
Philipp Tomsichb5299932017-08-03 23:23:55 +0200139
Masahiro Yamada3491ba62014-08-31 07:11:01 +0900140endif