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Stefan Roesec157d8e2005-08-01 16:41:48 +02001/*
Stefan Roese700200c2007-01-30 17:04:19 +01002 * (C) Copyright 2005-2007
Stefan Roese84286382005-08-11 18:03:14 +02003 * Stefan Roese, DENX Software Engineering, sr@denx.de.
Stefan Roesec157d8e2005-08-01 16:41:48 +02004 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
Stefan Roese700200c2007-01-30 17:04:19 +010025 * yosemite.h - configuration for Yosemite & Yellowstone boards
Stefan Roesec157d8e2005-08-01 16:41:48 +020026 ***********************************************************************/
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
Stefan Roese700200c2007-01-30 17:04:19 +010033/* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
34#ifndef CONFIG_YELLOWSTONE
Stefan Roese700200c2007-01-30 17:04:19 +010035#define CONFIG_440EP 1 /* Specific PPC440EP support */
36#define CONFIG_HOSTNAME yosemite
37#else
38#define CONFIG_440GR 1 /* Specific PPC440GR support */
39#define CONFIG_HOSTNAME yellowstone
40#endif
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +020041#define CONFIG_440 1 /* ... PPC440 family */
Stefan Roese700200c2007-01-30 17:04:19 +010042#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roesec157d8e2005-08-01 16:41:48 +020043#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
44
Stefan Roese72675dc2008-06-06 15:55:21 +020045/*
46 * Include common defines/options for all AMCC eval boards
47 */
48#include "amcc-common.h"
49
Stefan Roese84286382005-08-11 18:03:14 +020050#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
51#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
Stefan Roesef3443862006-10-07 11:30:52 +020052#define CONFIG_BOARD_RESET 1 /* call board_reset() */
Stefan Roese84286382005-08-11 18:03:14 +020053
Stefan Roesec157d8e2005-08-01 16:41:48 +020054/*-----------------------------------------------------------------------
55 * Base addresses -- Note these are effective addresses where the
56 * actual resources get mapped (not physical addresses)
57 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
59#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
60#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000
61#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
62#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020063
64/*Don't change either of these*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
66#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020067/*Don't change either of these*/
68
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_USB_DEVICE 0x50000000
70#define CONFIG_SYS_NVRAM_BASE_ADDR 0x80000000
71#define CONFIG_SYS_BCSR_BASE (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000)
72#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020073
74/*-----------------------------------------------------------------------
75 * Initial RAM & stack pointer (placed in SDRAM)
76 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram */
78#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */
79#define CONFIG_SYS_INIT_RAM_END (4 << 10)
80#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data*/
81#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
82#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Stefan Roesec157d8e2005-08-01 16:41:48 +020083
Stefan Roesec157d8e2005-08-01 16:41:48 +020084/*-----------------------------------------------------------------------
85 * Serial Port
86 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
Stefan Roesec157d8e2005-08-01 16:41:48 +020088/*define this if you want console on UART1*/
89#undef CONFIG_UART1_CONSOLE
90
Stefan Roesec157d8e2005-08-01 16:41:48 +020091/*-----------------------------------------------------------------------
Stefan Roese84286382005-08-11 18:03:14 +020092 * Environment
Stefan Roesec157d8e2005-08-01 16:41:48 +020093 *----------------------------------------------------------------------*/
Stefan Roese84286382005-08-11 18:03:14 +020094/*
95 * Define here the location of the environment variables (FLASH or EEPROM).
96 * Note: DENX encourages to use redundant environment in FLASH.
97 */
98#if 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020099#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Stefan Roese84286382005-08-11 18:03:14 +0200100#else
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200101#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
Stefan Roese84286382005-08-11 18:03:14 +0200102#endif
Stefan Roesec157d8e2005-08-01 16:41:48 +0200103
104/*-----------------------------------------------------------------------
105 * FLASH related
106 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200108#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
112#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200113
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
115#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200116
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
Stefan Roese278bc4b2006-05-10 15:06:58 +0200118
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Stefan Roese84286382005-08-11 18:03:14 +0200120
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200121#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200122#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200124#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Stefan Roese84286382005-08-11 18:03:14 +0200125
126/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200127#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
128#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200129#endif /* CONFIG_ENV_IS_IN_FLASH */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200130
131/*-----------------------------------------------------------------------
132 * DDR SDRAM
133 *----------------------------------------------------------------------*/
Wolfgang Denk095b8a32005-08-02 17:06:17 +0200134#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */
136#define CONFIG_SYS_SDRAM_BANKS (2)
Stefan Roese84286382005-08-11 18:03:14 +0200137
Ira Snyder4adb3022008-04-29 11:18:54 -0700138/*-----------------------------------------------------------------------
Stefan Roesec157d8e2005-08-01 16:41:48 +0200139 * I2C
140 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200142
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_I2C_MULTI_EEPROMS
144#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
145#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
146#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
147#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
Stefan Roesec157d8e2005-08-01 16:41:48 +0200148
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200149#ifdef CONFIG_ENV_IS_IN_EEPROM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200150#define CONFIG_ENV_SIZE 0x200 /* Size of Environment vars */
151#define CONFIG_ENV_OFFSET 0x0
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200152#endif /* CONFIG_ENV_IS_IN_EEPROM */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200153
Stefan Roesea90921f2007-12-04 16:29:48 +0100154/* I2C SYSMON (LM75, AD7414 is almost compatible) */
155#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
156#define CONFIG_DTT_AD7414 1 /* use AD7414 */
157#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_DTT_MAX_TEMP 70
159#define CONFIG_SYS_DTT_LOW_TEMP -30
160#define CONFIG_SYS_DTT_HYSTERESIS 3
Stefan Roesea90921f2007-12-04 16:29:48 +0100161
Stefan Roese72675dc2008-06-06 15:55:21 +0200162/*
163 * Default environment variables
164 */
Stefan Roese84286382005-08-11 18:03:14 +0200165#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Roese72675dc2008-06-06 15:55:21 +0200166 CONFIG_AMCC_DEF_ENV \
167 CONFIG_AMCC_DEF_ENV_POWERPC \
168 CONFIG_AMCC_DEF_ENV_PPC_OLD \
169 CONFIG_AMCC_DEF_ENV_NOR_UPD \
Stefan Roese84286382005-08-11 18:03:14 +0200170 "kernel_addr=fc000000\0" \
Stefan Roese56ced702006-05-15 15:11:20 +0200171 "ramdisk_addr=fc180000\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200172 ""
Stefan Roese84286382005-08-11 18:03:14 +0200173
Ira Snyder4adb3022008-04-29 11:18:54 -0700174#define CONFIG_HAS_ETH0 1 /* add support for "ethaddr" */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200175#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
176#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
Stefan Roese72675dc2008-06-06 15:55:21 +0200177#define CONFIG_PHY1_ADDR 3
Stefan Roesec157d8e2005-08-01 16:41:48 +0200178
179/* Partitions */
180#define CONFIG_MAC_PARTITION
181#define CONFIG_DOS_PARTITION
182#define CONFIG_ISO_PARTITION
183
Stefan Roese846b0dd2005-08-08 12:42:22 +0200184#ifdef CONFIG_440EP
Stefan Roesec157d8e2005-08-01 16:41:48 +0200185/* USB */
Markus Klotzbuecher7b59b3c2006-11-27 11:44:58 +0100186#define CONFIG_USB_OHCI_NEW
Stefan Roesec157d8e2005-08-01 16:41:48 +0200187#define CONFIG_USB_STORAGE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_OHCI_BE_CONTROLLER
Stefan Roesec157d8e2005-08-01 16:41:48 +0200189
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
191#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
192#define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_PERIPHERAL_BASE | 0x1000)
193#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440"
194#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +0100195
Stefan Roese700200c2007-01-30 17:04:19 +0100196/* Comment this out to enable USB 1.1 device */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200197#define USB_2_0_DEVICE
Stefan Roese700200c2007-01-30 17:04:19 +0100198
Stefan Roese700200c2007-01-30 17:04:19 +0100199#define CONFIG_SUPPORT_VFAT
Stefan Roese700200c2007-01-30 17:04:19 +0100200#endif /* CONFIG_440EP */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200201
202#ifdef DEBUG
203#define CONFIG_PANIC_HANG
204#else
205#define CONFIG_HW_WATCHDOG /* watchdog */
206#endif
207
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500208/*
Stefan Roese72675dc2008-06-06 15:55:21 +0200209 * Commands additional to the ones defined in amcc-common.h
Jon Loeliger079a1362007-07-10 10:12:10 -0500210 */
Stefan Roesea90921f2007-12-04 16:29:48 +0100211#define CONFIG_CMD_DTT
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500212#define CONFIG_CMD_PCI
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500213
214#ifdef CONFIG_440EP
215 #define CONFIG_CMD_USB
216 #define CONFIG_CMD_FAT
217 #define CONFIG_CMD_EXT2
218#endif
219
Stefan Roesec157d8e2005-08-01 16:41:48 +0200220/*-----------------------------------------------------------------------
221 * PCI stuff
222 *-----------------------------------------------------------------------
223 */
224/* General PCI */
Stefan Roese84286382005-08-11 18:03:14 +0200225#define CONFIG_PCI /* include pci support */
226#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
227#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
Stefan Roesec157d8e2005-08-01 16:41:48 +0200229
230/* Board-specific PCI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200231#define CONFIG_SYS_PCI_TARGET_INIT
232#define CONFIG_SYS_PCI_MASTER_INIT
Stefan Roesec157d8e2005-08-01 16:41:48 +0200233
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200234#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
235#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200236
Stefan Roesec157d8e2005-08-01 16:41:48 +0200237/*-----------------------------------------------------------------------
Stefan Roese36adff32007-01-13 07:59:19 +0100238 * External Bus Controller (EBC) Setup
239 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE
241#define CONFIG_SYS_CPLD 0x80000000
Stefan Roese36adff32007-01-13 07:59:19 +0100242
243/* Memory Bank 0 (NOR-FLASH) initialization */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#define CONFIG_SYS_EBC_PB0AP 0x03017300
245#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000)
Stefan Roese36adff32007-01-13 07:59:19 +0100246
247/* Memory Bank 2 (CPLD) initialization */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_EBC_PB2AP 0x04814500
249#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_CPLD | 0x18000)
Stefan Roese36adff32007-01-13 07:59:19 +0100250
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_BCSR5_PCI66EN 0x80
Stefan Roese5a5958b2007-10-15 11:29:33 +0200252
Stefan Roesec157d8e2005-08-01 16:41:48 +0200253#endif /* __CONFIG_H */