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Dirk Behme12201a12008-12-14 09:47:16 +01001/*
2 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
3 * Rohit Choraria <rohitkc@ti.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Dirk Behme12201a12008-12-14 09:47:16 +01006 */
7
8#include <common.h>
9#include <asm/io.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090010#include <linux/errno.h>
Dirk Behme12201a12008-12-14 09:47:16 +010011#include <asm/arch/mem.h>
pekon gupta6aff0502013-11-22 16:53:29 +053012#include <linux/mtd/omap_gpmc.h>
Dirk Behme12201a12008-12-14 09:47:16 +010013#include <linux/mtd/nand_ecc.h>
Andreas Bießmann4a093002013-04-05 04:55:21 +000014#include <linux/bch.h>
Stefano Babicf7dad8f2012-03-21 23:56:17 +000015#include <linux/compiler.h>
Dirk Behme12201a12008-12-14 09:47:16 +010016#include <nand.h>
pekon gupta2eda8922013-11-22 16:53:30 +053017#include <linux/mtd/omap_elm.h>
pekon guptad016dc42013-11-18 19:03:00 +053018
19#define BADBLOCK_MARKER_LENGTH 2
20#define SECTOR_BYTES 512
pekon guptaf5f1f612013-11-19 11:02:15 +053021#define ECCCLEAR (0x1 << 8)
22#define ECCRESULTREG1 (0x1 << 0)
pekon gupta6e562b12013-11-19 11:02:17 +053023/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
24#define BCH4_BIT_PAD 4
25
pekon gupta71a7f952013-11-19 11:02:16 +053026#ifdef CONFIG_BCH
27static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2,
28 0x97, 0x79, 0xe5, 0x24, 0xb5};
29#endif
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +020030static uint8_t cs_next;
pekon guptad016dc42013-11-18 19:03:00 +053031static __maybe_unused struct nand_ecclayout omap_ecclayout;
Dirk Behme12201a12008-12-14 09:47:16 +010032
Michal Sojkad8af3932015-02-17 17:08:37 +010033#if defined(CONFIG_NAND_OMAP_GPMC_WSCFG)
34static const int8_t wscfg[CONFIG_SYS_MAX_NAND_DEVICE] =
35 { CONFIG_NAND_OMAP_GPMC_WSCFG };
36#else
37/* wscfg is preset to zero since its a static variable */
38static const int8_t wscfg[CONFIG_SYS_MAX_NAND_DEVICE];
39#endif
40
Dirk Behme12201a12008-12-14 09:47:16 +010041/*
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +020042 * Driver configurations
43 */
44struct omap_nand_info {
45 struct bch_control *control;
46 enum omap_ecc ecc_scheme;
Michal Sojkad8af3932015-02-17 17:08:37 +010047 uint8_t cs;
48 uint8_t ws; /* wait status pin (0,1) */
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +020049};
50
51/* We are wasting a bit of memory but al least we are safe */
52static struct omap_nand_info omap_nand_info[GPMC_MAX_CS];
53
54/*
Dirk Behme12201a12008-12-14 09:47:16 +010055 * omap_nand_hwcontrol - Set the address pointers corretly for the
56 * following address/data/command operation
57 */
58static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
59 uint32_t ctrl)
60{
Scott Wood17cb4b82016-05-30 13:57:56 -050061 register struct nand_chip *this = mtd_to_nand(mtd);
62 struct omap_nand_info *info = nand_get_controller_data(this);
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +020063 int cs = info->cs;
Dirk Behme12201a12008-12-14 09:47:16 +010064
65 /*
66 * Point the IO_ADDR to DATA and ADDRESS registers instead
67 * of chip address
68 */
69 switch (ctrl) {
70 case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
Dirk Behme89411352009-08-08 09:30:22 +020071 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
Dirk Behme12201a12008-12-14 09:47:16 +010072 break;
73 case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
Dirk Behme89411352009-08-08 09:30:22 +020074 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_adr;
Dirk Behme12201a12008-12-14 09:47:16 +010075 break;
76 case NAND_CTRL_CHANGE | NAND_NCE:
Dirk Behme89411352009-08-08 09:30:22 +020077 this->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
Dirk Behme12201a12008-12-14 09:47:16 +010078 break;
79 }
80
81 if (cmd != NAND_CMD_NONE)
82 writeb(cmd, this->IO_ADDR_W);
83}
84
Simon Schwarz12c2f1e2011-09-14 15:30:16 -040085/* Check wait pin as dev ready indicator */
Stefan Roesefb384c42014-11-13 03:43:39 +010086static int omap_dev_ready(struct mtd_info *mtd)
Simon Schwarz12c2f1e2011-09-14 15:30:16 -040087{
Scott Wood17cb4b82016-05-30 13:57:56 -050088 register struct nand_chip *this = mtd_to_nand(mtd);
89 struct omap_nand_info *info = nand_get_controller_data(this);
Michal Sojkad8af3932015-02-17 17:08:37 +010090 return gpmc_cfg->status & (1 << (8 + info->ws));
Simon Schwarz12c2f1e2011-09-14 15:30:16 -040091}
Dirk Behme12201a12008-12-14 09:47:16 +010092
93/*
94 * gen_true_ecc - This function will generate true ECC value, which
95 * can be used when correcting data read from NAND flash memory core
96 *
97 * @ecc_buf: buffer to store ecc code
98 *
99 * @return: re-formatted ECC value
100 */
101static uint32_t gen_true_ecc(uint8_t *ecc_buf)
102{
103 return ecc_buf[0] | (ecc_buf[1] << 16) | ((ecc_buf[2] & 0xF0) << 20) |
104 ((ecc_buf[2] & 0x0F) << 8);
105}
106
107/*
108 * omap_correct_data - Compares the ecc read from nand spare area with ECC
Vagrant Cascadianeae4b2b2016-04-30 19:18:00 -0700109 * registers values and corrects one bit error if it has occurred
Dirk Behme12201a12008-12-14 09:47:16 +0100110 * Further details can be had from OMAP TRM and the following selected links:
111 * http://en.wikipedia.org/wiki/Hamming_code
112 * http://www.cs.utexas.edu/users/plaxton/c/337/05f/slides/ErrorCorrection-4.pdf
113 *
114 * @mtd: MTD device structure
115 * @dat: page data
116 * @read_ecc: ecc read from nand flash
117 * @calc_ecc: ecc read from ECC registers
118 *
119 * @return 0 if data is OK or corrected, else returns -1
120 */
Stefano Babicf7dad8f2012-03-21 23:56:17 +0000121static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat,
Dirk Behme12201a12008-12-14 09:47:16 +0100122 uint8_t *read_ecc, uint8_t *calc_ecc)
123{
124 uint32_t orig_ecc, new_ecc, res, hm;
125 uint16_t parity_bits, byte;
126 uint8_t bit;
127
128 /* Regenerate the orginal ECC */
129 orig_ecc = gen_true_ecc(read_ecc);
130 new_ecc = gen_true_ecc(calc_ecc);
131 /* Get the XOR of real ecc */
132 res = orig_ecc ^ new_ecc;
133 if (res) {
134 /* Get the hamming width */
135 hm = hweight32(res);
136 /* Single bit errors can be corrected! */
137 if (hm == 12) {
138 /* Correctable data! */
139 parity_bits = res >> 16;
140 bit = (parity_bits & 0x7);
141 byte = (parity_bits >> 3) & 0x1FF;
142 /* Flip the bit to correct */
143 dat[byte] ^= (0x1 << bit);
144 } else if (hm == 1) {
145 printf("Error: Ecc is wrong\n");
146 /* ECC itself is corrupted */
147 return 2;
148 } else {
149 /*
150 * hm distance != parity pairs OR one, could mean 2 bit
151 * error OR potentially be on a blank page..
152 * orig_ecc: contains spare area data from nand flash.
153 * new_ecc: generated ecc while reading data area.
154 * Note: if the ecc = 0, all data bits from which it was
155 * generated are 0xFF.
156 * The 3 byte(24 bits) ecc is generated per 512byte
157 * chunk of a page. If orig_ecc(from spare area)
158 * is 0xFF && new_ecc(computed now from data area)=0x0,
159 * this means that data area is 0xFF and spare area is
160 * 0xFF. A sure sign of a erased page!
161 */
162 if ((orig_ecc == 0x0FFF0FFF) && (new_ecc == 0x00000000))
163 return 0;
164 printf("Error: Bad compare! failed\n");
165 /* detected 2 bit error */
Scott Woodceee07b2016-05-30 13:57:58 -0500166 return -EBADMSG;
Dirk Behme12201a12008-12-14 09:47:16 +0100167 }
168 }
169 return 0;
170}
171
172/*
pekon guptaf5f1f612013-11-19 11:02:15 +0530173 * omap_enable_hwecc - configures GPMC as per ECC scheme before read/write
Andreas Bießmann4a093002013-04-05 04:55:21 +0000174 * @mtd: MTD device structure
175 * @mode: Read/Write mode
176 */
177__maybe_unused
pekon guptaf5f1f612013-11-19 11:02:15 +0530178static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
Andreas Bießmann4a093002013-04-05 04:55:21 +0000179{
Scott Wood17cb4b82016-05-30 13:57:56 -0500180 struct nand_chip *nand = mtd_to_nand(mtd);
181 struct omap_nand_info *info = nand_get_controller_data(nand);
pekon guptaf5f1f612013-11-19 11:02:15 +0530182 unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0;
183 unsigned int ecc_algo = 0;
184 unsigned int bch_type = 0;
185 unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00;
186 u32 ecc_size_config_val = 0;
187 u32 ecc_config_val = 0;
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +0200188 int cs = info->cs;
Andreas Bießmann4a093002013-04-05 04:55:21 +0000189
pekon guptaf5f1f612013-11-19 11:02:15 +0530190 /* configure GPMC for specific ecc-scheme */
pekon gupta92332792014-04-11 12:55:33 +0530191 switch (info->ecc_scheme) {
pekon guptaf5f1f612013-11-19 11:02:15 +0530192 case OMAP_ECC_HAM1_CODE_SW:
193 return;
194 case OMAP_ECC_HAM1_CODE_HW:
195 ecc_algo = 0x0;
196 bch_type = 0x0;
197 bch_wrapmode = 0x00;
198 eccsize0 = 0xFF;
199 eccsize1 = 0xFF;
200 break;
201 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
202 case OMAP_ECC_BCH8_CODE_HW:
203 ecc_algo = 0x1;
204 bch_type = 0x1;
205 if (mode == NAND_ECC_WRITE) {
206 bch_wrapmode = 0x01;
207 eccsize0 = 0; /* extra bits in nibbles per sector */
208 eccsize1 = 28; /* OOB bits in nibbles per sector */
209 } else {
210 bch_wrapmode = 0x01;
211 eccsize0 = 26; /* ECC bits in nibbles per sector */
212 eccsize1 = 2; /* non-ECC bits in nibbles per sector */
Stefan Roese5d7a49b2013-12-05 07:58:06 +0100213 }
pekon guptaf5f1f612013-11-19 11:02:15 +0530214 break;
pekon gupta46840f62014-06-02 17:14:42 +0530215 case OMAP_ECC_BCH16_CODE_HW:
216 ecc_algo = 0x1;
217 bch_type = 0x2;
218 if (mode == NAND_ECC_WRITE) {
219 bch_wrapmode = 0x01;
220 eccsize0 = 0; /* extra bits in nibbles per sector */
221 eccsize1 = 52; /* OOB bits in nibbles per sector */
222 } else {
223 bch_wrapmode = 0x01;
224 eccsize0 = 52; /* ECC bits in nibbles per sector */
225 eccsize1 = 0; /* non-ECC bits in nibbles per sector */
226 }
227 break;
pekon guptaf5f1f612013-11-19 11:02:15 +0530228 default:
229 return;
pekon guptad016dc42013-11-18 19:03:00 +0530230 }
pekon guptaf5f1f612013-11-19 11:02:15 +0530231 /* Clear ecc and enable bits */
232 writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
233 /* Configure ecc size for BCH */
234 ecc_size_config_val = (eccsize1 << 22) | (eccsize0 << 12);
235 writel(ecc_size_config_val, &gpmc_cfg->ecc_size_config);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000236
pekon guptaf5f1f612013-11-19 11:02:15 +0530237 /* Configure device details for BCH engine */
238 ecc_config_val = ((ecc_algo << 16) | /* HAM1 | BCHx */
239 (bch_type << 12) | /* BCH4/BCH8/BCH16 */
240 (bch_wrapmode << 8) | /* wrap mode */
241 (dev_width << 7) | /* bus width */
242 (0x0 << 4) | /* number of sectors */
243 (cs << 1) | /* ECC CS */
244 (0x1)); /* enable ECC */
245 writel(ecc_config_val, &gpmc_cfg->ecc_config);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000246}
247
248/*
pekon gupta71a7f952013-11-19 11:02:16 +0530249 * omap_calculate_ecc - Read ECC result
250 * @mtd: MTD structure
251 * @dat: unused
252 * @ecc_code: ecc_code buffer
253 * Using noninverted ECC can be considered ugly since writing a blank
254 * page ie. padding will clear the ECC bytes. This is no problem as
255 * long nobody is trying to write data on the seemingly unused page.
256 * Reading an erased page will produce an ECC mismatch between
257 * generated and read ECC bytes that has to be dealt with separately.
258 * E.g. if page is 0xFF (fresh erased), and if HW ECC engine within GPMC
259 * is used, the result of read will be 0x0 while the ECC offsets of the
260 * spare area will be 0xFF which will result in an ECC mismatch.
Andreas Bießmann4a093002013-04-05 04:55:21 +0000261 */
pekon gupta71a7f952013-11-19 11:02:16 +0530262static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000263 uint8_t *ecc_code)
264{
Scott Wood17cb4b82016-05-30 13:57:56 -0500265 struct nand_chip *chip = mtd_to_nand(mtd);
266 struct omap_nand_info *info = nand_get_controller_data(chip);
Ladislav Michl0568dd02016-07-12 20:28:16 +0200267 const uint32_t *ptr;
268 uint32_t val = 0;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000269 int8_t i = 0, j;
270
pekon gupta92332792014-04-11 12:55:33 +0530271 switch (info->ecc_scheme) {
pekon gupta71a7f952013-11-19 11:02:16 +0530272 case OMAP_ECC_HAM1_CODE_HW:
273 val = readl(&gpmc_cfg->ecc1_result);
274 ecc_code[0] = val & 0xFF;
275 ecc_code[1] = (val >> 16) & 0xFF;
276 ecc_code[2] = ((val >> 8) & 0x0F) | ((val >> 20) & 0xF0);
277 break;
278#ifdef CONFIG_BCH
279 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
280#endif
281 case OMAP_ECC_BCH8_CODE_HW:
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000282 ptr = &gpmc_cfg->bch_result_0_3[0].bch_result_x[3];
pekon gupta71a7f952013-11-19 11:02:16 +0530283 val = readl(ptr);
284 ecc_code[i++] = (val >> 0) & 0xFF;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000285 ptr--;
286 for (j = 0; j < 3; j++) {
pekon gupta71a7f952013-11-19 11:02:16 +0530287 val = readl(ptr);
288 ecc_code[i++] = (val >> 24) & 0xFF;
289 ecc_code[i++] = (val >> 16) & 0xFF;
290 ecc_code[i++] = (val >> 8) & 0xFF;
291 ecc_code[i++] = (val >> 0) & 0xFF;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000292 ptr--;
293 }
pekon gupta71a7f952013-11-19 11:02:16 +0530294 break;
pekon gupta46840f62014-06-02 17:14:42 +0530295 case OMAP_ECC_BCH16_CODE_HW:
296 val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[2]);
297 ecc_code[i++] = (val >> 8) & 0xFF;
298 ecc_code[i++] = (val >> 0) & 0xFF;
299 val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[1]);
300 ecc_code[i++] = (val >> 24) & 0xFF;
301 ecc_code[i++] = (val >> 16) & 0xFF;
302 ecc_code[i++] = (val >> 8) & 0xFF;
303 ecc_code[i++] = (val >> 0) & 0xFF;
304 val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[0]);
305 ecc_code[i++] = (val >> 24) & 0xFF;
306 ecc_code[i++] = (val >> 16) & 0xFF;
307 ecc_code[i++] = (val >> 8) & 0xFF;
308 ecc_code[i++] = (val >> 0) & 0xFF;
309 for (j = 3; j >= 0; j--) {
310 val = readl(&gpmc_cfg->bch_result_0_3[0].bch_result_x[j]
311 );
312 ecc_code[i++] = (val >> 24) & 0xFF;
313 ecc_code[i++] = (val >> 16) & 0xFF;
314 ecc_code[i++] = (val >> 8) & 0xFF;
315 ecc_code[i++] = (val >> 0) & 0xFF;
316 }
317 break;
pekon gupta71a7f952013-11-19 11:02:16 +0530318 default:
319 return -EINVAL;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000320 }
pekon gupta71a7f952013-11-19 11:02:16 +0530321 /* ECC scheme specific syndrome customizations */
pekon gupta92332792014-04-11 12:55:33 +0530322 switch (info->ecc_scheme) {
pekon gupta71a7f952013-11-19 11:02:16 +0530323 case OMAP_ECC_HAM1_CODE_HW:
324 break;
325#ifdef CONFIG_BCH
326 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
327
328 for (i = 0; i < chip->ecc.bytes; i++)
329 *(ecc_code + i) = *(ecc_code + i) ^
330 bch8_polynomial[i];
331 break;
332#endif
333 case OMAP_ECC_BCH8_CODE_HW:
334 ecc_code[chip->ecc.bytes - 1] = 0x00;
335 break;
pekon gupta46840f62014-06-02 17:14:42 +0530336 case OMAP_ECC_BCH16_CODE_HW:
337 break;
pekon gupta71a7f952013-11-19 11:02:16 +0530338 default:
339 return -EINVAL;
340 }
341 return 0;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000342}
343
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200344#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
345
346#define PREFETCH_CONFIG1_CS_SHIFT 24
347#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
348#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
349#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
350#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
351#define ENABLE_PREFETCH (1 << 7)
352
353/**
354 * omap_prefetch_enable - configures and starts prefetch transfer
355 * @fifo_th: fifo threshold to be used for read/ write
356 * @count: number of bytes to be transferred
357 * @is_write: prefetch read(0) or write post(1) mode
358 * @cs: chip select to use
359 */
360static int omap_prefetch_enable(int fifo_th, unsigned int count, int is_write, int cs)
361{
362 uint32_t val;
363
364 if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX)
365 return -EINVAL;
366
367 if (readl(&gpmc_cfg->prefetch_control))
368 return -EBUSY;
369
370 /* Set the amount of bytes to be prefetched */
371 writel(count, &gpmc_cfg->prefetch_config2);
372
373 val = (cs << PREFETCH_CONFIG1_CS_SHIFT) | (is_write & 1) |
374 PREFETCH_FIFOTHRESHOLD(fifo_th) | ENABLE_PREFETCH;
375 writel(val, &gpmc_cfg->prefetch_config1);
376
377 /* Start the prefetch engine */
378 writel(1, &gpmc_cfg->prefetch_control);
379
380 return 0;
381}
382
383/**
384 * omap_prefetch_reset - disables and stops the prefetch engine
385 */
386static void omap_prefetch_reset(void)
387{
388 writel(0, &gpmc_cfg->prefetch_control);
389 writel(0, &gpmc_cfg->prefetch_config1);
390}
391
392static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int len)
393{
394 int ret;
395 uint32_t cnt;
Scott Wood17cb4b82016-05-30 13:57:56 -0500396 struct omap_nand_info *info = nand_get_controller_data(chip);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200397
398 ret = omap_prefetch_enable(PREFETCH_FIFOTHRESHOLD_MAX, len, 0, info->cs);
399 if (ret < 0)
400 return ret;
401
402 do {
403 int i;
404
405 cnt = readl(&gpmc_cfg->prefetch_status);
406 cnt = PREFETCH_STATUS_FIFO_CNT(cnt);
407
408 for (i = 0; i < cnt / 4; i++) {
409 *buf++ = readl(CONFIG_SYS_NAND_BASE);
410 len -= 4;
411 }
412 } while (len);
413
414 omap_prefetch_reset();
415
416 return 0;
417}
418
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200419static inline void omap_nand_read(struct mtd_info *mtd, uint8_t *buf, int len)
420{
Scott Wood17cb4b82016-05-30 13:57:56 -0500421 struct nand_chip *chip = mtd_to_nand(mtd);
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200422
423 if (chip->options & NAND_BUSWIDTH_16)
424 nand_read_buf16(mtd, buf, len);
425 else
426 nand_read_buf(mtd, buf, len);
427}
428
429static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200430{
431 int ret;
432 uint32_t head, tail;
Scott Wood17cb4b82016-05-30 13:57:56 -0500433 struct nand_chip *chip = mtd_to_nand(mtd);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200434
435 /*
436 * If the destination buffer is unaligned, start with reading
437 * the overlap byte-wise.
438 */
439 head = ((uint32_t) buf) % 4;
440 if (head) {
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200441 omap_nand_read(mtd, buf, head);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200442 buf += head;
443 len -= head;
444 }
445
446 /*
447 * Only transfer multiples of 4 bytes in a pre-fetched fashion.
448 * If there's a residue, care for it byte-wise afterwards.
449 */
450 tail = len % 4;
451
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200452 ret = __read_prefetch_aligned(chip, (uint32_t *)buf, len - tail);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200453 if (ret < 0) {
454 /* fallback in case the prefetch engine is busy */
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200455 omap_nand_read(mtd, buf, len);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200456 } else if (tail) {
457 buf += len - tail;
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +0200458 omap_nand_read(mtd, buf, tail);
Jeroen Hofsteec0736112015-05-30 10:11:23 +0200459 }
460}
461#endif /* CONFIG_NAND_OMAP_GPMC_PREFETCH */
462
pekon gupta71a7f952013-11-19 11:02:16 +0530463#ifdef CONFIG_NAND_OMAP_ELM
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000464/*
Jeroen Hofstee44152972014-10-08 22:57:42 +0200465 * omap_reverse_list - re-orders list elements in reverse order [internal]
466 * @list: pointer to start of list
467 * @length: length of list
468*/
469static void omap_reverse_list(u8 *list, unsigned int length)
470{
471 unsigned int i, j;
472 unsigned int half_length = length / 2;
473 u8 tmp;
474 for (i = 0, j = length - 1; i < half_length; i++, j--) {
475 tmp = list[i];
476 list[i] = list[j];
477 list[j] = tmp;
478 }
479}
480
481/*
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000482 * omap_correct_data_bch - Compares the ecc read from nand spare area
Vagrant Cascadianeae4b2b2016-04-30 19:18:00 -0700483 * with ECC registers values and corrects one bit error if it has occurred
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000484 *
485 * @mtd: MTD device structure
486 * @dat: page data
487 * @read_ecc: ecc read from nand flash (ignored)
488 * @calc_ecc: ecc read from ECC registers
489 *
490 * @return 0 if data is OK or corrected, else returns -1
491 */
492static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
493 uint8_t *read_ecc, uint8_t *calc_ecc)
494{
Scott Wood17cb4b82016-05-30 13:57:56 -0500495 struct nand_chip *chip = mtd_to_nand(mtd);
496 struct omap_nand_info *info = nand_get_controller_data(chip);
pekon guptaa09431d2014-04-11 12:55:34 +0530497 struct nand_ecc_ctrl *ecc = &chip->ecc;
pekon gupta6e562b12013-11-19 11:02:17 +0530498 uint32_t error_count = 0, error_max;
pekon gupta46840f62014-06-02 17:14:42 +0530499 uint32_t error_loc[ELM_MAX_ERROR_COUNT];
pekon guptad21e77f2014-04-11 12:55:32 +0530500 enum bch_level bch_type;
pekon gupta6e562b12013-11-19 11:02:17 +0530501 uint32_t i, ecc_flag = 0;
Guido Martínezeb54d2c2015-01-02 14:49:10 -0300502 uint8_t count;
pekon gupta6e562b12013-11-19 11:02:17 +0530503 uint32_t byte_pos, bit_pos;
Guido Martínezeb54d2c2015-01-02 14:49:10 -0300504 int err = 0;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000505
pekon gupta6e562b12013-11-19 11:02:17 +0530506 /* check calculated ecc */
pekon guptaa09431d2014-04-11 12:55:34 +0530507 for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
pekon gupta6e562b12013-11-19 11:02:17 +0530508 if (calc_ecc[i] != 0x00)
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000509 ecc_flag = 1;
pekon gupta6e562b12013-11-19 11:02:17 +0530510 }
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000511 if (!ecc_flag)
512 return 0;
513
pekon gupta6e562b12013-11-19 11:02:17 +0530514 /* check for whether its a erased-page */
515 ecc_flag = 0;
pekon guptaa09431d2014-04-11 12:55:34 +0530516 for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
pekon gupta6e562b12013-11-19 11:02:17 +0530517 if (read_ecc[i] != 0xff)
518 ecc_flag = 1;
519 }
520 if (!ecc_flag)
521 return 0;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000522
523 /*
524 * while reading ECC result we read it in big endian.
525 * Hence while loading to ELM we have rotate to get the right endian.
526 */
pekon gupta92332792014-04-11 12:55:33 +0530527 switch (info->ecc_scheme) {
pekon gupta6e562b12013-11-19 11:02:17 +0530528 case OMAP_ECC_BCH8_CODE_HW:
pekon guptad21e77f2014-04-11 12:55:32 +0530529 bch_type = BCH_8_BIT;
pekon guptaa09431d2014-04-11 12:55:34 +0530530 omap_reverse_list(calc_ecc, ecc->bytes - 1);
pekon gupta6e562b12013-11-19 11:02:17 +0530531 break;
pekon gupta46840f62014-06-02 17:14:42 +0530532 case OMAP_ECC_BCH16_CODE_HW:
533 bch_type = BCH_16_BIT;
534 omap_reverse_list(calc_ecc, ecc->bytes);
535 break;
pekon gupta6e562b12013-11-19 11:02:17 +0530536 default:
537 return -EINVAL;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000538 }
pekon gupta6e562b12013-11-19 11:02:17 +0530539 /* use elm module to check for errors */
pekon guptad21e77f2014-04-11 12:55:32 +0530540 elm_config(bch_type);
pekon gupta3f990dc2014-04-11 12:55:35 +0530541 err = elm_check_error(calc_ecc, bch_type, &error_count, error_loc);
542 if (err)
543 return err;
544
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000545 /* correct bch error */
pekon gupta6e562b12013-11-19 11:02:17 +0530546 for (count = 0; count < error_count; count++) {
pekon gupta92332792014-04-11 12:55:33 +0530547 switch (info->ecc_scheme) {
pekon guptad21e77f2014-04-11 12:55:32 +0530548 case OMAP_ECC_BCH8_CODE_HW:
pekon gupta6e562b12013-11-19 11:02:17 +0530549 /* 14th byte in ECC is reserved to match ROM layout */
pekon guptaa09431d2014-04-11 12:55:34 +0530550 error_max = SECTOR_BYTES + (ecc->bytes - 1);
pekon gupta6e562b12013-11-19 11:02:17 +0530551 break;
pekon gupta46840f62014-06-02 17:14:42 +0530552 case OMAP_ECC_BCH16_CODE_HW:
553 error_max = SECTOR_BYTES + ecc->bytes;
554 break;
pekon gupta6e562b12013-11-19 11:02:17 +0530555 default:
556 return -EINVAL;
557 }
558 byte_pos = error_max - (error_loc[count] / 8) - 1;
559 bit_pos = error_loc[count] % 8;
560 if (byte_pos < SECTOR_BYTES) {
561 dat[byte_pos] ^= 1 << bit_pos;
Ezequiel Garcíad1d01672015-10-04 18:34:42 -0300562 debug("nand: bit-flip corrected @data=%d\n", byte_pos);
pekon gupta6e562b12013-11-19 11:02:17 +0530563 } else if (byte_pos < error_max) {
Belisko Marek97eeae12014-04-25 12:00:07 +0200564 read_ecc[byte_pos - SECTOR_BYTES] ^= 1 << bit_pos;
Ezequiel Garcíad1d01672015-10-04 18:34:42 -0300565 debug("nand: bit-flip corrected @oob=%d\n", byte_pos -
pekon gupta6e562b12013-11-19 11:02:17 +0530566 SECTOR_BYTES);
567 } else {
568 err = -EBADMSG;
569 printf("nand: error: invalid bit-flip location\n");
570 }
571 }
572 return (err) ? err : error_count;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000573}
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000574
575/**
576 * omap_read_page_bch - hardware ecc based page read function
577 * @mtd: mtd info structure
578 * @chip: nand chip info structure
579 * @buf: buffer to store read data
Sergey Lapindfe64e22013-01-14 03:46:50 +0000580 * @oob_required: caller expects OOB data read to chip->oob_poi
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000581 * @page: page number to read
582 *
583 */
584static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapindfe64e22013-01-14 03:46:50 +0000585 uint8_t *buf, int oob_required, int page)
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000586{
587 int i, eccsize = chip->ecc.size;
588 int eccbytes = chip->ecc.bytes;
589 int eccsteps = chip->ecc.steps;
590 uint8_t *p = buf;
591 uint8_t *ecc_calc = chip->buffers->ecccalc;
592 uint8_t *ecc_code = chip->buffers->ecccode;
593 uint32_t *eccpos = chip->ecc.layout->eccpos;
594 uint8_t *oob = chip->oob_poi;
595 uint32_t data_pos;
596 uint32_t oob_pos;
597
598 data_pos = 0;
599 /* oob area start */
600 oob_pos = (eccsize * eccsteps) + chip->ecc.layout->eccpos[0];
601 oob += chip->ecc.layout->eccpos[0];
602
603 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize,
604 oob += eccbytes) {
605 chip->ecc.hwctl(mtd, NAND_ECC_READ);
606 /* read data */
Rostislav Lisovycc81a522014-09-02 17:00:30 +0200607 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, -1);
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000608 chip->read_buf(mtd, p, eccsize);
609
610 /* read respective ecc from oob area */
Rostislav Lisovycc81a522014-09-02 17:00:30 +0200611 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000612 chip->read_buf(mtd, oob, eccbytes);
613 /* read syndrome */
614 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
615
616 data_pos += eccsize;
617 oob_pos += eccbytes;
618 }
619
620 for (i = 0; i < chip->ecc.total; i++)
621 ecc_code[i] = chip->oob_poi[eccpos[i]];
622
623 eccsteps = chip->ecc.steps;
624 p = buf;
625
626 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
627 int stat;
628
629 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
630 if (stat < 0)
631 mtd->ecc_stats.failed++;
632 else
633 mtd->ecc_stats.corrected += stat;
634 }
635 return 0;
636}
pekon guptad016dc42013-11-18 19:03:00 +0530637#endif /* CONFIG_NAND_OMAP_ELM */
Mansoor Ahamedc3754e92012-11-06 13:06:33 +0000638
Andreas Bießmann4a093002013-04-05 04:55:21 +0000639/*
640 * OMAP3 BCH8 support (with BCH library)
641 */
pekon guptad016dc42013-11-18 19:03:00 +0530642#ifdef CONFIG_BCH
Andreas Bießmann4a093002013-04-05 04:55:21 +0000643/**
pekon guptad016dc42013-11-18 19:03:00 +0530644 * omap_correct_data_bch_sw - Decode received data and correct errors
Andreas Bießmann4a093002013-04-05 04:55:21 +0000645 * @mtd: MTD device structure
646 * @data: page data
647 * @read_ecc: ecc read from nand flash
648 * @calc_ecc: ecc read from HW ECC registers
649 */
pekon guptad016dc42013-11-18 19:03:00 +0530650static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data,
Andreas Bießmann4a093002013-04-05 04:55:21 +0000651 u_char *read_ecc, u_char *calc_ecc)
652{
653 int i, count;
654 /* cannot correct more than 8 errors */
655 unsigned int errloc[8];
Scott Wood17cb4b82016-05-30 13:57:56 -0500656 struct nand_chip *chip = mtd_to_nand(mtd);
657 struct omap_nand_info *info = nand_get_controller_data(chip);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000658
Ladislav Michl6fe7fe12017-01-09 11:15:14 +0100659 count = decode_bch(info->control, NULL, SECTOR_BYTES,
660 read_ecc, calc_ecc, NULL, errloc);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000661 if (count > 0) {
662 /* correct errors */
663 for (i = 0; i < count; i++) {
664 /* correct data only, not ecc bytes */
Ladislav Michl6fe7fe12017-01-09 11:15:14 +0100665 if (errloc[i] < SECTOR_BYTES << 3)
666 data[errloc[i] >> 3] ^= 1 << (errloc[i] & 7);
Ezequiel Garcíad1d01672015-10-04 18:34:42 -0300667 debug("corrected bitflip %u\n", errloc[i]);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000668#ifdef DEBUG
669 puts("read_ecc: ");
670 /*
671 * BCH8 have 13 bytes of ECC; BCH4 needs adoption
672 * here!
673 */
674 for (i = 0; i < 13; i++)
675 printf("%02x ", read_ecc[i]);
676 puts("\n");
677 puts("calc_ecc: ");
678 for (i = 0; i < 13; i++)
679 printf("%02x ", calc_ecc[i]);
680 puts("\n");
681#endif
682 }
683 } else if (count < 0) {
684 puts("ecc unrecoverable error\n");
685 }
686 return count;
687}
688
689/**
690 * omap_free_bch - Release BCH ecc resources
691 * @mtd: MTD device structure
692 */
693static void __maybe_unused omap_free_bch(struct mtd_info *mtd)
694{
Scott Wood17cb4b82016-05-30 13:57:56 -0500695 struct nand_chip *chip = mtd_to_nand(mtd);
696 struct omap_nand_info *info = nand_get_controller_data(chip);
Andreas Bießmann4a093002013-04-05 04:55:21 +0000697
pekon gupta92332792014-04-11 12:55:33 +0530698 if (info->control) {
699 free_bch(info->control);
700 info->control = NULL;
Andreas Bießmann4a093002013-04-05 04:55:21 +0000701 }
702}
pekon guptad016dc42013-11-18 19:03:00 +0530703#endif /* CONFIG_BCH */
704
705/**
706 * omap_select_ecc_scheme - configures driver for particular ecc-scheme
707 * @nand: NAND chip device structure
708 * @ecc_scheme: ecc scheme to configure
709 * @pagesize: number of main-area bytes per page of NAND device
710 * @oobsize: number of OOB/spare bytes per page of NAND device
711 */
712static int omap_select_ecc_scheme(struct nand_chip *nand,
713 enum omap_ecc ecc_scheme, unsigned int pagesize, unsigned int oobsize) {
Scott Wood17cb4b82016-05-30 13:57:56 -0500714 struct omap_nand_info *info = nand_get_controller_data(nand);
Nikita Kiryanoveb237a12013-12-16 19:19:01 +0200715 struct nand_ecclayout *ecclayout = &omap_ecclayout;
pekon guptad016dc42013-11-18 19:03:00 +0530716 int eccsteps = pagesize / SECTOR_BYTES;
717 int i;
718
719 switch (ecc_scheme) {
720 case OMAP_ECC_HAM1_CODE_SW:
721 debug("nand: selected OMAP_ECC_HAM1_CODE_SW\n");
722 /* For this ecc-scheme, ecc.bytes, ecc.layout, ... are
723 * initialized in nand_scan_tail(), so just set ecc.mode */
pekon gupta92332792014-04-11 12:55:33 +0530724 info->control = NULL;
pekon guptad016dc42013-11-18 19:03:00 +0530725 nand->ecc.mode = NAND_ECC_SOFT;
726 nand->ecc.layout = NULL;
Nikita Kiryanov25284602013-12-12 15:19:31 +0200727 nand->ecc.size = 0;
pekon guptad016dc42013-11-18 19:03:00 +0530728 break;
729
730 case OMAP_ECC_HAM1_CODE_HW:
731 debug("nand: selected OMAP_ECC_HAM1_CODE_HW\n");
732 /* check ecc-scheme requirements before updating ecc info */
733 if ((3 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
734 printf("nand: error: insufficient OOB: require=%d\n", (
735 (3 * eccsteps) + BADBLOCK_MARKER_LENGTH));
736 return -EINVAL;
737 }
pekon gupta92332792014-04-11 12:55:33 +0530738 info->control = NULL;
pekon guptad016dc42013-11-18 19:03:00 +0530739 /* populate ecc specific fields */
Nikita Kiryanovfcd05242013-12-17 15:18:01 +0200740 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
pekon guptad016dc42013-11-18 19:03:00 +0530741 nand->ecc.mode = NAND_ECC_HW;
742 nand->ecc.strength = 1;
743 nand->ecc.size = SECTOR_BYTES;
744 nand->ecc.bytes = 3;
745 nand->ecc.hwctl = omap_enable_hwecc;
746 nand->ecc.correct = omap_correct_data;
747 nand->ecc.calculate = omap_calculate_ecc;
748 /* define ecc-layout */
749 ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
pekon gupta69cc97f2013-12-05 17:54:21 +0530750 for (i = 0; i < ecclayout->eccbytes; i++) {
751 if (nand->options & NAND_BUSWIDTH_16)
752 ecclayout->eccpos[i] = i + 2;
753 else
754 ecclayout->eccpos[i] = i + 1;
755 }
pekon guptad016dc42013-11-18 19:03:00 +0530756 ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
757 ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes -
758 BADBLOCK_MARKER_LENGTH;
pekon guptad016dc42013-11-18 19:03:00 +0530759 break;
760
761 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
762#ifdef CONFIG_BCH
763 debug("nand: selected OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
764 /* check ecc-scheme requirements before updating ecc info */
765 if ((13 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
766 printf("nand: error: insufficient OOB: require=%d\n", (
767 (13 * eccsteps) + BADBLOCK_MARKER_LENGTH));
768 return -EINVAL;
769 }
770 /* check if BCH S/W library can be used for error detection */
pekon gupta92332792014-04-11 12:55:33 +0530771 info->control = init_bch(13, 8, 0x201b);
772 if (!info->control) {
pekon guptad016dc42013-11-18 19:03:00 +0530773 printf("nand: error: could not init_bch()\n");
774 return -ENODEV;
775 }
pekon guptad016dc42013-11-18 19:03:00 +0530776 /* populate ecc specific fields */
Nikita Kiryanovfcd05242013-12-17 15:18:01 +0200777 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
pekon guptad016dc42013-11-18 19:03:00 +0530778 nand->ecc.mode = NAND_ECC_HW;
779 nand->ecc.strength = 8;
780 nand->ecc.size = SECTOR_BYTES;
781 nand->ecc.bytes = 13;
pekon guptaf5f1f612013-11-19 11:02:15 +0530782 nand->ecc.hwctl = omap_enable_hwecc;
pekon guptad016dc42013-11-18 19:03:00 +0530783 nand->ecc.correct = omap_correct_data_bch_sw;
pekon gupta71a7f952013-11-19 11:02:16 +0530784 nand->ecc.calculate = omap_calculate_ecc;
pekon guptad016dc42013-11-18 19:03:00 +0530785 /* define ecc-layout */
786 ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
787 ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
788 for (i = 1; i < ecclayout->eccbytes; i++) {
789 if (i % nand->ecc.bytes)
790 ecclayout->eccpos[i] =
791 ecclayout->eccpos[i - 1] + 1;
792 else
793 ecclayout->eccpos[i] =
794 ecclayout->eccpos[i - 1] + 2;
795 }
796 ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
797 ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes -
798 BADBLOCK_MARKER_LENGTH;
pekon guptad016dc42013-11-18 19:03:00 +0530799 break;
800#else
801 printf("nand: error: CONFIG_BCH required for ECC\n");
802 return -EINVAL;
803#endif
804
805 case OMAP_ECC_BCH8_CODE_HW:
806#ifdef CONFIG_NAND_OMAP_ELM
807 debug("nand: selected OMAP_ECC_BCH8_CODE_HW\n");
808 /* check ecc-scheme requirements before updating ecc info */
809 if ((14 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
810 printf("nand: error: insufficient OOB: require=%d\n", (
811 (14 * eccsteps) + BADBLOCK_MARKER_LENGTH));
812 return -EINVAL;
813 }
814 /* intialize ELM for ECC error detection */
815 elm_init();
pekon gupta92332792014-04-11 12:55:33 +0530816 info->control = NULL;
pekon guptad016dc42013-11-18 19:03:00 +0530817 /* populate ecc specific fields */
Nikita Kiryanovfcd05242013-12-17 15:18:01 +0200818 memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl));
pekon guptad016dc42013-11-18 19:03:00 +0530819 nand->ecc.mode = NAND_ECC_HW;
820 nand->ecc.strength = 8;
821 nand->ecc.size = SECTOR_BYTES;
822 nand->ecc.bytes = 14;
pekon guptaf5f1f612013-11-19 11:02:15 +0530823 nand->ecc.hwctl = omap_enable_hwecc;
pekon guptad016dc42013-11-18 19:03:00 +0530824 nand->ecc.correct = omap_correct_data_bch;
pekon gupta71a7f952013-11-19 11:02:16 +0530825 nand->ecc.calculate = omap_calculate_ecc;
pekon guptad016dc42013-11-18 19:03:00 +0530826 nand->ecc.read_page = omap_read_page_bch;
827 /* define ecc-layout */
828 ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
829 for (i = 0; i < ecclayout->eccbytes; i++)
830 ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH;
831 ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
832 ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes -
833 BADBLOCK_MARKER_LENGTH;
pekon guptad016dc42013-11-18 19:03:00 +0530834 break;
835#else
836 printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n");
837 return -EINVAL;
838#endif
839
pekon gupta46840f62014-06-02 17:14:42 +0530840 case OMAP_ECC_BCH16_CODE_HW:
841#ifdef CONFIG_NAND_OMAP_ELM
842 debug("nand: using OMAP_ECC_BCH16_CODE_HW\n");
843 /* check ecc-scheme requirements before updating ecc info */
844 if ((26 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) {
845 printf("nand: error: insufficient OOB: require=%d\n", (
846 (26 * eccsteps) + BADBLOCK_MARKER_LENGTH));
847 return -EINVAL;
848 }
849 /* intialize ELM for ECC error detection */
850 elm_init();
851 /* populate ecc specific fields */
852 nand->ecc.mode = NAND_ECC_HW;
853 nand->ecc.size = SECTOR_BYTES;
854 nand->ecc.bytes = 26;
855 nand->ecc.strength = 16;
856 nand->ecc.hwctl = omap_enable_hwecc;
857 nand->ecc.correct = omap_correct_data_bch;
858 nand->ecc.calculate = omap_calculate_ecc;
859 nand->ecc.read_page = omap_read_page_bch;
860 /* define ecc-layout */
861 ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
862 for (i = 0; i < ecclayout->eccbytes; i++)
863 ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH;
864 ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH;
865 ecclayout->oobfree[0].length = oobsize - nand->ecc.bytes -
866 BADBLOCK_MARKER_LENGTH;
867 break;
868#else
869 printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n");
870 return -EINVAL;
871#endif
pekon guptad016dc42013-11-18 19:03:00 +0530872 default:
873 debug("nand: error: ecc scheme not enabled or supported\n");
874 return -EINVAL;
875 }
Nikita Kiryanoveb237a12013-12-16 19:19:01 +0200876
877 /* nand_scan_tail() sets ham1 sw ecc; hw ecc layout is set by driver */
878 if (ecc_scheme != OMAP_ECC_HAM1_CODE_SW)
879 nand->ecc.layout = ecclayout;
880
pekon gupta92332792014-04-11 12:55:33 +0530881 info->ecc_scheme = ecc_scheme;
pekon guptad016dc42013-11-18 19:03:00 +0530882 return 0;
883}
Andreas Bießmann4a093002013-04-05 04:55:21 +0000884
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400885#ifndef CONFIG_SPL_BUILD
Dirk Behme12201a12008-12-14 09:47:16 +0100886/*
Andreas Bießmannda634ae2013-04-04 23:52:50 +0000887 * omap_nand_switch_ecc - switch the ECC operation between different engines
888 * (h/w and s/w) and different algorithms (hamming and BCHx)
Dirk Behme12201a12008-12-14 09:47:16 +0100889 *
Andreas Bießmannda634ae2013-04-04 23:52:50 +0000890 * @hardware - true if one of the HW engines should be used
891 * @eccstrength - the number of bits that could be corrected
892 * (1 - hamming, 4 - BCH4, 8 - BCH8, 16 - BCH16)
Dirk Behme12201a12008-12-14 09:47:16 +0100893 */
pekon guptad016dc42013-11-18 19:03:00 +0530894int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
Dirk Behme12201a12008-12-14 09:47:16 +0100895{
896 struct nand_chip *nand;
Mugunthan V Nad92dff2017-06-26 19:12:51 -0500897 struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
pekon guptad016dc42013-11-18 19:03:00 +0530898 int err = 0;
Dirk Behme12201a12008-12-14 09:47:16 +0100899
Mugunthan V Nad92dff2017-06-26 19:12:51 -0500900 if (!mtd) {
pekon guptad016dc42013-11-18 19:03:00 +0530901 printf("nand: error: no NAND devices found\n");
902 return -ENODEV;
Dirk Behme12201a12008-12-14 09:47:16 +0100903 }
904
Scott Wood17cb4b82016-05-30 13:57:56 -0500905 nand = mtd_to_nand(mtd);
Dirk Behme12201a12008-12-14 09:47:16 +0100906 nand->options |= NAND_OWN_BUFFERS;
Jeroen Hofstee13fbde62014-01-15 17:58:54 +0100907 nand->options &= ~NAND_SUBPAGE_READ;
Dirk Behme12201a12008-12-14 09:47:16 +0100908 /* Setup the ecc configurations again */
Andreas Bießmannda634ae2013-04-04 23:52:50 +0000909 if (hardware) {
910 if (eccstrength == 1) {
pekon guptad016dc42013-11-18 19:03:00 +0530911 err = omap_select_ecc_scheme(nand,
912 OMAP_ECC_HAM1_CODE_HW,
913 mtd->writesize, mtd->oobsize);
914 } else if (eccstrength == 8) {
915 err = omap_select_ecc_scheme(nand,
916 OMAP_ECC_BCH8_CODE_HW,
917 mtd->writesize, mtd->oobsize);
Heiko Schocher3a504d92016-06-07 08:55:42 +0200918 } else if (eccstrength == 16) {
919 err = omap_select_ecc_scheme(nand,
920 OMAP_ECC_BCH16_CODE_HW,
921 mtd->writesize, mtd->oobsize);
pekon guptad016dc42013-11-18 19:03:00 +0530922 } else {
923 printf("nand: error: unsupported ECC scheme\n");
924 return -EINVAL;
Andreas Bießmannda634ae2013-04-04 23:52:50 +0000925 }
Dirk Behme12201a12008-12-14 09:47:16 +0100926 } else {
Ash Charlesb0508982015-02-18 11:25:11 -0800927 if (eccstrength == 1) {
928 err = omap_select_ecc_scheme(nand,
929 OMAP_ECC_HAM1_CODE_SW,
pekon guptad016dc42013-11-18 19:03:00 +0530930 mtd->writesize, mtd->oobsize);
Ash Charlesb0508982015-02-18 11:25:11 -0800931 } else if (eccstrength == 8) {
932 err = omap_select_ecc_scheme(nand,
933 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
934 mtd->writesize, mtd->oobsize);
935 } else {
936 printf("nand: error: unsupported ECC scheme\n");
937 return -EINVAL;
938 }
Dirk Behme12201a12008-12-14 09:47:16 +0100939 }
940
941 /* Update NAND handling after ECC mode switch */
pekon guptad016dc42013-11-18 19:03:00 +0530942 if (!err)
943 err = nand_scan_tail(mtd);
944 return err;
Dirk Behme12201a12008-12-14 09:47:16 +0100945}
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400946#endif /* CONFIG_SPL_BUILD */
Dirk Behme12201a12008-12-14 09:47:16 +0100947
948/*
949 * Board-specific NAND initialization. The following members of the
950 * argument are board-specific:
951 * - IO_ADDR_R: address to read the 8 I/O lines of the flash device
952 * - IO_ADDR_W: address to write the 8 I/O lines of the flash device
953 * - cmd_ctrl: hardwarespecific function for accesing control-lines
954 * - waitfunc: hardwarespecific function for accesing device ready/busy line
955 * - ecc.hwctl: function to enable (reset) hardware ecc generator
956 * - ecc.mode: mode of ecc, see defines
957 * - chip_delay: chip dependent delay for transfering data from array to
958 * read regs (tR)
959 * - options: various chip options. They can partly be set to inform
960 * nand_scan about special functionality. See the defines for further
961 * explanation
962 */
963int board_nand_init(struct nand_chip *nand)
964{
965 int32_t gpmc_config = 0;
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +0200966 int cs = cs_next++;
pekon guptad016dc42013-11-18 19:03:00 +0530967 int err = 0;
Dirk Behme12201a12008-12-14 09:47:16 +0100968 /*
969 * xloader/Uboot's gpmc configuration would have configured GPMC for
970 * nand type of memory. The following logic scans and latches on to the
971 * first CS with NAND type memory.
972 * TBD: need to make this logic generic to handle multiple CS NAND
973 * devices.
974 */
975 while (cs < GPMC_MAX_CS) {
Dirk Behme12201a12008-12-14 09:47:16 +0100976 /* Check if NAND type is set */
Dirk Behme89411352009-08-08 09:30:22 +0200977 if ((readl(&gpmc_cfg->cs[cs].config1) & 0xC00) == 0x800) {
Dirk Behme12201a12008-12-14 09:47:16 +0100978 /* Found it!! */
979 break;
980 }
981 cs++;
982 }
983 if (cs >= GPMC_MAX_CS) {
pekon guptad016dc42013-11-18 19:03:00 +0530984 printf("nand: error: Unable to find NAND settings in "
Dirk Behme12201a12008-12-14 09:47:16 +0100985 "GPMC Configuration - quitting\n");
986 return -ENODEV;
987 }
988
Dirk Behme89411352009-08-08 09:30:22 +0200989 gpmc_config = readl(&gpmc_cfg->config);
Dirk Behme12201a12008-12-14 09:47:16 +0100990 /* Disable Write protect */
991 gpmc_config |= 0x10;
Dirk Behme89411352009-08-08 09:30:22 +0200992 writel(gpmc_config, &gpmc_cfg->config);
Dirk Behme12201a12008-12-14 09:47:16 +0100993
Dirk Behme89411352009-08-08 09:30:22 +0200994 nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
995 nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
Rostislav Lisovy5c3f7e02014-09-02 16:23:58 +0200996 omap_nand_info[cs].control = NULL;
997 omap_nand_info[cs].cs = cs;
Michal Sojkad8af3932015-02-17 17:08:37 +0100998 omap_nand_info[cs].ws = wscfg[cs];
Scott Wood17cb4b82016-05-30 13:57:56 -0500999 nand_set_controller_data(nand, &omap_nand_info[cs]);
pekon guptad016dc42013-11-18 19:03:00 +05301000 nand->cmd_ctrl = omap_nand_hwcontrol;
1001 nand->options |= NAND_NO_PADDING | NAND_CACHEPRG;
Dirk Behme12201a12008-12-14 09:47:16 +01001002 nand->chip_delay = 100;
pekon guptad016dc42013-11-18 19:03:00 +05301003 nand->ecc.layout = &omap_ecclayout;
Mansoor Ahamedc3754e92012-11-06 13:06:33 +00001004
pekon guptab80a6602014-05-06 00:46:19 +05301005 /* configure driver and controller based on NAND device bus-width */
1006 gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
1007#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT)
1008 nand->options |= NAND_BUSWIDTH_16;
1009 writel(gpmc_config | (0x1 << 12), &gpmc_cfg->cs[cs].config1);
1010#else
1011 nand->options &= ~NAND_BUSWIDTH_16;
1012 writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg->cs[cs].config1);
1013#endif
pekon guptad016dc42013-11-18 19:03:00 +05301014 /* select ECC scheme */
pekon gupta3f719062013-11-18 19:03:01 +05301015#if defined(CONFIG_NAND_OMAP_ECCSCHEME)
1016 err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,
pekon guptad016dc42013-11-18 19:03:00 +05301017 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE);
pekon gupta3f719062013-11-18 19:03:01 +05301018#else
1019 /* pagesize and oobsize are not required to configure sw ecc-scheme */
pekon guptad016dc42013-11-18 19:03:00 +05301020 err = omap_select_ecc_scheme(nand, OMAP_ECC_HAM1_CODE_SW,
1021 0, 0);
Andreas Bießmann4a093002013-04-05 04:55:21 +00001022#endif
pekon guptad016dc42013-11-18 19:03:00 +05301023 if (err)
1024 return err;
Simon Schwarz12c2f1e2011-09-14 15:30:16 -04001025
Jeroen Hofsteecb2fc332015-05-30 10:11:24 +02001026#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
1027 nand->read_buf = omap_nand_read_prefetch;
1028#else
Simon Schwarz12c2f1e2011-09-14 15:30:16 -04001029 if (nand->options & NAND_BUSWIDTH_16)
1030 nand->read_buf = nand_read_buf16;
Egli, Samuel89831112015-02-13 15:47:10 +01001031 else
1032 nand->read_buf = nand_read_buf;
Simon Schwarz12c2f1e2011-09-14 15:30:16 -04001033#endif
Stefan Roesefb384c42014-11-13 03:43:39 +01001034
1035 nand->dev_ready = omap_dev_ready;
1036
Dirk Behme12201a12008-12-14 09:47:16 +01001037 return 0;
1038}