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Masahiro Yamadad90a5a32015-08-27 12:44:29 +09001#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Marek BehĂșnde2069c2018-03-02 09:56:00 +010050 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
Simon Glass458a0702015-08-30 16:55:12 -060053 The driver is typically controlled by the device tree.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090054
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
Patrick Delaunayc20851b2019-08-02 14:48:00 +020062config PINCONF_RECURSIVE
63 bool "Support recursive binding for pin configuration nodes"
64 depends on PINCTRL_FULL
65 default n if ARCH_STM32MP
66 default y
67 help
68 In the Linux pinctrl binding, the pin configuration nodes need not be
69 direct children of the pin controller device (may be grandchildren for
70 example). It is define is each individual pin controller device.
71 Say Y here if you want to keep this behavior with the pinconfig
Yuan Fang423e3242021-09-08 19:06:48 +080072 u-class: all sub are recursively bounded.
Patrick Delaunayc20851b2019-08-02 14:48:00 +020073 If the option is disabled, this behavior is deactivated and only
74 the direct children of pin controller will be assumed as pin
75 configuration; you can save memory footprint when this feature is
76 no needed.
77
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090078config SPL_PINCTRL
Philipp Tomsich0fa0abe2017-07-26 12:27:42 +020079 bool "Support pin controllers in SPL"
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090080 depends on SPL && SPL_DM
81 help
82 This option is an SPL-variant of the PINCTRL option.
83 See the help of PINCTRL for details.
84
Simon Glass8aeafb52019-12-06 21:41:45 -070085config TPL_PINCTRL
86 bool "Support pin controllers in TPL"
87 depends on TPL && TPL_DM
88 help
89 This option is an TPL variant of the PINCTRL option.
90 See the help of PINCTRL for details.
91
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090092config SPL_PINCTRL_FULL
93 bool "Support full pin controllers in SPL"
94 depends on SPL_PINCTRL && SPL_OF_CONTROL
Vikas Manochab9747692017-05-28 12:55:10 -070095 default n if TARGET_STM32F746_DISCO
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090096 default y
97 help
98 This option is an SPL-variant of the PINCTRL_FULL option.
99 See the help of PINCTRL_FULL for details.
100
Simon Glass8aeafb52019-12-06 21:41:45 -0700101config TPL_PINCTRL_FULL
102 bool "Support full pin controllers in TPL"
103 depends on TPL_PINCTRL && TPL_OF_CONTROL
104 help
105 This option is an TPL-variant of the PINCTRL_FULL option.
106 See the help of PINCTRL_FULL for details.
107
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900108config SPL_PINCTRL_GENERIC
109 bool "Support generic pin controllers in SPL"
110 depends on SPL_PINCTRL_FULL
111 default y
112 help
113 This option is an SPL-variant of the PINCTRL_GENERIC option.
114 See the help of PINCTRL_GENERIC for details.
115
116config SPL_PINMUX
117 bool "Support pin multiplexing controllers in SPL"
118 depends on SPL_PINCTRL_GENERIC
119 default y
120 help
121 This option is an SPL-variant of the PINMUX option.
122 See the help of PINMUX for details.
Simon Glass458a0702015-08-30 16:55:12 -0600123 The pinctrl subsystem can add a substantial overhead to the SPL
124 image since it typically requires quite a few tables either in the
125 driver or in the device tree. If this is acceptable and you need
126 to adjust pin multiplexing in SPL in order to boot into U-Boot,
127 enable this option. You will need to enable device tree in SPL
128 for this to work.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900129
130config SPL_PINCONF
131 bool "Support pin configuration controllers in SPL"
132 depends on SPL_PINCTRL_GENERIC
133 help
134 This option is an SPL-variant of the PINCONF option.
135 See the help of PINCONF for details.
136
Patrick Delaunayc20851b2019-08-02 14:48:00 +0200137config SPL_PINCONF_RECURSIVE
138 bool "Support recursive binding for pin configuration nodes in SPL"
139 depends on SPL_PINCTRL_FULL
140 default n if ARCH_STM32MP
141 default y
142 help
143 This option is an SPL-variant of the PINCONF_RECURSIVE option.
144 See the help of PINCONF_RECURSIVE for details.
145
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900146if PINCTRL || SPL_PINCTRL
147
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200148config PINCTRL_AR933X
Wills Wanga79d0642016-03-16 16:59:55 +0800149 bool "QCA/Athores ar933x pin control driver"
150 depends on DM && SOC_AR933X
151 help
152 Support pin multiplexing control on QCA/Athores ar933x SoCs.
153 The driver is controlled by a device tree node which contains
154 both the GPIO definitions and pin control functions for each
155 available multiplex function.
156
Wenyou Yang9319a752017-03-23 12:44:37 +0800157config PINCTRL_AT91
158 bool "AT91 pinctrl driver"
159 depends on DM
160 help
161 This option is to enable the AT91 pinctrl driver for AT91 PIO
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200162 controller.
163
164 AT91 PIO controller is a combined gpio-controller, pin-mux and
165 pin-config module. Each I/O pin may be dedicated as a general-purpose
166 I/O or be assigned to a function of an embedded peripheral. Each I/O
167 pin has a glitch filter providing rejection of glitches lower than
168 one-half of peripheral clock cycle and a debouncing filter providing
169 rejection of unwanted pulses from key or push button operations. You
170 can also control the multi-driver capability, pull-up and pull-down
171 feature on each I/O pin.
Wenyou Yang9319a752017-03-23 12:44:37 +0800172
Wenyou Yangac72e172016-07-20 17:16:27 +0800173config PINCTRL_AT91PIO4
174 bool "AT91 PIO4 pinctrl driver"
175 depends on DM
176 help
177 This option is to enable the AT91 pinctrl driver for AT91 PIO4
178 controller which is available on SAMA5D2 SoC.
179
Simon Glass74749f12019-12-06 21:42:53 -0700180config PINCTRL_INTEL
181 bool "Standard Intel pin-control and pin-mux driver"
182 help
183 Recent Intel chips such as Apollo Lake (APL) use a common pin control
184 and GPIO scheme. The settings for this come from an SoC-specific
185 driver which must be separately enabled. The driver supports setting
186 pins on start-up and changing the GPIO attributes.
187
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200188config PINCTRL_PIC32
189 bool "Microchip PIC32 pin-control and pin-mux driver"
190 depends on DM && MACH_PIC32
191 default y
192 help
193 Supports individual pin selection and configuration for each
194 remappable peripheral available on Microchip PIC32
195 SoCs. This driver is controlled by a device tree node which
Chris Packhamcb4d1bb2019-01-13 22:13:26 +1300196 contains both GPIO definition and pin control functions.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200197
198config PINCTRL_QCA953X
199 bool "QCA/Athores qca953x pin control driver"
200 depends on DM && SOC_QCA953X
201 help
202 Support pin multiplexing control on QCA/Athores qca953x SoCs.
203
204 The driver is controlled by a device tree node which contains both
205 the GPIO definitions and pin control functions for each available
206 multiplex function.
207
Heiko Schocher5990b052020-02-03 10:23:53 +0100208config PINCTRL_QE
209 bool "QE based pinctrl driver, like on mpc83xx"
210 depends on DM
211 help
212 This option is to enable the QE pinctrl driver for QE based io
213 controller.
214
Andy Yan09aa7c42017-06-01 18:00:10 +0800215config PINCTRL_ROCKCHIP_RV1108
216 bool "Rockchip rv1108 pin control driver"
217 depends on DM
218 help
219 Support pin multiplexing control on Rockchip rv1108 SoC.
220
221 The driver is controlled by a device tree node which contains
222 both the GPIO definitions and pin control functions for each
223 available multiplex function.
224
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900225config PINCTRL_SANDBOX
226 bool "Sandbox pinctrl driver"
227 depends on SANDBOX
228 help
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200229 This enables pinctrl driver for sandbox.
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900230
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200231 Currently, this driver actually does nothing but print debug
232 messages when pinctrl operations are invoked.
Vikas Manocha94d53082017-02-12 10:25:49 -0800233
Felix Brack44d5c372017-03-22 11:26:44 +0100234config PINCTRL_SINGLE
235 bool "Single register pin-control and pin-multiplex driver"
236 depends on DM
237 help
238 This enables pinctrl driver for systems using a single register for
239 pin configuration and multiplexing. TI's AM335X SoCs are examples of
240 such systems.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200241
Felix Brack44d5c372017-03-22 11:26:44 +0100242 Depending on the platform make sure to also enable OF_TRANSLATE and
243 eventually SPL_OF_TRANSLATE to get correct address translations.
244
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200245config PINCTRL_STI
246 bool "STMicroelectronics STi pin-control and pin-mux driver"
247 depends on DM && ARCH_STI
248 default y
249 help
250 Support pin multiplexing control on STMicrolectronics STi SoCs.
251
252 The driver is controlled by a device tree node which contains both
253 the GPIO definitions and pin control functions for each available
254 multiplex function.
255
256config PINCTRL_STM32
257 bool "ST STM32 pin control driver"
258 depends on DM
259 help
260 Supports pin multiplexing control on stm32 SoCs.
261
262 The driver is controlled by a device tree node which contains both
263 the GPIO definitions and pin control functions for each available
264 multiplex function.
265
Patrick Delaunay82624352019-03-11 11:13:15 +0100266config PINCTRL_STMFX
267 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
268 depends on DM && PINCTRL_FULL
269 help
270 I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
271 GPIO expander.
272 Supports pin multiplexing control on stm32 SoCs.
273
274 The driver is controlled by a device tree node which contains both
275 the GPIO definitions and pin control functions for each available
276 multiplex function.
277
278config SPL_PINCTRL_STMFX
279 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
280 depends on SPL_PINCTRL_FULL
281 help
282 This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
283 See the help of PINCTRL_STMFX for details.
284
maxims@google.com4f0e44e2017-04-17 12:00:27 -0700285config ASPEED_AST2500_PINCTRL
Michal Simek171fd222020-07-23 09:00:40 +0200286 bool "Aspeed AST2500 pin control driver"
287 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
288 default y
289 help
290 Support pin multiplexing control on Aspeed ast2500 SoC. The driver
291 uses Generic Pinctrl framework and is compatible with the Linux
292 driver, i.e. it uses the same device tree configuration.
maxims@google.com4f0e44e2017-04-17 12:00:27 -0700293
Sean Anderson7224d5c2020-09-14 11:01:58 -0400294config PINCTRL_K210
295 bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
296 depends on DM && PINCTRL_GENERIC
297 help
298 Support pin multiplexing on the K210. The "FPIOA" can remap any
299 supported function to any multifunctional IO pin. It can also perform
300 basic GPIO functions, such as reading the current value of a pin.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900301endif
302
Philipp Tomsichefc46772019-02-01 15:11:48 +0100303source "drivers/pinctrl/broadcom/Kconfig"
304source "drivers/pinctrl/exynos/Kconfig"
Simon Glass74749f12019-12-06 21:42:53 -0700305source "drivers/pinctrl/intel/Kconfig"
Ryder Lee01aa9d12018-11-15 10:07:58 +0800306source "drivers/pinctrl/mediatek/Kconfig"
Philipp Tomsichefc46772019-02-01 15:11:48 +0100307source "drivers/pinctrl/meson/Kconfig"
308source "drivers/pinctrl/mscc/Kconfig"
Weijie Gao3fad4412019-09-25 17:45:26 +0800309source "drivers/pinctrl/mtmips/Kconfig"
Philipp Tomsichefc46772019-02-01 15:11:48 +0100310source "drivers/pinctrl/mvebu/Kconfig"
Stefan Bosch8d393b22020-07-10 19:07:30 +0200311source "drivers/pinctrl/nexell/Kconfig"
Peng Fan745df682016-02-03 10:06:07 +0800312source "drivers/pinctrl/nxp/Kconfig"
Marek Vasut910df4d2017-09-15 21:13:55 +0200313source "drivers/pinctrl/renesas/Kconfig"
Philipp Tomsich5a127322019-02-01 15:15:38 +0100314source "drivers/pinctrl/rockchip/Kconfig"
Masahiro Yamada5dc626f2015-09-11 20:17:32 +0900315source "drivers/pinctrl/uniphier/Kconfig"
316
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900317endmenu