blob: da1a72f0252bb8a0ca5cac54a064c9c995c7db5b [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chouc8a7ba92015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08004 */
5
6#include <common.h>
Sean Andersona5d4f862020-10-04 21:39:52 -04007#include <clk.h>
Sean Anderson35761212020-09-28 10:52:22 -04008#include <cpu.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08009#include <dm.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +053010#include <dm/lists.h>
Sean Andersona5d4f862020-10-04 21:39:52 -040011#include <dm/device_compat.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +053012#include <dm/device-internal.h>
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020013#include <dm/root.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080014#include <errno.h>
Sean Andersona5d4f862020-10-04 21:39:52 -040015#include <init.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080016#include <timer.h>
Simon Glass61b29b82020-02-03 07:36:15 -070017#include <linux/err.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080018
Bin Meng579eb5a2015-11-13 00:11:15 -080019DECLARE_GLOBAL_DATA_PTR;
20
Thomas Chouc8a7ba92015-10-09 13:46:34 +080021/*
Bin Meng435ae762015-11-13 00:11:14 -080022 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Meng9ca07eb2015-11-24 13:31:17 -070023 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Chouc8a7ba92015-10-09 13:46:34 +080024 * the input clock frequency of the timer. The get_count() method is used
Bin Meng9ca07eb2015-11-24 13:31:17 -070025 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Chouc8a7ba92015-10-09 13:46:34 +080026 * the value should be inversed inside the method. There may be no real
27 * tick, and no timer interrupt.
28 */
29
Simon Glass4f051822016-02-24 09:14:48 -070030int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080031{
32 const struct timer_ops *ops = device_get_ops(dev);
33
34 if (!ops->get_count)
35 return -ENOSYS;
36
Sean Anderson8af7bb92020-10-07 14:37:44 -040037 *count = ops->get_count(dev);
38 return 0;
Thomas Chouc8a7ba92015-10-09 13:46:34 +080039}
40
Simon Glass4f051822016-02-24 09:14:48 -070041unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080042{
Simon Glass0fd3d912020-12-22 19:30:28 -070043 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Thomas Chouc8a7ba92015-10-09 13:46:34 +080044
45 return uc_priv->clock_rate;
46}
47
Bin Meng579eb5a2015-11-13 00:11:15 -080048static int timer_pre_probe(struct udevice *dev)
49{
Philipp Tomsichb1a16002017-07-28 17:19:58 +020050#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Bin Meng579eb5a2015-11-13 00:11:15 -080051 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Zakharov Vlada5acafb2016-12-09 17:18:32 +030052 struct clk timer_clk;
53 int err;
54 ulong ret;
Bin Meng579eb5a2015-11-13 00:11:15 -080055
Bin Meng7efb4a62019-07-05 09:23:15 -070056 /* It is possible that a timer device has a null ofnode */
Simon Glass7d14ee42020-12-19 10:40:13 -070057 if (!dev_has_ofnode(dev))
Bin Meng7efb4a62019-07-05 09:23:15 -070058 return 0;
59
Zakharov Vlada5acafb2016-12-09 17:18:32 +030060 err = clk_get_by_index(dev, 0, &timer_clk);
61 if (!err) {
62 ret = clk_get_rate(&timer_clk);
63 if (IS_ERR_VALUE(ret))
64 return ret;
65 uc_priv->clock_rate = ret;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020066 } else {
67 uc_priv->clock_rate =
68 dev_read_u32_default(dev, "clock-frequency", 0);
69 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +020070#endif
Bin Meng579eb5a2015-11-13 00:11:15 -080071
72 return 0;
73}
74
Stephen Warren0a7edce2016-01-06 10:33:03 -070075static int timer_post_probe(struct udevice *dev)
76{
77 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
78
79 if (!uc_priv->clock_rate)
80 return -EINVAL;
81
82 return 0;
83}
84
Sean Anderson35761212020-09-28 10:52:22 -040085/*
86 * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on
87 * the end...
88 */
89#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT)
90int timer_timebase_fallback(struct udevice *dev)
91{
92 struct udevice *cpu;
Simon Glass8a8d24b2020-12-03 16:55:23 -070093 struct cpu_plat *cpu_plat;
Sean Anderson35761212020-09-28 10:52:22 -040094 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
95
96 /* Did we get our clock rate from the device tree? */
97 if (uc_priv->clock_rate)
98 return 0;
99
100 /* Fall back to timebase-frequency */
101 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
102 cpu = cpu_get_current_dev();
103 if (!cpu)
104 return -ENODEV;
105
Simon Glasscaa4daa2020-12-03 16:55:18 -0700106 cpu_plat = dev_get_parent_plat(cpu);
Sean Anderson35761212020-09-28 10:52:22 -0400107 if (!cpu_plat)
108 return -ENODEV;
109
110 uc_priv->clock_rate = cpu_plat->timebase_freq;
111 return 0;
112}
113#endif
114
Bin Meng9ca07eb2015-11-24 13:31:17 -0700115u64 timer_conv_64(u32 count)
116{
117 /* increment tbh if tbl has rolled over */
118 if (count < gd->timebase_l)
119 gd->timebase_h++;
120 gd->timebase_l = count;
121 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
122}
123
Mugunthan V Nc8336972016-01-16 21:33:58 +0530124int notrace dm_timer_init(void)
125{
Mugunthan V Nc8336972016-01-16 21:33:58 +0530126 struct udevice *dev = NULL;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200127 __maybe_unused ofnode node;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530128 int ret;
129
130 if (gd->timer)
131 return 0;
132
Philipp Tomsichaf823152017-09-11 22:04:11 +0200133 /*
134 * Directly access gd->dm_root to suppress error messages, if the
135 * virtual root driver does not yet exist.
136 */
137 if (gd->dm_root == NULL)
138 return -EAGAIN;
139
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200140#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Mugunthan V Nc8336972016-01-16 21:33:58 +0530141 /* Check for a chosen timer to be used for tick */
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200142 node = ofnode_get_chosen_node("tick-timer");
143
144 if (ofnode_valid(node) &&
145 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
146 /*
147 * If the timer is not marked to be bound before
148 * relocation, bind it anyway.
149 */
Bin Meng8d773c42018-10-10 22:06:58 -0700150 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200151 ret = device_probe(dev);
152 if (ret)
153 return ret;
154 }
155 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200156#endif
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200157
158 if (!dev) {
159 /* Fall back to the first available timer */
Simon Glass3f603cb2016-02-11 13:23:26 -0700160 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V Nc8336972016-01-16 21:33:58 +0530161 if (ret)
162 return ret;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530163 }
164
165 if (dev) {
166 gd->timer = dev;
167 return 0;
168 }
169
170 return -ENODEV;
171}
172
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800173UCLASS_DRIVER(timer) = {
174 .id = UCLASS_TIMER,
175 .name = "timer",
Bin Meng579eb5a2015-11-13 00:11:15 -0800176 .pre_probe = timer_pre_probe,
Mugunthan V Na5d80112015-12-24 16:08:06 +0530177 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren0a7edce2016-01-06 10:33:03 -0700178 .post_probe = timer_post_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700179 .per_device_auto = sizeof(struct timer_dev_priv),
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800180};