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Stefan Roesec157d8e2005-08-01 16:41:48 +02001/*
Stefan Roese700200c2007-01-30 17:04:19 +01002 * (C) Copyright 2005-2007
Stefan Roese84286382005-08-11 18:03:14 +02003 * Stefan Roese, DENX Software Engineering, sr@denx.de.
Stefan Roesec157d8e2005-08-01 16:41:48 +02004 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
Stefan Roese700200c2007-01-30 17:04:19 +010025 * yosemite.h - configuration for Yosemite & Yellowstone boards
Stefan Roesec157d8e2005-08-01 16:41:48 +020026 ***********************************************************************/
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
Stefan Roese700200c2007-01-30 17:04:19 +010033/* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
34#ifndef CONFIG_YELLOWSTONE
Stefan Roese700200c2007-01-30 17:04:19 +010035#define CONFIG_440EP 1 /* Specific PPC440EP support */
36#define CONFIG_HOSTNAME yosemite
37#else
38#define CONFIG_440GR 1 /* Specific PPC440GR support */
39#define CONFIG_HOSTNAME yellowstone
40#endif
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +020041#define CONFIG_440 1 /* ... PPC440 family */
Stefan Roese700200c2007-01-30 17:04:19 +010042#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roesec157d8e2005-08-01 16:41:48 +020043#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
44
Stefan Roese72675dc2008-06-06 15:55:21 +020045/*
46 * Include common defines/options for all AMCC eval boards
47 */
48#include "amcc-common.h"
49
Stefan Roese84286382005-08-11 18:03:14 +020050#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
51#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
Stefan Roesef3443862006-10-07 11:30:52 +020052#define CONFIG_BOARD_RESET 1 /* call board_reset() */
Stefan Roese84286382005-08-11 18:03:14 +020053
Stefan Roesec157d8e2005-08-01 16:41:48 +020054/*-----------------------------------------------------------------------
55 * Base addresses -- Note these are effective addresses where the
56 * actual resources get mapped (not physical addresses)
57 *----------------------------------------------------------------------*/
Stefan Roese84286382005-08-11 18:03:14 +020058#define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
59#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
60#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
61#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
62#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020063
64/*Don't change either of these*/
Stefan Roese84286382005-08-11 18:03:14 +020065#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
66#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020067/*Don't change either of these*/
68
Stefan Roese84286382005-08-11 18:03:14 +020069#define CFG_USB_DEVICE 0x50000000
70#define CFG_NVRAM_BASE_ADDR 0x80000000
71#define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
72#define CFG_BOOT_BASE_ADDR 0xf0000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020073
74/*-----------------------------------------------------------------------
75 * Initial RAM & stack pointer (placed in SDRAM)
76 *----------------------------------------------------------------------*/
Stefan Roese887e2ec2006-09-07 11:51:23 +020077#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
Stefan Roese84286382005-08-11 18:03:14 +020078#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
Stefan Roese28d77d92008-01-30 14:48:28 +010079#define CFG_INIT_RAM_END (4 << 10)
Stefan Roese84286382005-08-11 18:03:14 +020080#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020081#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
82#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
83
Stefan Roesec157d8e2005-08-01 16:41:48 +020084/*-----------------------------------------------------------------------
85 * Serial Port
86 *----------------------------------------------------------------------*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020087#define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
Stefan Roesec157d8e2005-08-01 16:41:48 +020088/*define this if you want console on UART1*/
89#undef CONFIG_UART1_CONSOLE
90
Stefan Roesec157d8e2005-08-01 16:41:48 +020091/*-----------------------------------------------------------------------
Stefan Roese84286382005-08-11 18:03:14 +020092 * Environment
Stefan Roesec157d8e2005-08-01 16:41:48 +020093 *----------------------------------------------------------------------*/
Stefan Roese84286382005-08-11 18:03:14 +020094/*
95 * Define here the location of the environment variables (FLASH or EEPROM).
96 * Note: DENX encourages to use redundant environment in FLASH.
97 */
98#if 1
99#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
100#else
101#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
102#endif
Stefan Roesec157d8e2005-08-01 16:41:48 +0200103
104/*-----------------------------------------------------------------------
105 * FLASH related
106 *----------------------------------------------------------------------*/
Wolfgang Denk095b8a32005-08-02 17:06:17 +0200107#define CFG_FLASH_CFI /* The flash is CFI compatible */
108#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
109#define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200110
111#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
112#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
113
114#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
115#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
116
Stefan Roese278bc4b2006-05-10 15:06:58 +0200117#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
118
Stefan Roesec157d8e2005-08-01 16:41:48 +0200119#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Stefan Roese84286382005-08-11 18:03:14 +0200120
121#ifdef CFG_ENV_IS_IN_FLASH
Wolfgang Denk1636d1c2007-06-22 23:59:00 +0200122#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
Stefan Roese84286382005-08-11 18:03:14 +0200123#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
124#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
125
126/* Address and size of Redundant Environment Sector */
127#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
128#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
129#endif /* CFG_ENV_IS_IN_FLASH */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200130
131/*-----------------------------------------------------------------------
132 * DDR SDRAM
133 *----------------------------------------------------------------------*/
Wolfgang Denk095b8a32005-08-02 17:06:17 +0200134#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
Stefan Roese84286382005-08-11 18:03:14 +0200135#define CFG_KBYTES_SDRAM (128 * 1024) /* 128MB */
136#define CFG_SDRAM_BANKS (2)
137
Ira Snyder4adb3022008-04-29 11:18:54 -0700138/*-----------------------------------------------------------------------
Stefan Roesec157d8e2005-08-01 16:41:48 +0200139 * I2C
140 *----------------------------------------------------------------------*/
Stefan Roesec157d8e2005-08-01 16:41:48 +0200141#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200142
Stefan Roesec157d8e2005-08-01 16:41:48 +0200143#define CFG_I2C_MULTI_EEPROMS
Stefan Roesec157d8e2005-08-01 16:41:48 +0200144#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
145#define CFG_I2C_EEPROM_ADDR_LEN 1
146#define CFG_EEPROM_PAGE_WRITE_ENABLE
147#define CFG_EEPROM_PAGE_WRITE_BITS 3
148#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
149
Stefan Roese84286382005-08-11 18:03:14 +0200150#ifdef CFG_ENV_IS_IN_EEPROM
151#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
152#define CFG_ENV_OFFSET 0x0
153#endif /* CFG_ENV_IS_IN_EEPROM */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200154
Stefan Roesea90921f2007-12-04 16:29:48 +0100155/* I2C SYSMON (LM75, AD7414 is almost compatible) */
156#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
157#define CONFIG_DTT_AD7414 1 /* use AD7414 */
158#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
159#define CFG_DTT_MAX_TEMP 70
160#define CFG_DTT_LOW_TEMP -30
161#define CFG_DTT_HYSTERESIS 3
162
Stefan Roese72675dc2008-06-06 15:55:21 +0200163/*
164 * Default environment variables
165 */
Stefan Roese84286382005-08-11 18:03:14 +0200166#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Roese72675dc2008-06-06 15:55:21 +0200167 CONFIG_AMCC_DEF_ENV \
168 CONFIG_AMCC_DEF_ENV_POWERPC \
169 CONFIG_AMCC_DEF_ENV_PPC_OLD \
170 CONFIG_AMCC_DEF_ENV_NOR_UPD \
Stefan Roese84286382005-08-11 18:03:14 +0200171 "kernel_addr=fc000000\0" \
Stefan Roese56ced702006-05-15 15:11:20 +0200172 "ramdisk_addr=fc180000\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200173 ""
Stefan Roese84286382005-08-11 18:03:14 +0200174
Ira Snyder4adb3022008-04-29 11:18:54 -0700175#define CONFIG_HAS_ETH0 1 /* add support for "ethaddr" */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200176#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
177#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
Stefan Roese72675dc2008-06-06 15:55:21 +0200178#define CONFIG_PHY1_ADDR 3
Stefan Roesec157d8e2005-08-01 16:41:48 +0200179
180/* Partitions */
181#define CONFIG_MAC_PARTITION
182#define CONFIG_DOS_PARTITION
183#define CONFIG_ISO_PARTITION
184
Stefan Roese846b0dd2005-08-08 12:42:22 +0200185#ifdef CONFIG_440EP
Stefan Roesec157d8e2005-08-01 16:41:48 +0200186/* USB */
Markus Klotzbuecher7b59b3c2006-11-27 11:44:58 +0100187#define CONFIG_USB_OHCI_NEW
Stefan Roesec157d8e2005-08-01 16:41:48 +0200188#define CONFIG_USB_STORAGE
Markus Klotzbuecherdace45a2007-06-06 11:49:43 +0200189#define CFG_OHCI_BE_CONTROLLER
Stefan Roesec157d8e2005-08-01 16:41:48 +0200190
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +0100191#undef CFG_USB_OHCI_BOARD_INIT
192#define CFG_USB_OHCI_CPU_INIT 1
193#define CFG_USB_OHCI_REGS_BASE (CFG_PERIPHERAL_BASE | 0x1000)
194#define CFG_USB_OHCI_SLOT_NAME "ppc440"
195#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
196
Stefan Roese700200c2007-01-30 17:04:19 +0100197/* Comment this out to enable USB 1.1 device */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200198#define USB_2_0_DEVICE
Stefan Roese700200c2007-01-30 17:04:19 +0100199
Stefan Roese700200c2007-01-30 17:04:19 +0100200#define CONFIG_SUPPORT_VFAT
Stefan Roese700200c2007-01-30 17:04:19 +0100201#endif /* CONFIG_440EP */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200202
203#ifdef DEBUG
204#define CONFIG_PANIC_HANG
205#else
206#define CONFIG_HW_WATCHDOG /* watchdog */
207#endif
208
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500209/*
Stefan Roese72675dc2008-06-06 15:55:21 +0200210 * Commands additional to the ones defined in amcc-common.h
Jon Loeliger079a1362007-07-10 10:12:10 -0500211 */
Stefan Roesea90921f2007-12-04 16:29:48 +0100212#define CONFIG_CMD_DTT
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500213#define CONFIG_CMD_PCI
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500214
215#ifdef CONFIG_440EP
216 #define CONFIG_CMD_USB
217 #define CONFIG_CMD_FAT
218 #define CONFIG_CMD_EXT2
219#endif
220
Stefan Roesec157d8e2005-08-01 16:41:48 +0200221/*-----------------------------------------------------------------------
222 * PCI stuff
223 *-----------------------------------------------------------------------
224 */
225/* General PCI */
Stefan Roese84286382005-08-11 18:03:14 +0200226#define CONFIG_PCI /* include pci support */
227#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
228#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
229#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
Stefan Roesec157d8e2005-08-01 16:41:48 +0200230
231/* Board-specific PCI */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200232#define CFG_PCI_TARGET_INIT
233#define CFG_PCI_MASTER_INIT
234
Stefan Roese84286382005-08-11 18:03:14 +0200235#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
236#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200237
Stefan Roesec157d8e2005-08-01 16:41:48 +0200238/*-----------------------------------------------------------------------
Stefan Roese36adff32007-01-13 07:59:19 +0100239 * External Bus Controller (EBC) Setup
240 *----------------------------------------------------------------------*/
241#define CFG_FLASH CFG_FLASH_BASE
242#define CFG_CPLD 0x80000000
243
244/* Memory Bank 0 (NOR-FLASH) initialization */
245#define CFG_EBC_PB0AP 0x03017300
246#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
247
248/* Memory Bank 2 (CPLD) initialization */
249#define CFG_EBC_PB2AP 0x04814500
250#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
251
Stefan Roese5a5958b2007-10-15 11:29:33 +0200252#define CFG_BCSR5_PCI66EN 0x80
253
Stefan Roesec157d8e2005-08-01 16:41:48 +0200254#endif /* __CONFIG_H */