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Wolfgang Denk86ea5f92006-02-22 00:43:16 +01001/*
Detlev Zundela99715b2008-04-18 14:50:01 +02002 * (C) Copyright 2006-2008
Wolfgang Denk86ea5f92006-02-22 00:43:16 +01003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5200
33#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
34#define CONFIG_MCC200 1 /* ... on MCC200 board */
35
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010037
38#define CONFIG_MISC_INIT_R
39
Wolfgang Denk360b4102006-09-03 18:17:46 +020040#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
41#define BOOTFLAG_WARM 0x02 /* Software reboot */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010042
Becky Bruce31d82672008-05-08 19:02:12 -050043#define CONFIG_HIGH_BATS 1 /* High BATs supported */
44
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010045/*
46 * Serial console configuration
Wolfgang Denk87791f32006-07-11 00:23:54 +020047 *
48 * To select console on the one of 8 external UARTs,
49 * define CONFIG_QUART_CONSOLE as 1, 2, 3, or 4 for the first Quad UART,
50 * or as 5, 6, 7, or 8 for the second Quad UART.
Wolfgang Denk463764c2006-08-17 00:36:51 +020051 * COM11, COM12, COM13, COM14 are located on the second Quad UART.
Wolfgang Denk87791f32006-07-11 00:23:54 +020052 *
53 * CONFIG_PSC_CONSOLE must be undefined in this case.
54 */
Wolfgang Denked1cf842006-08-24 00:26:42 +020055#if !defined(CONFIG_PRS200)
56/* MCC200 configuration: */
Wolfgang Denk463764c2006-08-17 00:36:51 +020057#ifdef CONFIG_CONSOLE_COM12
58#define CONFIG_QUART_CONSOLE 6 /* console is on UARTF of QUART2 */
59#else
60#define CONFIG_QUART_CONSOLE 8 /* console is on UARTH of QUART2 */
61#endif
Wolfgang Denked1cf842006-08-24 00:26:42 +020062#else
63/* PRS200 configuration: */
64#undef CONFIG_QUART_CONSOLE
65#endif /* CONFIG_PRS200 */
Wolfgang Denk87791f32006-07-11 00:23:54 +020066/*
67 * To select console on PSC1, define CONFIG_PSC_CONSOLE as 1
68 * and undefine CONFIG_QUART_CONSOLE.
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010069 */
Wolfgang Denked1cf842006-08-24 00:26:42 +020070#if !defined(CONFIG_PRS200)
71/* MCC200 configuration: */
Wolfgang Denk0fd30252006-08-30 23:02:10 +020072#define CONFIG_SERIAL_MULTI 1
73#define CONFIG_PSC_CONSOLE 1 /* PSC1 may be COM */
74#define CONFIG_PSC_CONSOLE2 2 /* PSC2 is PSoC */
Wolfgang Denked1cf842006-08-24 00:26:42 +020075#else
76/* PRS200 configuration: */
77#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
78#endif
Wolfgang Denk0fd30252006-08-30 23:02:10 +020079#if defined(CONFIG_QUART_CONSOLE) && defined(CONFIG_PSC_CONSOLE) && \
80 !defined(CONFIG_SERIAL_MULTI)
Wolfgang Denk87791f32006-07-11 00:23:54 +020081#error "Select only one console device!"
82#endif
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010083#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010085
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010086#define CONFIG_MII 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010087
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010088#define CONFIG_DOS_PARTITION
89
90/* USB */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010091#define CONFIG_USB_OHCI
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010092#define CONFIG_USB_STORAGE
Andrei Safronovcdb97a62006-12-08 16:23:08 +010093/* automatic software updates (see board/mcc200/auto_update.c) */
94#define CONFIG_AUTO_UPDATE 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010095
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010096
Jon Loeliger5dc11a52007-07-04 22:33:01 -050097/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050098 * BOOTP options
99 */
100#define CONFIG_BOOTP_BOOTFILESIZE
101#define CONFIG_BOOTP_BOOTPATH
102#define CONFIG_BOOTP_GATEWAY
103#define CONFIG_BOOTP_HOSTNAME
104
105
106/*
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500107 * Command line configuration.
108 */
109#include <config_cmd_default.h>
110
111#define CONFIG_CMD_BEDBUG
112#define CONFIG_CMD_FAT
113#define CONFIG_CMD_I2C
114#define CONFIG_CMD_USB
115
Wolfgang Denka4d26362007-08-12 15:11:38 +0200116#undef CONFIG_CMD_NET
117
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100118
119/*
120 * Autobooting
121 */
Wolfgang Denka4d26362007-08-12 15:11:38 +0200122#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100123
124#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +0100125 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100126 "echo"
127
128#undef CONFIG_BOOTARGS
129
Wolfgang Denk3b0ff842006-08-25 11:47:06 +0200130#define XMK_STR(x) #x
131#define MK_STR(x) XMK_STR(x)
Wolfgang Denked1cf842006-08-24 00:26:42 +0200132
133#ifdef CONFIG_PRS200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134# define CONFIG_SYS__BOARDNAME "prs200"
135# define CONFIG_SYS__LINUX_CONSOLE "ttyS0"
Wolfgang Denked1cf842006-08-24 00:26:42 +0200136#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137# define CONFIG_SYS__BOARDNAME "mcc200"
138# define CONFIG_SYS__LINUX_CONSOLE "ttyEU5"
Wolfgang Denked1cf842006-08-24 00:26:42 +0200139#endif
140
Wolfgang Denka4d26362007-08-12 15:11:38 +0200141/* Network */
142#define CONFIG_ETHADDR 00:17:17:ff:00:00
143#define CONFIG_IPADDR 10.76.9.29
144#define CONFIG_SERVERIP 10.76.9.1
145
146#include <version.h> /* For U-Boot version */
147
Wolfgang Denked1cf842006-08-24 00:26:42 +0200148#define CONFIG_EXTRA_ENV_SETTINGS \
Wolfgang Denka4d26362007-08-12 15:11:38 +0200149 "ubootver=" U_BOOT_VERSION "\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100150 "netdev=eth0\0" \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151 "hostname=" CONFIG_SYS__BOARDNAME "\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100152 "nfsargs=setenv bootargs root=/dev/nfs rw " \
153 "nfsroot=${serverip}:${rootpath}\0" \
Wolfgang Denka4d26362007-08-12 15:11:38 +0200154 "ramargs=setenv bootargs root=/dev/mtdblock2 " \
155 "rootfstype=cramfs\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100156 "addip=setenv bootargs ${bootargs} " \
157 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
158 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk113f64e2006-08-25 01:38:04 +0200159 "addcons=setenv bootargs ${bootargs} " \
Detlev Zundela99715b2008-04-18 14:50:01 +0200160 "console=${console},${baudrate} " \
161 "ubootver=${ubootver} board=${board}\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200162 "flash_nfs=run nfsargs addip addcons;" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100163 "bootm ${kernel_addr}\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200164 "flash_self=run ramargs addip addcons;" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100165 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200166 "net_nfs=tftp 200000 ${bootfile};" \
167 "run nfsargs addip addcons;bootm\0" \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168 "console=" CONFIG_SYS__LINUX_CONSOLE "\0" \
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100169 "rootpath=/opt/eldk/ppc_6xx\0" \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170 "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \
171 "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200172 "text_base=" MK_STR(TEXT_BASE) "\0" \
Wolfgang Denka4d26362007-08-12 15:11:38 +0200173 "kernel_addr=0xFC0C0000\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200174 "update=protect off ${text_base} +${filesize};" \
175 "era ${text_base} +${filesize};" \
176 "cp.b 200000 ${text_base} ${filesize}\0" \
Stefan Roese58ad4972006-02-28 15:33:28 +0100177 "unlock=yes\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100178 ""
Wolfgang Denked1cf842006-08-24 00:26:42 +0200179#undef MK_STR
180#undef XMK_STR
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100181
182#define CONFIG_BOOTCOMMAND "run flash_self"
183
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
185#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100186
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100187/*
188 * IPB Bus clocking configuration.
189 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100191
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100192/*
193 * I2C configuration
194 */
195#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100197
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
199#define CONFIG_SYS_I2C_SLAVE 0x7F
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100200
201/*
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100202 * Flash configuration (8,16 or 32 MB)
203 * TEXT base always at 0xFFF00000
204 * ENV_ADDR always at 0xFFF40000
Stefan Roese58ad4972006-02-28 15:33:28 +0100205 * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
Wolfgang Denk360b4102006-09-03 18:17:46 +0200206 * 0xFE000000 for 32 MB
207 * 0xFF000000 for 16 MB
208 * 0xFF800000 for 8 MB
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100209 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_FLASH_BASE 0xfc000000
211#define CONFIG_SYS_FLASH_SIZE 0x04000000
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100212
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200213#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200214#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100215
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100217
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
219#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100220
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
222#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100223
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
225#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100226
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200227#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
228#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
Stefan Roese58ad4972006-02-28 15:33:28 +0100229
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200230#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Stefan Roese58ad4972006-02-28 15:33:28 +0100231
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200232#define CONFIG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200233#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200234#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Stefan Roese58ad4972006-02-28 15:33:28 +0100235
236/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200237#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
238#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Stefan Roese58ad4972006-02-28 15:33:28 +0100239
240#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100241
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#if TEXT_BASE == CONFIG_SYS_FLASH_BASE
243#define CONFIG_SYS_LOWBOOT 1
Wolfgang Denkf149d862006-05-05 00:59:28 +0200244#endif
245
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100246/*
247 * Memory map
248 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200249#define CONFIG_SYS_MBAR 0xf0000000
250#define CONFIG_SYS_SDRAM_BASE 0x00000000
251#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100252
253/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
255#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100256
257
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
259#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
260#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100261
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
263#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
264# define CONFIG_SYS_RAMBOOT 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100265#endif
266
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200267#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
268#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
269#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100270
271/*
272 * Ethernet configuration
273 */
Wolfgang Denka4d26362007-08-12 15:11:38 +0200274/*#define CONFIG_MPC5xxx_FEC 1*/
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100275/*
276 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
277 */
278/* #define CONFIG_FEC_10MBIT 1 */
Stefan Roese58ad4972006-02-28 15:33:28 +0100279#define CONFIG_PHY_ADDR 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100280
281/*
Wolfgang Denke8143e72006-08-30 23:09:00 +0200282 * LCD Splash Screen
283 */
Wolfgang Denk360b4102006-09-03 18:17:46 +0200284#if !defined(CONFIG_PRS200)
Wolfgang Denke8143e72006-08-30 23:09:00 +0200285#define CONFIG_LCD 1
Sergei Poselenov638dd142007-02-27 12:40:16 +0300286#define CONFIG_PROGRESSBAR 1
Wolfgang Denk360b4102006-09-03 18:17:46 +0200287#endif
288
Wolfgang Denke8143e72006-08-30 23:09:00 +0200289#if defined(CONFIG_LCD)
290#define CONFIG_SPLASH_SCREEN 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Wolfgang Denk360b4102006-09-03 18:17:46 +0200292#define LCD_BPP LCD_MONOCHROME
Wolfgang Denke8143e72006-08-30 23:09:00 +0200293#endif
294
295/*
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100296 * GPIO configuration
297 */
Wolfgang Denkbfc81252006-03-06 13:03:37 +0100298/* 0x10000004 = 32MB SDRAM */
299/* 0x90000004 = 64MB SDRAM */
Wolfgang Denke8143e72006-08-30 23:09:00 +0200300#if defined(CONFIG_LCD)
301/* set PSC2 in UART mode */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200302#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000044
Wolfgang Denke8143e72006-08-30 23:09:00 +0200303#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000004
Wolfgang Denke8143e72006-08-30 23:09:00 +0200305#endif
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100306
307/*
308 * Miscellaneous configurable options
309 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200310#define CONFIG_SYS_LONGHELP /* undef to save memory */
311#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500312#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200313#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100314#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200315#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100316#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200317#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
318#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
319#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100320
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200321#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
322#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100323
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200324#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100325
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200326#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100327
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200328#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500329#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200330# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500331#endif
332
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100333/*
334 * Various low-level settings
335 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200336#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
337#define CONFIG_SYS_HID0_FINAL HID0_ICE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100338
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200339#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
340#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
341#define CONFIG_SYS_BOOTCS_CFG 0x0004fb00
342#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
343#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100344
Wolfgang Denk05d8dce2006-03-23 17:10:30 +0100345/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200346#define CONFIG_SYS_CS2_START 0x80000000
347#define CONFIG_SYS_CS2_SIZE 0x00001000
348#define CONFIG_SYS_CS2_CFG 0x1d300
Wolfgang Denk05d8dce2006-03-23 17:10:30 +0100349
Wolfgang Denka874c8c2006-07-06 22:31:16 +0200350/* Second Quad UART @0x80010000 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200351#define CONFIG_SYS_CS1_START 0x80010000
352#define CONFIG_SYS_CS1_SIZE 0x00001000
353#define CONFIG_SYS_CS1_CFG 0x1d300
Wolfgang Denka874c8c2006-07-06 22:31:16 +0200354
Wolfgang Denka4d26362007-08-12 15:11:38 +0200355/* Leica - build revision resistors */
356/*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200357#define CONFIG_SYS_CS3_START 0x80020000
358#define CONFIG_SYS_CS3_SIZE 0x00000004
359#define CONFIG_SYS_CS3_CFG 0x1d300
Wolfgang Denka4d26362007-08-12 15:11:38 +0200360*/
361
Wolfgang Denk87791f32006-07-11 00:23:54 +0200362/*
363 * Select one of quarts as a default
364 * console. If undefined - PSC console
365 * wil be default
366 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200367#define CONFIG_SYS_CS_BURST 0x00000000
368#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100369
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200370#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100371
Wolfgang Denk87791f32006-07-11 00:23:54 +0200372/*
373 * QUART Expanders support
374 */
375#if defined(CONFIG_QUART_CONSOLE)
376/*
377 * We'll use NS16550 chip routines,
378 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200379#define CONFIG_SYS_NS16550 1
380#define CONFIG_SYS_NS16550_SERIAL 1
Wolfgang Denk87791f32006-07-11 00:23:54 +0200381#define CONFIG_CONS_INDEX 1
382/*
383 * To achieve necessary offset on SC16C554
384 * A0-A2 (register select) pins with NS16550
385 * functions (in struct NS16550), REG_SIZE
386 * should be 4, because A0-A2 pins are connected
387 * to DA2-DA4 address bus lines.
388 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389#define CONFIG_SYS_NS16550_REG_SIZE 4
Wolfgang Denk87791f32006-07-11 00:23:54 +0200390/*
391 * LocalPlus Bus already inited in cpu_init_f(),
392 * so can work with QUART's chip selects.
393 * One of four SC16C554 UARTs is selected with
394 * A3-A4 (DA5-DA6) lines.
395 */
Wolfgang Denked1cf842006-08-24 00:26:42 +0200396#if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5) && !defined(CONFIG_PRS200)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200397#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5)
Wolfgang Denk87791f32006-07-11 00:23:54 +0200398#elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200399#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5)
Wolfgang Denk87791f32006-07-11 00:23:54 +0200400#elif
401#error "Wrong QUART expander number."
402#endif
403
404/*
405 * SC16C554 chip's external crystal oscillator frequency
406 * is 7.3728 MHz
407 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200408#define CONFIG_SYS_NS16550_CLK 7372800
Wolfgang Denk87791f32006-07-11 00:23:54 +0200409#endif /* CONFIG_QUART_CONSOLE */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100410/*-----------------------------------------------------------------------
411 * USB stuff
412 *-----------------------------------------------------------------------
413 */
414#define CONFIG_USB_CLOCK 0x0001BBBB
415#define CONFIG_USB_CONFIG 0x00005000
416
Wolfgang Denka4d26362007-08-12 15:11:38 +0200417#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
418#define CONFIG_AUTOBOOT_STOP_STR "432"
419#define CONFIG_SILENT_CONSOLE 1
420
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100421#endif /* __CONFIG_H */