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Bryan Brattlof16a30b32022-12-19 14:29:50 -06001.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Bryan Brattlof <bb@ti.com>
3
4K3 Generation
5=============
6
7Summary
8-------
9
10Texas Instrument's K3 family of SoCs utilize a heterogeneous multicore
11and highly integrated device architecture targeted to maximize
12performance and power efficiency for a wide range of industrial,
13automotive and other broad market segments.
14
15Typically the processing cores and the peripherals for these devices are
16partitioned into three functional domains to provide ultra-low power
17modes as well as accommodating application and industrial safety systems
18on the same SoC. These functional domains are typically called the:
19
20* Wakeup (WKUP) domain
21* Micro-controller (MCU) domain
22* Main domain
23
24For a more detailed view of what peripherals are attached to each
25domain, consult the device specific documentation.
26
27K3 Based SoCs
28-------------
29
30.. toctree::
31 :maxdepth: 1
32
Bryan Brattlof16a30b32022-12-19 14:29:50 -060033 am62x_sk
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +053034 am65x_evm
Nishanth Menon5c86c572023-07-27 13:59:01 -050035 j7200_evm
36 j721e_evm
Bryan Brattlof16a30b32022-12-19 14:29:50 -060037
38Boot Flow Overview
39------------------
40
41For all K3 SoCs the first core started will be inside the Security
42Management Subsystem (SMS) which will secure the device and start a core
43in the wakeup domain to run the ROM code. ROM will then initialize the
44boot media needed to load the binaries packaged inside `tiboot3.bin`,
45including a 32bit U-Boot SPL, (called the wakup SPL) that ROM will jump
46to after it has finished loading everything into internal SRAM.
47
Nishanth Menon6e8fa062023-07-27 13:59:02 -050048.. image:: img/boot_flow_01.svg
Bryan Brattlof16a30b32022-12-19 14:29:50 -060049
50The wakeup SPL, running on a wakeup domain core, will initialize DDR and
51any peripherals needed load the larger binaries inside the `tispl.bin`
52into DDR. Once loaded the wakeup SPL will start one of the 'big'
53application cores inside the main domain to initialize the main domain,
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +053054starting with Trusted Firmware-A (TF-A), before moving on to start
55OP-TEE and the main domain's U-Boot SPL.
Bryan Brattlof16a30b32022-12-19 14:29:50 -060056
Nishanth Menon6e8fa062023-07-27 13:59:02 -050057.. image:: img/boot_flow_02.svg
Bryan Brattlof16a30b32022-12-19 14:29:50 -060058
59The main domain's SPL, running on a 64bit application core, has
60virtually unlimited space (billions of bytes now that DDR is working) to
61initialize even more peripherals needed to load in the `u-boot.img`
62which loads more firmware into the micro-controller & wakeup domains and
63finally prepare the main domain to run Linux.
64
Nishanth Menon6e8fa062023-07-27 13:59:02 -050065.. image:: img/boot_flow_03.svg
Bryan Brattlof16a30b32022-12-19 14:29:50 -060066
67This is the typical boot flow for all K3 based SoCs, however this flow
68offers quite a lot in the terms of flexibility, especially on High
69Security (HS) SoCs.
70
71Boot Flow Variations
72^^^^^^^^^^^^^^^^^^^^
73
74All K3 SoCs will generally use the above boot flow with two main
75differences depending on the capabilities of the boot ROM and the number
76of cores inside the device. These differences split the bootflow into
77essentially 4 unique but very similar flows:
78
79* Split binary with a combined firmware: (eg: AM65)
80* Combined binary with a combined firmware: (eg: AM64)
81* Split binary with a split firmware: (eg: J721E)
82* Combined binary with a split firmware: (eg: AM62)
83
84For devices that utilize the split binary approach, ROM is not capable
85of loading the firmware into the SoC requiring the wakeup domain's
86U-Boot SPL to load the firmware.
87
88Devices with a split firmware will have two firmwares loaded into the
89device at different times during the bootup process. TI's Foundational
90Security (TIFS), needed to operate the Security Management Subsystem,
91will either be loaded by ROM or the WKUP U-Boot SPL, then once the
92wakeup U-Boot SPL has completed, the second Device Management (DM)
93firmware can be loaded on the now free core in the wakeup domain.
94
95For more information on the bootup process of your SoC, consult the
96device specific boot flow documentation.
97
98Software Sources
99----------------
100
101All scripts and code needed to build the `tiboot3.bin`, `tispl.bin` and
102`u-boot.img` for all K3 SoCs can be located at the following places
103online
104
Nishanth Menoncce3e7a2023-07-27 13:58:44 -0500105.. k3_rst_include_start_boot_sources
106
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600107* **Das U-Boot**
108
109 | **source:** https://source.denx.de/u-boot/u-boot.git
110 | **branch:** master
111
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530112* **Trusted Firmware-A (TF-A)**
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600113
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530114 | **source:** https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600115 | **branch:** master
116
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530117* **Open Portable Trusted Execution Environment (OP-TEE)**
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600118
119 | **source:** https://github.com/OP-TEE/optee_os.git
120 | **branch:** master
121
122* **TI Firmware (TIFS, DM, DSMC)**
123
124 | **source:** https://git.ti.com/git/processor-firmware/ti-linux-firmware.git
125 | **branch:** ti-linux-firmware
126
Nishanth Menoncce3e7a2023-07-27 13:58:44 -0500127.. k3_rst_include_end_boot_sources
128
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600129Build Procedure
130---------------
131
132Depending on the specifics of your device, you will need three or more
133binaries to boot your SoC.
134
135* `tiboot3.bin` (bootloader for the wakeup domain)
136* `tispl.bin` (bootloader for the main domain)
137* `u-boot.img`
138
139During the bootup process, both the 32bit wakeup domain and the 64bit
140main domains will be involved. This means everything inside the
141`tiboot3.bin` running in the wakeup domain will need to be compiled for
14232bit cores and most binaries in the `tispl.bin` will need to be
143compiled for 64bit main domain CPU cores.
144
145All of that to say you will need both a 32bit and 64bit cross compiler
146(assuming you're using an x86 desktop)
147
Nishanth Menonc727b812023-07-27 13:58:48 -0500148.. k3_rst_include_start_common_env_vars_desc
149.. list-table:: Generic environment variables
150 :widths: 25 25 50
151 :header-rows: 1
152
153 * - S/w Component
154 - Env Variable
155 - Description
156 * - All Software
157 - CC32
158 - Cross compiler for ARMv7 (ARM 32bit), typically arm-linux-gnueabihf-
159 * - All Software
160 - CC64
161 - Cross compiler for ARMv8 (ARM 64bit), typically aarch64-linux-gnu-
162 * - All Software
163 - LNX_FW_PATH
164 - Path to TI Linux firmware repository
165 * - All Software
166 - TFA_PATH
167 - Path to source of Trusted Firmware-A
168 * - All Software
169 - OPTEE_PATH
170 - Path to source of OP-TEE
171.. k3_rst_include_end_common_env_vars_desc
172
173.. k3_rst_include_start_common_env_vars_defn
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600174.. code-block:: bash
175
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530176 $ export CC32=arm-linux-gnueabihf-
177 $ export CC64=aarch64-linux-gnu-
Nishanth Menonc727b812023-07-27 13:58:48 -0500178 $ export LNX_FW_PATH=path/to/ti-linux-firmware
179 $ export TFA_PATH=path/to/trusted-firmware-a
180 $ export OPTEE_PATH=path/to/optee_os
181.. k3_rst_include_end_common_env_vars_defn
182
183We will also need some common environment variables set up for the various
184other build sources. we shall use the following, in the build descriptions below:
185
186.. k3_rst_include_start_board_env_vars_desc
187.. list-table:: Board specific environment variables
188 :widths: 25 25 50
189 :header-rows: 1
190
191 * - S/w Component
192 - Env Variable
193 - Description
194 * - U-Boot
195 - UBOOT_CFG_CORTEXR
196 - Defconfig for Cortex-R (Boot processor).
197 * - U-Boot
198 - UBOOT_CFG_CORTEXA
199 - Defconfig for Cortex-A (MPU processor).
200 * - Trusted Firmware-A
201 - TFA_BOARD
202 - Platform name used for building TF-A for Cortex-A Processor.
203 * - Trusted Firmware-A
204 - TFA_EXTRA_ARGS
205 - Any extra arguments used for building TF-A.
206 * - OP-TEE
207 - OPTEE_PLATFORM
208 - Platform name used for building OP-TEE for Cortex-A Processor.
209 * - OP-TEE
210 - OPTEE_EXTRA_ARGS
211 - Any extra arguments used for building OP-TEE.
212.. k3_rst_include_end_board_env_vars_desc
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600213
214Building tiboot3.bin
215^^^^^^^^^^^^^^^^^^^^^
216
2171. To generate the U-Boot SPL for the wakeup domain, use the following
218 commands, substituting :code:`{SOC}` for the name of your device (eg:
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530219 am62x) to package the various firmware and the wakeup UBoot SPL into
220 the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
221 uses the split binary flow)
222
Nishanth Menonc727b812023-07-27 13:58:48 -0500223.. k3_rst_include_start_build_steps_spl_r5
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600224.. code-block:: bash
225
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530226 $ # inside u-boot source
Nishanth Menonc727b812023-07-27 13:58:48 -0500227 $ make $UBOOT_CFG_CORTEXR
228 $ make CROSS_COMPILE=$CC32 BINMAN_INDIRS=$LNX_FW_PATH
229.. k3_rst_include_end_build_steps_spl_r5
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600230
231At this point you should have all the needed binaries to boot the wakeup
232domain of your K3 SoC.
233
234**Combined Binary Boot Flow** (eg: am62x, am64x, ... )
235
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530236 `tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600237
238**Split Binary Boot Flow** (eg: j721e, am65x)
239
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530240 | `tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
241 | `sysfw-{SOC}-{gp/hs-fs/hs}-evm.itb`
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600242
243.. note ::
244
245 It's important to rename the generated `tiboot3.bin` and `sysfw.itb`
246 to match exactly `tiboot3.bin` and `sysfw.itb` as ROM and the wakeup
247 UBoot SPL will only look for and load the files with these names.
248
249Building tispl.bin
250^^^^^^^^^^^^^^^^^^^
251
252The `tispl.bin` is a standard fitImage combining the firmware need for
253the main domain to function properly as well as Device Management (DM)
254firmware if your device using a split firmware.
255
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +05302562. We will first need TF-A, as it's the first thing to run on the 'big'
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600257 application cores on the main domain.
258
Nishanth Menonc727b812023-07-27 13:58:48 -0500259.. k3_rst_include_start_build_steps_tfa
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600260.. code-block:: bash
261
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530262 $ # inside trusted-firmware-a source
Nishanth Menonc727b812023-07-27 13:58:48 -0500263 $ make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 SPD=opteed $TFA_EXTRA_ARGS \
264 TARGET_BOARD=$TFA_BOARD
265.. k3_rst_include_end_build_steps_tfa
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600266
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530267Typically all `j7*` devices will use `TARGET_BOARD=generic` or `TARGET_BOARD
Nishanth Menonc727b812023-07-27 13:58:48 -0500268=j784s4` (if it is a J784S4 device), while typical Sitara (`am6*`) devices
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530269use the `lite` option.
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600270
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +05302713. The Open Portable Trusted Execution Environment (OP-TEE) is designed
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600272 to run as a companion to a non-secure Linux kernel for Cortex-A cores
273 using the TrustZone technology built into the core.
274
Nishanth Menonc727b812023-07-27 13:58:48 -0500275.. k3_rst_include_start_build_steps_optee
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600276.. code-block:: bash
277
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530278 $ # inside optee_os source
Nishanth Menonc727b812023-07-27 13:58:48 -0500279 $ make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 CFG_ARM64_core=y $OPTEE_EXTRA_ARGS \
280 PLATFORM=$OPTEE_PLATFORM
281.. k3_rst_include_end_build_steps_optee
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600282
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +05302834. Finally, after TF-A has initialized the main domain and OP-TEE has
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600284 finished, we can jump back into U-Boot again, this time running on a
285 64bit core in the main domain.
286
Nishanth Menonc727b812023-07-27 13:58:48 -0500287.. k3_rst_include_start_build_steps_uboot
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600288.. code-block:: bash
289
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530290 $ # inside u-boot source
Nishanth Menonc727b812023-07-27 13:58:48 -0500291 $ make $UBOOT_CFG_CORTEXA
292 $ make CROSS_COMPILE=$CC64 BINMAN_INDIRS=$LNX_FW_PATH \
293 BL31=$TFA_PATH/build/k3/$TFA_BOARD/release/bl31.bin \
294 TEE=$OPTEE_PATH/out/arm-plat-k3/core/tee-raw.bin
295.. k3_rst_include_end_build_steps_uboot
Bryan Brattlof16a30b32022-12-19 14:29:50 -0600296
297At this point you should have every binary needed initialize both the
298wakeup and main domain and to boot to the U-Boot prompt
299
300**Main Domain Bootloader**
301
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530302 | `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
303 | `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
Manorit Chawdhrya5e86782023-07-14 11:22:29 +0530304
305Fit Signature Signing
306---------------------
307
308K3 Platforms have fit signature signing enabled by default on their primary
309platforms. Here we'll take an example for creating fit image for J721e platform
310and the same can be extended to other platforms
311
3121. Describing FIT source
313
314 .. code-block:: bash
315
316 /dts-v1/;
317
318 / {
319 description = "Kernel fitImage for j721e-hs-evm";
320 #address-cells = <1>;
321
322 images {
323 kernel-1 {
324 description = "Linux kernel";
325 data = /incbin/("Image");
326 type = "kernel";
327 arch = "arm64";
328 os = "linux";
329 compression = "none";
330 load = <0x80080000>;
331 entry = <0x80080000>;
332 hash-1 {
333 algo = "sha512";
334 };
335
336 };
337 fdt-ti_k3-j721e-common-proc-board.dtb {
338 description = "Flattened Device Tree blob";
339 data = /incbin/("k3-j721e-common-proc-board.dtb");
340 type = "flat_dt";
341 arch = "arm64";
342 compression = "none";
343 load = <0x83000000>;
344 hash-1 {
345 algo = "sha512";
346 };
347
348 };
349 };
350
351 configurations {
352 default = "conf-ti_k3-j721e-common-proc-board.dtb";
353 conf-ti_k3-j721e-common-proc-board.dtb {
354 description = "Linux kernel, FDT blob";
355 fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
356 kernel = "kernel-1";
357 signature-1 {
358 algo = "sha512,rsa4096";
359 key-name-hint = "custMpk";
360 sign-images = "kernel", "fdt";
361 };
362 };
363 };
364 };
365
366 You would require to change the '/incbin/' lines to point to the respective
367 files in your local machine and the key-name-hint also needs to be changed
368 if you are using some other key other than the TI dummy key that we are
369 using for this example.
370
3712. Compile U-boot for the respective board
372
Nishanth Menonc727b812023-07-27 13:58:48 -0500373.. include:: k3.rst
374 :start-after: .. k3_rst_include_start_build_steps_uboot
375 :end-before: .. k3_rst_include_end_build_steps_uboot
Manorit Chawdhrya5e86782023-07-14 11:22:29 +0530376
Nishanth Menonc727b812023-07-27 13:58:48 -0500377.. note::
Manorit Chawdhrya5e86782023-07-14 11:22:29 +0530378
379 The changes only affect a72 binaries so the example just builds that
380
3813. Sign the fit image and embed the dtb in uboot
382
383 Now once the build is done, you'll have a dtb for your board that you'll
384 be passing to mkimage for signing the fitImage and embedding the key in
385 the u-boot dtb.
386
387 .. code-block:: bash
388
389 mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
390 $UBOOT_PATH/build/a72/dts/dt.dtb
391
392 For signing a secondary platform, pass the -K parameter to that DTB
393
394 .. code-block:: bash
395
396 mkimage -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
397 $UBOOT_PATH/build/a72/arch/arm/dts/k3-j721e-sk.dtb
398
399 .. note::
400
401 If changing `CONFIG_DEFAULT_DEVICE_TREE` to the secondary platform,
402 binman changes would also be required so that correct dtb gets packaged.
403
404 .. code-block:: bash
405
406 diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
407 index 673be646b1e3..752fa805fe8d 100644
408 --- a/arch/arm/dts/k3-j721e-binman.dtsi
409 +++ b/arch/arm/dts/k3-j721e-binman.dtsi
410 @@ -299,8 +299,8 @@
411 #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
412
413 #define UBOOT_NODTB "u-boot-nodtb.bin"
414 -#define J721E_EVM_DTB "u-boot.dtb"
415 -#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
416 +#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
417 +#define J721E_SK_DTB "u-boot.dtb"
418
4195. Rebuilt u-boot
420
421 This is required so that the modified dtb gets updated in u-boot.img
422
Nishanth Menonc727b812023-07-27 13:58:48 -0500423.. include:: k3.rst
424 :start-after: .. k3_rst_include_start_build_steps_uboot
425 :end-before: .. k3_rst_include_end_build_steps_uboot
Manorit Chawdhrya5e86782023-07-14 11:22:29 +0530426
4276. (Optional) Enabled FIT_SIGNATURE_ENFORCED
428
429 By default u-boot will boot up the fit image without any authentication as
430 such if the public key is not embedded properly, to check if the public key
431 nodes are proper you can enable FIT_SIGNATURE_ENFORCED that would not rely
432 on the dtb for anything else then the signature node for checking the fit
433 image, rest other things will be enforced such as the property of
434 required-keys. This is not an extensive check so do manual checks also
435
436 This is by default enabled for devices with TI_SECURE_DEVICE enabled.
437
438.. note::
439
440 The devices now also have distroboot enabled so if the fit image doesn't
441 work then the fallback to normal distroboot will be there on hs devices,
442 this will need to be explicitly disabled by changing the boot_targets.
443
444Saving environment
445------------------
446
447SAVEENV is disabled by default and for the new flow uses Uenv.txt as the default
448way for saving the environments. This has been done as Uenv.txt is more granular
449then the saveenv command and can be used across various bootmodes too.
450
451**Writing to MMC/EMMC**
452
453.. code-block::
454
455 => env export -t $loadaddr <list of variables>
456 => fatwrite mmc ${mmcdev} ${loadaddr} ${bootenvfile} ${filesize}
457
458**Reading from MMC/EMMC**
459
460By default run envboot will read it from the MMC/EMMC partition ( based on
461mmcdev) and set the environments.
462
463If manually needs to be done then the environment can be read from the
464filesystem and then imported
465
466.. code-block::
467
468 => fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
469 => env import -t ${loadaddr} ${filesize}