Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 |
| 3 | * Texas Instruments Incorporated. |
| 4 | * Sricharan R <r.sricharan@ti.com> |
| 5 | * |
| 6 | * Derived from OMAP4 done by: |
| 7 | * Aneesh V <aneesh@ti.com> |
| 8 | * |
| 9 | * TI OMAP5 AND DRA7XX common configuration settings |
| 10 | * |
Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 11 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 12 | * |
| 13 | * For more details, please see the technical documents listed at |
| 14 | * http://www.ti.com/product/omap5432 |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef __CONFIG_OMAP5_COMMON_H |
| 18 | #define __CONFIG_OMAP5_COMMON_H |
| 19 | |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 20 | #define CONFIG_OMAP54XX |
| 21 | #define CONFIG_DISPLAY_CPUINFO |
| 22 | #define CONFIG_DISPLAY_BOARDINFO |
| 23 | #define CONFIG_MISC_INIT_R |
| 24 | #define CONFIG_ARCH_CPU_INIT |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 25 | |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 26 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 27 | |
| 28 | /* Use General purpose timer 1 */ |
| 29 | #define CONFIG_SYS_TIMERBASE GPT2_BASE |
| 30 | |
Tom Rini | 078aa4f | 2013-08-20 08:53:52 -0400 | [diff] [blame] | 31 | /* |
| 32 | * For the DDR timing information we can either dynamically determine |
| 33 | * the timings to use or use pre-determined timings (based on using the |
| 34 | * dynamic method. Default to the static timing infomation. |
| 35 | */ |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 36 | #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 37 | #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
| 38 | #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION |
| 39 | #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS |
| 40 | #endif |
| 41 | |
| 42 | #ifndef CONFIG_SPL_BUILD |
| 43 | #define CONFIG_PALMAS_POWER |
| 44 | #endif |
| 45 | |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 46 | #include <asm/arch/cpu.h> |
| 47 | #include <asm/arch/omap.h> |
| 48 | |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 49 | #define CONFIG_ENV_SIZE (128 << 10) |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 50 | |
| 51 | #include <configs/ti_armv7_common.h> |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 52 | |
| 53 | /* |
| 54 | * Hardware drivers |
| 55 | */ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 56 | #define CONFIG_SYS_NS16550 |
| 57 | #define CONFIG_SYS_NS16550_SERIAL |
| 58 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 59 | #define CONFIG_SYS_NS16550_CLK 48000000 |
Tom Rini | dd2445e | 2013-04-05 06:21:46 +0000 | [diff] [blame] | 60 | |
Tom Rini | a801757 | 2013-08-09 11:22:18 -0400 | [diff] [blame] | 61 | /* Per-SoC commands */ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 62 | #undef CONFIG_CMD_NET |
| 63 | #undef CONFIG_CMD_NFS |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 64 | |
| 65 | /* |
| 66 | * Environment setup |
| 67 | */ |
Tom Rini | 9552ee3 | 2013-04-05 06:21:45 +0000 | [diff] [blame] | 68 | #ifndef PARTS_DEFAULT |
| 69 | #define PARTS_DEFAULT |
| 70 | #endif |
| 71 | |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 72 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Tom Rini | f672379 | 2013-10-18 18:04:19 -0400 | [diff] [blame] | 73 | "loadaddr=0x80200000\0" \ |
| 74 | "fdtaddr=0x80F80000\0" \ |
SRICHARAN R | d3501ed | 2013-04-01 05:52:39 +0000 | [diff] [blame] | 75 | "fdt_high=0xffffffff\0" \ |
Tom Rini | f672379 | 2013-10-18 18:04:19 -0400 | [diff] [blame] | 76 | "rdaddr=0x81000000\0" \ |
| 77 | "console=" CONSOLEDEV ",115200n8\0" \ |
Dan Murphy | a714321 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 78 | "fdtfile=undefined\0" \ |
SRICHARAN R | 143070d | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 79 | "bootpart=0:2\0" \ |
| 80 | "bootdir=/boot\0" \ |
SRICHARAN R | aaed0a2 | 2013-04-04 23:39:47 +0000 | [diff] [blame] | 81 | "bootfile=zImage\0" \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 82 | "usbtty=cdc_acm\0" \ |
| 83 | "vram=16M\0" \ |
Tom Rini | 9552ee3 | 2013-04-05 06:21:45 +0000 | [diff] [blame] | 84 | "partitions=" PARTS_DEFAULT "\0" \ |
Tom Rini | 85b7ac4 | 2013-04-11 05:22:10 +0000 | [diff] [blame] | 85 | "optargs=\0" \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 86 | "mmcdev=0\0" \ |
Tom Rini | 7406d32 | 2013-10-09 10:59:33 -0400 | [diff] [blame] | 87 | "mmcroot=/dev/mmcblk1p2 rw\0" \ |
Tom Rini | 46afd3e | 2013-04-11 08:01:42 +0000 | [diff] [blame] | 88 | "mmcrootfstype=ext4 rootwait\0" \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 89 | "mmcargs=setenv bootargs console=${console} " \ |
Tom Rini | 85b7ac4 | 2013-04-11 05:22:10 +0000 | [diff] [blame] | 90 | "${optargs} " \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 91 | "vram=${vram} " \ |
| 92 | "root=${mmcroot} " \ |
| 93 | "rootfstype=${mmcrootfstype}\0" \ |
| 94 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 95 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ |
| 96 | "source ${loadaddr}\0" \ |
Nishanth Menon | 78fd004 | 2013-04-01 05:52:40 +0000 | [diff] [blame] | 97 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
| 98 | "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ |
| 99 | "env import -t ${loadaddr} ${filesize}\0" \ |
SRICHARAN R | 143070d | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 100 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
Tom Rini | 7406d32 | 2013-10-09 10:59:33 -0400 | [diff] [blame] | 101 | "mmcboot=mmc dev ${mmcdev}; " \ |
| 102 | "if mmc rescan; then " \ |
| 103 | "echo SD/MMC found on device ${mmcdev};" \ |
| 104 | "if run loadbootenv; then " \ |
| 105 | "echo Loaded environment from ${bootenv};" \ |
| 106 | "run importbootenv;" \ |
| 107 | "fi;" \ |
| 108 | "if test -n $uenvcmd; then " \ |
| 109 | "echo Running uenvcmd ...;" \ |
| 110 | "run uenvcmd;" \ |
| 111 | "fi;" \ |
| 112 | "if run loadimage; then " \ |
| 113 | "run loadfdt; " \ |
| 114 | "echo Booting from mmc${mmcdev} ...; " \ |
| 115 | "run mmcargs; " \ |
| 116 | "bootz ${loadaddr} - ${fdtaddr}; " \ |
| 117 | "fi;" \ |
| 118 | "fi;\0" \ |
SRICHARAN R | 143070d | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 119 | "findfdt="\ |
| 120 | "if test $board_name = omap5_uevm; then " \ |
Dan Murphy | a714321 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 121 | "setenv fdtfile omap5-uevm.dtb; fi; " \ |
Dan Murphy | 45dbbf2 | 2013-06-11 11:22:30 -0500 | [diff] [blame] | 122 | "if test $board_name = dra7xx; then " \ |
| 123 | "setenv fdtfile dra7-evm.dtb; fi;" \ |
Dan Murphy | a714321 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 124 | "if test $fdtfile = undefined; then " \ |
| 125 | "echo WARNING: Could not determine device tree to use; fi; \0" \ |
SRICHARAN R | 143070d | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 126 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 127 | |
| 128 | #define CONFIG_BOOTCOMMAND \ |
SRICHARAN R | 143070d | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 129 | "run findfdt; " \ |
Tom Rini | 7406d32 | 2013-10-09 10:59:33 -0400 | [diff] [blame] | 130 | "run mmcboot;" \ |
| 131 | "setenv mmcdev 1; " \ |
| 132 | "setenv bootpart 1:2; " \ |
| 133 | "setenv mmcroot /dev/mmcblk0p2 rw; " \ |
| 134 | "run mmcboot;" \ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 135 | |
Balaji T K | a5d439c | 2013-06-06 05:04:32 +0000 | [diff] [blame] | 136 | |
Tom Rini | 078aa4f | 2013-08-20 08:53:52 -0400 | [diff] [blame] | 137 | /* |
| 138 | * SPL related defines. The Public RAM memory map the ROM defines the |
| 139 | * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 |
| 140 | * (dra7xx is larger, but we do not need to be larger at this time). We |
| 141 | * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and |
| 142 | * print some information. |
| 143 | */ |
Tom Rini | c3799fc | 2013-08-20 08:53:45 -0400 | [diff] [blame] | 144 | #define CONFIG_SPL_TEXT_BASE 0x40300000 |
| 145 | #define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 146 | #define CONFIG_SPL_DISPLAY_PRINT |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 147 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
| 148 | |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 149 | #endif /* __CONFIG_OMAP5_COMMON_H */ |