blob: 73aa382712268ddcb14477e651e7f6b31b0566d6 [file] [log] [blame]
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Patrick Delaunaybc061342018-07-09 15:17:21 +02008 select SPL_DRIVERS_MISC_SUPPORT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tanbfc6bae2018-06-14 18:45:19 +080017 select SPL_DM_RESET
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010018 select SPL_SERIAL_SUPPORT
19 select SPL_SYSCON
Patrick Delaunay006ea182019-02-27 17:01:14 +010020 imply SPL_DISPLAY_PRINT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010021 imply SPL_LIBDISK_SUPPORT
22
23config SYS_SOC
24 default "stm32mp"
25
26config TARGET_STM32MP1
27 bool "Support stm32mp1xx"
Patrick Delaunayabf26782019-02-12 11:44:39 +010028 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
Lokesh Vutlaacf15002018-04-26 18:21:26 +053029 select CPU_V7A
Patrick Delaunayabf26782019-02-12 11:44:39 +010030 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
Patrick Delaunay41c79772018-04-16 10:13:24 +020031 select CPU_V7_HAS_VIRT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010032 select PINCTRL_STM32
Patrick Delaunayd090cba2018-07-09 15:17:20 +020033 select STM32_RCC
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010034 select STM32_RESET
Andre Przywara7842b6a2018-04-12 04:24:46 +030035 select SYS_ARCH_TIMER
Patrick Delaunayabf26782019-02-12 11:44:39 +010036 imply SYSRESET_PSCI if STM32MP1_TRUSTED
37 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010038 help
39 target STMicroelectronics SOC STM32MP1 family
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010040 STM32MP157, STM32MP153 or STM32MP151
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010041 STMicroelectronics MPU with core ARMv7
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010042 dual core A7 for STM32MP157/3, monocore for STM32MP151
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010043
Patrick Delaunayabf26782019-02-12 11:44:39 +010044config STM32MP1_TRUSTED
45 bool "Support trusted boot with TF-A"
46 default y if !SPL
47 select ARM_SMCCC
48 help
49 Say Y here to enable boot with TF-A
50 Trusted boot chain is :
51 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
52 TF-A monitor provides proprietary smc to manage secure devices
53
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010054config SYS_TEXT_BASE
55 prompt "U-Boot base address"
56 default 0xC0100000
57 help
58 configure the U-Boot base address
59 when DDR driver is used:
60 DDR + 1MB (0xC0100000)
61
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010062config NR_DRAM_BANKS
63 default 1
64
Patrick Delaunay11dfd1a2018-03-20 10:54:54 +010065config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
66 hex "Partition on MMC2 to use to load U-Boot from"
67 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
68 default 1
69 help
70 Partition on the second MMC to load U-Boot from when the MMC is being
71 used in raw mode
72
Patrick Delaunay320d2662018-05-17 14:50:46 +020073if DEBUG_UART
74
75config DEBUG_UART_BOARD_INIT
76 default y
77
78# debug on UART4 by default
79config DEBUG_UART_BASE
80 default 0x40010000
81
82# clock source is HSI on reset
83config DEBUG_UART_CLOCK
84 default 64000000
85endif
86
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010087source "board/st/stm32mp1/Kconfig"
88
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010089endif