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wdenk56523f12004-07-11 17:40:54 +00001/*
wdenk8f0b7cb2005-03-27 23:41:39 +00002 * (C) Copyright 2003-2005
wdenk56523f12004-07-11 17:40:54 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk45a212c2006-07-19 17:52:30 +02005 * (C) Copyright 2004-2006
wdenk56523f12004-07-11 17:40:54 +00006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
wdenk56523f12004-07-11 17:40:54 +000030/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
Wolfgang Denk5078cce2006-07-21 11:16:34 +020035#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
wdenk56523f12004-07-11 17:40:54 +000039
Wolfgang Denk5196a7a2006-08-18 23:27:33 +020040/* On a Cameron or on a FO300 board or ... */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020041#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
Wolfgang Denk5078cce2006-07-21 11:16:34 +020042#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43#endif
wdenk56523f12004-07-11 17:40:54 +000044
Wolfgang Denk5078cce2006-07-21 11:16:34 +020045#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk56523f12004-07-11 17:40:54 +000046
Wolfgang Denk5078cce2006-07-21 11:16:34 +020047#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48#define BOOTFLAG_WARM 0x02 /* Software reboot */
49
50#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
wdenk56523f12004-07-11 17:40:54 +000051#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk5078cce2006-07-21 11:16:34 +020052# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
wdenk56523f12004-07-11 17:40:54 +000053#endif
54
55/*
56 * Serial console configuration
57 */
Wolfgang Denk5078cce2006-07-21 11:16:34 +020058#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
59#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
wdenk56523f12004-07-11 17:40:54 +000060#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
61
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020062#ifdef CONFIG_FO300
63#define CFG_DEVICE_NULLDEV 1 /* enable null device */
64#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
65#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
Bartlomiej Siekaddde6b72006-08-22 10:38:18 +020066#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020067#if 0
68#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
69 /* switch is closed */
70#endif
71
72#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
73 /* switch is open */
Wolfgang Denk5196a7a2006-08-18 23:27:33 +020074#endif /* CONFIG_FO300 */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020075
wdenk7e6bf352004-12-12 22:06:17 +000076#ifdef CONFIG_STK52XX
77#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
78#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
79#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
80#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
81#define CONFIG_BOARD_EARLY_INIT_R
82#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +000083
wdenk56523f12004-07-11 17:40:54 +000084/*
85 * PCI Mapping:
86 * 0x40000000 - 0x4fffffff - PCI Memory
87 * 0x50000000 - 0x50ffffff - PCI IO Space
88 */
wdenk7e6bf352004-12-12 22:06:17 +000089#ifdef CONFIG_STK52XX
90#define CONFIG_PCI 1
wdenk56523f12004-07-11 17:40:54 +000091#define CONFIG_PCI_PNP 1
wdenk31a64922004-08-28 21:09:14 +000092/* #define CONFIG_PCI_SCAN_SHOW 1 */
wdenk56523f12004-07-11 17:40:54 +000093
94#define CONFIG_PCI_MEM_BUS 0x40000000
95#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
96#define CONFIG_PCI_MEM_SIZE 0x10000000
97
98#define CONFIG_PCI_IO_BUS 0x50000000
99#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
100#define CONFIG_PCI_IO_SIZE 0x01000000
101
102#define CONFIG_NET_MULTI 1
Wolfgang Denkcd65a3d2006-06-16 16:11:34 +0200103#define CONFIG_EEPRO100 1
wdenk56523f12004-07-11 17:40:54 +0000104#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
105#define CONFIG_NS8382X 1
wdenk83e40ba2005-03-31 18:42:15 +0000106#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +0000107
wdenk8f0b7cb2005-03-27 23:41:39 +0000108#ifdef CONFIG_PCI
wdenk7e6bf352004-12-12 22:06:17 +0000109#define ADD_PCI_CMD CFG_CMD_PCI
wdenk8f0b7cb2005-03-27 23:41:39 +0000110#else
wdenk7e6bf352004-12-12 22:06:17 +0000111#define ADD_PCI_CMD 0
112#endif
wdenk56523f12004-07-11 17:40:54 +0000113
wdenk8f0b7cb2005-03-27 23:41:39 +0000114/*
115 * Video console
116 */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200117#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
wdenk8f0b7cb2005-03-27 23:41:39 +0000118#define CONFIG_VIDEO
119#define CONFIG_VIDEO_SM501
120#define CONFIG_VIDEO_SM501_32BPP
121#define CONFIG_CFB_CONSOLE
122#define CONFIG_VIDEO_LOGO
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200123
124#ifndef CONFIG_FO300
wdenk8f0b7cb2005-03-27 23:41:39 +0000125#define CONFIG_CONSOLE_EXTRA_INFO
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200126#else
127#define CONFIG_VIDEO_BMP_LOGO
128#endif
129
130#define CONFIG_VGA_AS_SINGLE_DEVICE
wdenk8f0b7cb2005-03-27 23:41:39 +0000131#define CONFIG_VIDEO_SW_CURSOR
132#define CONFIG_SPLASH_SCREEN
wdenk83e40ba2005-03-31 18:42:15 +0000133#define CFG_CONSOLE_IS_IN_ENV
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200134#endif /* #ifndef CONFIG_TQM5200S */
wdenk56523f12004-07-11 17:40:54 +0000135
wdenk8f0b7cb2005-03-27 23:41:39 +0000136#ifdef CONFIG_VIDEO
137#define ADD_BMP_CMD CFG_CMD_BMP
138#else
139#define ADD_BMP_CMD 0
wdenk56523f12004-07-11 17:40:54 +0000140#endif
141
142/* Partitions */
wdenk89c02e22005-03-16 16:32:26 +0000143#define CONFIG_MAC_PARTITION
wdenk56523f12004-07-11 17:40:54 +0000144#define CONFIG_DOS_PARTITION
wdenk8f0b7cb2005-03-27 23:41:39 +0000145#define CONFIG_ISO_PARTITION
wdenk56523f12004-07-11 17:40:54 +0000146
147/* USB */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200148#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk56523f12004-07-11 17:40:54 +0000149#define CONFIG_USB_OHCI
wdenk81050922004-07-11 20:04:51 +0000150#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
wdenk56523f12004-07-11 17:40:54 +0000151#define CONFIG_USB_STORAGE
152#else
wdenk81050922004-07-11 20:04:51 +0000153#define ADD_USB_CMD 0
wdenk56523f12004-07-11 17:40:54 +0000154#endif
155
Wolfgang Denk135ae002006-07-22 01:20:03 +0200156#ifndef CONFIG_CAM5200
wdenk56523f12004-07-11 17:40:54 +0000157/* POST support */
158#define CONFIG_POST (CFG_POST_MEMORY | \
159 CFG_POST_CPU | \
160 CFG_POST_I2C)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200161#endif
wdenk56523f12004-07-11 17:40:54 +0000162
163#ifdef CONFIG_POST
164#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
165/* preserve space for the post_word at end of on-chip SRAM */
166#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
167#else
168#define CFG_CMD_POST_DIAG 0
169#endif
170
171/* IDE */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200172#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk151ab832005-02-24 22:44:16 +0000173#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
wdenk56523f12004-07-11 17:40:54 +0000174#else
175#define ADD_IDE_CMD 0
176#endif
177
178/*
179 * Supported commands
180 */
181#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
wdenk8f0b7cb2005-03-27 23:41:39 +0000182 ADD_BMP_CMD | \
wdenk151ab832005-02-24 22:44:16 +0000183 ADD_IDE_CMD | \
wdenk56523f12004-07-11 17:40:54 +0000184 ADD_PCI_CMD | \
185 ADD_USB_CMD | \
wdenk151ab832005-02-24 22:44:16 +0000186 CFG_CMD_ASKENV | \
wdenk56523f12004-07-11 17:40:54 +0000187 CFG_CMD_DATE | \
wdenk151ab832005-02-24 22:44:16 +0000188 CFG_CMD_DHCP | \
wdenk151ab832005-02-24 22:44:16 +0000189 CFG_CMD_EEPROM | \
190 CFG_CMD_I2C | \
Wolfgang Denkd534f5c2005-08-23 22:27:41 +0200191 CFG_CMD_JFFS2 | \
wdenk56523f12004-07-11 17:40:54 +0000192 CFG_CMD_MII | \
wdenk414eec32005-04-02 22:37:54 +0000193 CFG_CMD_NFS | \
wdenk56523f12004-07-11 17:40:54 +0000194 CFG_CMD_PING | \
wdenk151ab832005-02-24 22:44:16 +0000195 CFG_CMD_POST_DIAG | \
wdenk414eec32005-04-02 22:37:54 +0000196 CFG_CMD_REGINFO | \
Wolfgang Denk6617aae2005-08-19 00:46:54 +0200197 CFG_CMD_SNTP | \
198 CFG_CMD_BSP)
wdenk56523f12004-07-11 17:40:54 +0000199
200/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
201#include <cmd_confdefs.h>
202
wdenk151ab832005-02-24 22:44:16 +0000203#define CONFIG_TIMESTAMP /* display image timestamps */
204
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200205#if (TEXT_BASE != 0xFFF00000)
206# define CFG_LOWBOOT 1 /* Boot low */
wdenk56523f12004-07-11 17:40:54 +0000207#endif
208
209/*
210 * Autobooting
211 */
212#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
213
wdenk81050922004-07-11 20:04:51 +0000214#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk4c4aca82006-07-26 10:33:37 +0200215 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk56523f12004-07-11 17:40:54 +0000216 "echo"
217
218#undef CONFIG_BOOTARGS
219
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200220#ifdef CONFIG_STK52XX
221# if defined(CONFIG_TQM5200_B)
222# if defined(CFG_LOWBOOT)
223# define ENV_UPDT \
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200224 "update=protect off FC000000 FC07FFFF;" \
225 "erase FC000000 FC07FFFF;" \
226 "cp.b 200000 FC000000 ${filesize};" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200227 "protect on FC000000 FC07FFFF\0"
228# else /* highboot */
229# define ENV_UPDT \
230 "update=protect off FFF00000 FFF7FFFF;" \
231 "erase FFF00000 FFF7FFFF;" \
232 "cp.b 200000 FFF00000 ${filesize};" \
233 "protect on FFF00000 FFF7FFFF\0"
234# endif /* CFG_LOWBOOT */
235# else /* !CONFIG_TQM5200_B */
236# define ENV_UPDT \
237 "update=protect off FC000000 FC05FFFF;" \
238 "erase FC000000 FC05FFFF;" \
239 "cp.b 200000 FC000000 ${filesize};" \
240 "protect on FC000000 FC05FFFF\0"
241# endif /* CONFIG_TQM5200_B */
Wolfgang Denk135ae002006-07-22 01:20:03 +0200242#elif defined (CONFIG_CAM5200)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200243# define ENV_UPDT \
244 "update=protect off FC000000 FC03FFFF;" \
245 "erase FC000000 FC03FFFF;" \
246 "cp.b 200000 FC000000 ${filesize};" \
247 "protect on FC000000 FC03FFFF\0"
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200248#elif defined (CONFIG_FO300)
249# define ENV_UPDT \
250 "update=protect off FC000000 FC05FFFF;" \
251 "erase FC000000 FC05FFFF;" \
252 "cp.b 200000 FC000000 ${filesize};" \
253 "protect on FC000000 FC05FFFF\0"
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200254#else
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200255# error "Unknown Carrier Board"
256#endif /* CONFIG_STK52XX */
257
wdenk81050922004-07-11 20:04:51 +0000258#define CONFIG_EXTRA_ENV_SETTINGS \
wdenk56523f12004-07-11 17:40:54 +0000259 "netdev=eth0\0" \
wdenk89c02e22005-03-16 16:32:26 +0000260 "rootpath=/opt/eldk/ppc_6xx\0" \
261 "ramargs=setenv bootargs root=/dev/ram rw\0" \
wdenk56523f12004-07-11 17:40:54 +0000262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100263 "nfsroot=${serverip}:${rootpath}\0" \
264 "addip=setenv bootargs ${bootargs} " \
265 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
266 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200267 "addcons=setenv bootargs ${bootargs} " \
268 "console=ttyS0,${baudrate}\0" \
269 "flash_self=run ramargs addip addcons;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100270 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200271 "flash_nfs=run nfsargs addip addcons;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100272 "bootm ${kernel_addr}\0" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200273 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
274 "bootm\0" \
wdenk89c02e22005-03-16 16:32:26 +0000275 "bootfile=/tftpboot/tqm5200/uImage\0" \
Wolfgang Denkcd65a3d2006-06-16 16:11:34 +0200276 "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200277 "load=tftp 200000 ${u-boot}\0" \
278 ENV_UPDT \
wdenk56523f12004-07-11 17:40:54 +0000279 ""
wdenk56523f12004-07-11 17:40:54 +0000280
281#define CONFIG_BOOTCOMMAND "run net_nfs"
282
283/*
284 * IPB Bus clocking configuration.
285 */
wdenk81050922004-07-11 20:04:51 +0000286#define CFG_IPBSPEED_133 /* define for 133MHz speed */
wdenk56523f12004-07-11 17:40:54 +0000287
Marian Balakowicz72997122006-10-03 20:28:38 +0200288#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200)
wdenk56523f12004-07-11 17:40:54 +0000289/*
290 * PCI Bus clocking configuration
291 *
292 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
293 * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
294 * been tested with a IPB Bus Clock of 66 MHz.
295 */
296#define CFG_PCISPEED_66 /* define for 66MHz speed */
297#endif
298
299/*
300 * I2C configuration
301 */
302#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
wdenk8f0b7cb2005-03-27 23:41:39 +0000303#ifdef CONFIG_TQM5200_REV100
304#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
wdenk56523f12004-07-11 17:40:54 +0000305#else
wdenk8f0b7cb2005-03-27 23:41:39 +0000306#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
wdenk56523f12004-07-11 17:40:54 +0000307#endif
308
309/*
310 * I2C clock frequency
311 *
312 * Please notice, that the resulting clock frequency could differ from the
313 * configured value. This is because the I2C clock is derived from system
314 * clock over a frequency divider with only a few divider values. U-boot
315 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
316 * approximation allways lies below the configured value, never above.
317 */
318#define CFG_I2C_SPEED 100000 /* 100 kHz */
319#define CFG_I2C_SLAVE 0x7F
320
321/*
322 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
323 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
324 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
325 * same configuration could be used.
326 */
327#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
328#define CFG_I2C_EEPROM_ADDR_LEN 2
329#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
330#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
331
332/*
333 * HW-Monitor configuration on Mini-FAP
334 */
335#if defined (CONFIG_MINIFAP)
336#define CFG_I2C_HWMON_ADDR 0x2C
337#endif
338
339/* List of I2C addresses to be verified by POST */
wdenk56523f12004-07-11 17:40:54 +0000340#if defined (CONFIG_MINIFAP)
341#undef I2C_ADDR_LIST
342#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
343 CFG_I2C_HWMON_ADDR, \
344 CFG_I2C_SLAVE }
345#endif
346
347/*
348 * Flash configuration
349 */
Wolfgang Denk978b1092006-07-19 18:01:38 +0200350#define CFG_FLASH_BASE 0xFC000000
wdenk56523f12004-07-11 17:40:54 +0000351
Marian Balakowicz72997122006-10-03 20:28:38 +0200352#ifndef CONFIG_CAM5200
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200353/* use CFI flash driver */
wdenk7e6bf352004-12-12 22:06:17 +0000354#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
355#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
356#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
Marian Balakowicz72997122006-10-03 20:28:38 +0200357#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
358 (= chip selects) */
359#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
360#else /* CONFIG_CAM5200 */
361#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
362 (= chip selects) */
363#define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
364#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
365#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
366
367#define CFG_FLASH_ADDR0 0x555
368#define CFG_FLASH_ADDR1 0x2AA
369#define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
370#define CFG_MAX_FLASH_SECT 128
371#endif /* ifndef CONFIG_CAM5200 */
372
wdenk7e6bf352004-12-12 22:06:17 +0000373#define CFG_FLASH_EMPTY_INFO
wdenk8f0b7cb2005-03-27 23:41:39 +0000374#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
Wolfgang Denkf3e06df2006-07-18 17:44:19 +0200375#define CFG_FLASH_USE_BUFFER_WRITE 1
wdenk56523f12004-07-11 17:40:54 +0000376
Wolfgang Denk135ae002006-07-22 01:20:03 +0200377#if defined (CONFIG_CAM5200)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200378# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
379#elif defined(CONFIG_TQM5200_B)
380# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200381#else
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200382# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
383#endif
384
Wolfgang Denkd534f5c2005-08-23 22:27:41 +0200385/* Dynamic MTD partition support */
386#define CONFIG_JFFS2_CMDLINE
387#define MTDIDS_DEFAULT "nor0=TQM5200-0"
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200388
389#ifdef CONFIG_STK52XX
390# if defined(CONFIG_TQM5200_B)
391# if defined(CFG_LOWBOOT)
392# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
393 "1536k(kernel)," \
394 "3584k(small-fs)," \
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200395 "2m(initrd)," \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200396 "8m(misc)," \
397 "16m(big-fs)"
398# else /* highboot */
399# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
400 "3584k(small-fs)," \
401 "2m(initrd)," \
402 "8m(misc)," \
403 "15m(big-fs)," \
404 "1m(firmware)"
405# endif /* CFG_LOWBOOT */
406# else /* !CONFIG_TQM5200_B */
407# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
Wolfgang Denkd534f5c2005-08-23 22:27:41 +0200408 "1408k(kernel)," \
409 "2m(initrd)," \
410 "4m(small-fs)," \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200411 "8m(misc)," \
412 "16m(big-fs)"
413# endif /* CONFIG_TQM5200_B */
Wolfgang Denk135ae002006-07-22 01:20:03 +0200414#elif defined (CONFIG_CAM5200)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200415# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
416 "1792k(kernel)," \
Marian Balakowicz72997122006-10-03 20:28:38 +0200417 "5632k(rootfs)," \
418 "24m(home)"
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200419#elif defined (CONFIG_FO300)
420# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
421 "1408k(kernel)," \
422 "2m(initrd)," \
423 "4m(small-fs)," \
424 "8m(misc)," \
425 "16m(big-fs)"
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200426#else
427# error "Unknown Carrier Board"
428#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +0000429
430/*
431 * Environment settings
432 */
433#define CFG_ENV_IS_IN_FLASH 1
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200434#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200435#if defined(CONFIG_TQM5200_B)
436#define CFG_ENV_SECT_SIZE 0x40000
437#else
wdenk56523f12004-07-11 17:40:54 +0000438#define CFG_ENV_SECT_SIZE 0x20000
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200439#endif /* CONFIG_TQM5200_B */
wdenk89c02e22005-03-16 16:32:26 +0000440#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200441#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
wdenk56523f12004-07-11 17:40:54 +0000442
443/*
444 * Memory map
445 */
446#define CFG_MBAR 0xF0000000
447#define CFG_SDRAM_BASE 0x00000000
448#define CFG_DEFAULT_MBAR 0x80000000
449
450/* Use ON-Chip SRAM until RAM will be available */
451#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
452#ifdef CONFIG_POST
453/* preserve space for the post_word at end of on-chip SRAM */
454#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
455#else
456#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
457#endif
458
459
460#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
461#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
462#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
463
wdenk89c02e22005-03-16 16:32:26 +0000464#define CFG_MONITOR_BASE TEXT_BASE
wdenk56523f12004-07-11 17:40:54 +0000465#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
466# define CFG_RAMBOOT 1
467#endif
468
Wolfgang Denk135ae002006-07-22 01:20:03 +0200469#if defined (CONFIG_CAM5200)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200470# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
471#elif defined(CONFIG_TQM5200_B)
472# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200473#else
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200474# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
475#endif
476
477#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
wdenk56523f12004-07-11 17:40:54 +0000478#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
479
480/*
481 * Ethernet configuration
482 */
483#define CONFIG_MPC5xxx_FEC 1
484/*
485 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
486 */
487/* #define CONFIG_FEC_10MBIT 1 */
488#define CONFIG_PHY_ADDR 0x00
489
490/*
491 * GPIO configuration
492 *
Marian Balakowicz72997122006-10-03 20:28:38 +0200493 * use CS1: Bit 0 (mask: 0x80000000):
494 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
wdenk56523f12004-07-11 17:40:54 +0000495 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
Marian Balakowicz72997122006-10-03 20:28:38 +0200496 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
497 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
498 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
499 * Use for REV200 STK52XX boards and FO300 boards. Do not use
500 * with REV100 modules (because, there I2C1 is used as I2C bus).
501 * use ATA: Bits 6-7 (mask 0x03000000):
502 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
503 * Use for CAM5200 board.
504 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
505 * use PSC6: Bits 9-11 (mask 0x00700000):
506 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
507 * UART, CODEC or IrDA.
508 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
509 * enable extended POST tests.
510 * Use for MINI-FAP and TQM5200_IB boards.
511 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
512 * Extended POST test is not available.
513 * Use for STK52xx, FO300 and CAM5200 boards.
514 * use PCI_DIS: Bit 16 (mask 0x00008000):
515 * 1 -> disable PCI controller (on CAM5200 board).
516 * use USB: Bits 18-19 (mask 0x00003000):
517 * 10 -> two UARTs (on FO300 and CAM5200).
518 * use PSC3: Bits 20-23 (mask: 0x00000f00):
519 * 0000 -> All PSC3 pins are GPIOs.
520 * 1100 -> UART/SPI (on FO300 board).
521 * 0100 -> UART (on CAM5200 board).
522 * use PSC2: Bits 25:27 (mask: 0x00000030):
523 * 000 -> All PSC2 pins are GPIOs.
524 * 100 -> UART (on CAM5200 board).
525 * 001 -> CAN1/2 on PSC2 pins.
526 * Use for REV100 STK52xx boards
527 * 01x -> Use AC97 (on FO300 board).
528 * use PSC1: Bits 29-31 (mask: 0x00000007):
529 * 100 -> UART (on all boards).
wdenk56523f12004-07-11 17:40:54 +0000530 */
531#if defined (CONFIG_MINIFAP)
wdenk8f0b7cb2005-03-27 23:41:39 +0000532# define CFG_GPS_PORT_CONFIG 0x91000004
wdenk7e6bf352004-12-12 22:06:17 +0000533#elif defined (CONFIG_STK52XX)
wdenk83e40ba2005-03-31 18:42:15 +0000534# if defined (CONFIG_STK52XX_REV100)
535# define CFG_GPS_PORT_CONFIG 0x81500014
536# else /* STK52xx REV200 and above */
537# if defined (CONFIG_TQM5200_REV100)
538# error TQM5200 REV100 not supported on STK52XX REV200 or above
539# else/* TQM5200 REV200 and above */
540# define CFG_GPS_PORT_CONFIG 0x91500004
541# endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000542# endif
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200543#elif defined (CONFIG_FO300)
544# define CFG_GPS_PORT_CONFIG 0x91502c24
Marian Balakowicz72997122006-10-03 20:28:38 +0200545#elif defined (CONFIG_CAM5200)
546# define CFG_GPS_PORT_CONFIG 0x8050A444
wdenk83e40ba2005-03-31 18:42:15 +0000547#else /* TMQ5200 Inbetriebnahme-Board */
wdenk8f0b7cb2005-03-27 23:41:39 +0000548# define CFG_GPS_PORT_CONFIG 0x81000004
wdenk56523f12004-07-11 17:40:54 +0000549#endif
550
551/*
552 * RTC configuration
553 */
Wolfgang Denk4f562f12005-08-18 11:51:12 +0200554#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
555# define CONFIG_RTC_M41T11 1
556# define CFG_I2C_RTC_ADDR 0x68
Wolfgang Denkedd0b502006-07-19 14:44:03 +0200557# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
558 year */
Wolfgang Denk4f562f12005-08-18 11:51:12 +0200559#else
560# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
561#endif
wdenk56523f12004-07-11 17:40:54 +0000562
563/*
564 * Miscellaneous configurable options
565 */
566#define CFG_LONGHELP /* undef to save memory */
567#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200568
569#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
570#define CFG_PROMPT_HUSH_PS2 "> "
571
wdenk56523f12004-07-11 17:40:54 +0000572#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
573#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
574#else
575#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
576#endif
577#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
578#define CFG_MAXARGS 16 /* max number of command args */
579#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
580
581/* Enable an alternate, more extensive memory test */
582#define CFG_ALT_MEMTEST
583
584#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
585#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
586
587#define CFG_LOAD_ADDR 0x100000 /* default load address */
588
589#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
590
591/*
592 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
593 * which is normally part of the default commands (CFV_CMD_DFL)
594 */
595#define CONFIG_LOOPW
596
597/*
598 * Various low-level settings
599 */
600#if defined(CONFIG_MPC5200)
601#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
602#define CFG_HID0_FINAL HID0_ICE
603#else
604#define CFG_HID0_INIT 0
605#define CFG_HID0_FINAL 0
606#endif
607
608#define CFG_BOOTCS_START CFG_FLASH_BASE
609#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
610#ifdef CFG_PCISPEED_66
611#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
612#else
613#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
614#endif
615#define CFG_CS0_START CFG_FLASH_BASE
616#define CFG_CS0_SIZE CFG_FLASH_SIZE
617
wdenk7e6bf352004-12-12 22:06:17 +0000618#define CONFIG_LAST_STAGE_INIT
wdenk7e6bf352004-12-12 22:06:17 +0000619
wdenk56523f12004-07-11 17:40:54 +0000620/*
621 * SRAM - Do not map below 2 GB in address space, because this area is used
622 * for SDRAM autosizing.
623 */
wdenk56523f12004-07-11 17:40:54 +0000624#define CFG_CS2_START 0xE5000000
wdenk7e6bf352004-12-12 22:06:17 +0000625#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
wdenk56523f12004-07-11 17:40:54 +0000626#define CFG_CS2_CFG 0x0004D930
wdenk56523f12004-07-11 17:40:54 +0000627
628/*
629 * Grafic controller - Do not map below 2 GB in address space, because this
630 * area is used for SDRAM autosizing.
631 */
wdenk8f0b7cb2005-03-27 23:41:39 +0000632#define SM501_FB_BASE 0xE0000000
633#define CFG_CS1_START (SM501_FB_BASE)
wdenk56523f12004-07-11 17:40:54 +0000634#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
wdenk89394042004-08-04 21:56:49 +0000635#define CFG_CS1_CFG 0x8F48FF70
wdenk56523f12004-07-11 17:40:54 +0000636#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
wdenk56523f12004-07-11 17:40:54 +0000637
638#define CFG_CS_BURST 0x00000000
wdenk8f0b7cb2005-03-27 23:41:39 +0000639#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
wdenk56523f12004-07-11 17:40:54 +0000640
Marian Balakowicz72997122006-10-03 20:28:38 +0200641#if defined(CONFIG_CAM5200)
642#define CFG_CS4_START 0xB0000000
643#define CFG_CS4_SIZE 0x00010000
644#define CFG_CS4_CFG 0x01019C10
645
646#define CFG_CS5_START 0xD0000000
647#define CFG_CS5_SIZE 0x01208000
648#define CFG_CS5_CFG 0x1414BF10
649#endif
650
wdenk56523f12004-07-11 17:40:54 +0000651#define CFG_RESET_ADDRESS 0xff000000
652
653/*-----------------------------------------------------------------------
654 * USB stuff
655 *-----------------------------------------------------------------------
656 */
657#define CONFIG_USB_CLOCK 0x0001BBBB
658#define CONFIG_USB_CONFIG 0x00001000
659
660/*-----------------------------------------------------------------------
661 * IDE/ATA stuff Supports IDE harddisk
662 *-----------------------------------------------------------------------
663 */
664
wdenk81050922004-07-11 20:04:51 +0000665#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
wdenk56523f12004-07-11 17:40:54 +0000666
wdenk81050922004-07-11 20:04:51 +0000667#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
668#undef CONFIG_IDE_LED /* LED for ide not supported */
wdenk56523f12004-07-11 17:40:54 +0000669
wdenk81050922004-07-11 20:04:51 +0000670#define CONFIG_IDE_RESET /* reset for ide supported */
wdenk56523f12004-07-11 17:40:54 +0000671#define CONFIG_IDE_PREINIT
672
673#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
wdenk8f0b7cb2005-03-27 23:41:39 +0000674#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
wdenk56523f12004-07-11 17:40:54 +0000675
676#define CFG_ATA_IDE0_OFFSET 0x0000
677
678#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
679
680/* Offset for data I/O */
681#define CFG_ATA_DATA_OFFSET (0x0060)
682
683/* Offset for normal register accesses */
684#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
685
686/* Offset for alternate registers */
687#define CFG_ATA_ALT_OFFSET (0x005C)
688
wdenk81050922004-07-11 20:04:51 +0000689/* Interval between registers */
690#define CFG_ATA_STRIDE 4
wdenk56523f12004-07-11 17:40:54 +0000691
692#endif /* __CONFIG_H */