blob: 61490d6d8de845616657c01260b20922626a13ea [file] [log] [blame]
Michal Simek6ded73a2016-09-19 10:41:55 +02001menu "FPGA support"
2
Siva Durga Prasad Paladugu6b245012016-01-13 16:25:37 +05303config FPGA
4 bool
5
Patrick Bruenn98d62e62016-11-04 11:57:02 +01006config FPGA_ALTERA
7 bool "Enable Altera FPGA drivers"
8 select FPGA
9 help
10 Say Y here to enable the Altera FPGA driver
11
12 This provides basic infrastructure to support Altera FPGA devices.
13 Enable Altera FPGA specific functions which includes bitstream
14 (in BIT format), fpga and device validation.
15
Tien Fong Cheefa23ba12017-07-26 13:05:40 +080016config FPGA_SOCFPGA
17 bool "Enable Gen5 and Arria10 common FPGA drivers"
18 select FPGA_ALTERA
19 help
20 Say Y here to enable the Gen5 and Arria10 common FPGA driver
21
22 This provides common functionality for Gen5 and Arria10 devices.
23
Simon Glass1edc21a2023-02-01 13:19:33 -070024config FPGA_STRATIX_II
25 bool "Enable Stratix II FPGA drivers"
26 depends on FPGA_ALTERA
27 help
28 Say Y here to enable the Altera Stratix II FPGA-specific driver.
29
Tom Rini6e52cb22022-06-12 20:02:00 -040030config FPGA_STRATIX_V
31 bool "Enable Stratix V FPGA drivers"
32 depends on FPGA_ALTERA
33 help
34 Say Y here to enable the Altera Stratix V FPGA specific driver.
35
Alexander Dahl312c4b12022-10-07 14:19:54 +020036config FPGA_ACEX1K
37 bool "Enable Altera ACEX 1K driver"
38 depends on FPGA_ALTERA
39 help
40 Say Y here to enable the Altera ACEX 1K FPGA specific driver.
41
Patrick Bruenn98d62e62016-11-04 11:57:02 +010042config FPGA_CYCLON2
43 bool "Enable Altera FPGA driver for Cyclone II"
44 depends on FPGA_ALTERA
45 help
46 Say Y here to enable the Altera Cyclone II FPGA specific driver
47
48 This provides common functionality for Altera Cyclone II devices.
49 Enable FPGA driver for loading bitstream in BIT and BIN format
50 on Altera Cyclone II device.
51
Chee Hong Angd2170162020-08-07 11:50:03 +080052config FPGA_INTEL_SDM_MAILBOX
53 bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver"
Siew Chin Lim9a5bbdf2021-03-01 20:04:10 +080054 depends on TARGET_SOCFPGA_SOC64
Ang, Chee Hongc41e6602018-12-19 18:35:14 -080055 select FPGA_ALTERA
56 help
Chee Hong Angd2170162020-08-07 11:50:03 +080057 Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver
Ang, Chee Hongc41e6602018-12-19 18:35:14 -080058
Chee Hong Angd2170162020-08-07 11:50:03 +080059 This provides common functionality for Intel FPGA devices.
60 Enable FPGA driver for writing full bitstream into Intel FPGA
61 devices through SDM (Secure Device Manager) Mailbox.
Ang, Chee Hongc41e6602018-12-19 18:35:14 -080062
Simon Glass8badd332023-02-01 13:19:32 -070063config FPGA_LATTICE
64 bool "Enable Lattice FPGA driver"
65 help
66 This is used for the lattice FPGAs. Please check the source code as
67 there is no documentation for this at present.
68
Siva Durga Prasad Paladugu6b245012016-01-13 16:25:37 +053069config FPGA_XILINX
70 bool "Enable Xilinx FPGA drivers"
71 select FPGA
72 help
73 Enable Xilinx FPGA specific functions which includes bitstream
74 (in BIT format), fpga and device validation.
75
76config FPGA_ZYNQMPPL
77 bool "Enable Xilinx FPGA driver for ZynqMP"
78 depends on FPGA_XILINX
79 help
80 Enable FPGA driver for loading bitstream in BIT and BIN format
81 on Xilinx Zynq UltraScale+ (ZynqMP) device.
82
Siva Durga Prasad Paladugu26e054c2019-08-05 15:54:59 +053083config FPGA_VERSALPL
84 bool "Enable Xilinx FPGA driver for Versal"
85 depends on FPGA_XILINX
86 help
87 Enable FPGA driver for loading bitstream in PDI format on Xilinx
88 Versal device. PDI is a new programmable device image format for
89 Versal. The bitstream will only be generated as PDI for Versal
90 platform.
91
Alexander Dahl312c4b12022-10-07 14:19:54 +020092config FPGA_SPARTAN2
93 bool "Enable Spartan2 FPGA driver"
94 depends on FPGA_XILINX
95 help
96 Enable Spartan2 FPGA driver.
97
Vipul Kumarf4158342018-02-16 18:02:49 +053098config FPGA_SPARTAN3
Michal Simeka225f812018-07-23 15:59:55 +020099 bool "Enable Spartan3 FPGA driver"
Robert Hancock25d63a32019-06-18 09:47:13 -0600100 depends on FPGA_XILINX
Michal Simeka225f812018-07-23 15:59:55 +0200101 help
102 Enable Spartan3 FPGA driver for loading in BIT format.
Vipul Kumarf4158342018-02-16 18:02:49 +0530103
Robert Hancock25d63a32019-06-18 09:47:13 -0600104config FPGA_VIRTEX2
105 bool "Enable Xilinx Virtex-II and later FPGA driver"
106 depends on FPGA_XILINX
107 help
108 Enable Virtex-II FPGA driver for loading in BIT format. This driver
109 also supports many newer Xilinx FPGA families.
110
Tom Rinif00f6762022-12-04 10:03:29 -0500111config SYS_FPGA_CHECK_BUSY
112 bool "Perform busy check during load from FPGA"
113 depends on FPGA_SPARTAN2 || FPGA_SPARTAN3 || FPGA_VIRTEX2
114
Vipul Kumar3990c9d2018-02-16 18:02:51 +0530115config FPGA_ZYNQPL
Michal Simeka225f812018-07-23 15:59:55 +0200116 bool "Enable Xilinx FPGA for Zynq"
117 depends on ARCH_ZYNQ
118 help
119 Enable FPGA driver for loading bitstream in BIT and BIN format
120 on Xilinx Zynq devices.
Vipul Kumar3990c9d2018-02-16 18:02:51 +0530121
Alexander Dahle8ffc1d2022-07-21 15:31:21 +0200122config SYS_FPGA_CHECK_CTRLC
123 bool "Allow Control-C to interrupt FPGA configuration"
124 depends on FPGA
125 help
126 User can interrupt FPGA configuration by pressing CTRL+C.
127
Alexander Dahl8c09cb62022-07-21 15:31:22 +0200128config SYS_FPGA_PROG_FEEDBACK
129 bool "Progress output during FPGA configuration"
130 depends on FPGA
131 default y if FPGA_VIRTEX2
132 help
133 Enable printing of hash marks during FPGA configuration.
134
Oleksandr Suvorovfb2b8852022-07-22 17:16:02 +0300135config FPGA_LOAD_SECURE
136 bool "Enable loading secure bitstreams"
137 depends on FPGA
138 help
139 Enables the fpga loads() functions that are used to load secure
140 (authenticated or encrypted or both) bitstreams on to FPGA.
141
142config SPL_FPGA_LOAD_SECURE
143 bool "Enable loading secure bitstreams for SPL"
144 depends on SPL_FPGA
145 help
146 Enables the fpga loads() functions that are used to load secure
147 (authenticated or encrypted or both) bitstreams on to FPGA.
148
Alexander Dahl1323d082022-09-30 14:04:30 +0200149config DM_FPGA
150 bool "Enable Driver Model for FPGA drivers"
151 depends on DM
152 select FPGA
153 help
154 Enable driver model for Field-Programmable Gate Array (FPGA) devices.
155 The devices cover a wide range of applications and are configured at
156 runtime by loading a bitstream into the FPGA device.
157 Loading a bitstream from any kind of storage is the main task of the
158 FPGA drivers.
159 For now this uclass has no methods yet.
160
161config SANDBOX_FPGA
162 bool "Enable sandbox FPGA driver"
163 depends on SANDBOX && DM_FPGA
164 help
165 This is a driver model based FPGA driver for sandbox.
166 Currently it is a stub only, as there are no usable uclass methods yet.
167
Tom Rini8fe042b2023-01-10 11:19:37 -0500168config MAX_FPGA_DEVICES
169 int "Maximum number of FPGA devices"
170 depends on FPGA
171 default 5
172
Michal Simek6ded73a2016-09-19 10:41:55 +0200173endmenu