blob: 2c8859507822d7015b02deac8e8ac23b665ca347 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
Simon Glass24b852a2015-11-08 23:47:45 -070016#include <console.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000017#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060018#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000019#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000020#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000021#if defined(CONFIG_CMD_IDE)
22#include <ide.h>
23#endif
24#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000025#include <initcall.h>
26#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070027#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050028#include <mapmem.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000029
30/* TODO: Can we move these into arch/ headers? */
31#ifdef CONFIG_8xx
32#include <mpc8xx.h>
33#endif
34#ifdef CONFIG_5xx
35#include <mpc5xx.h>
36#endif
37#ifdef CONFIG_MPC5xxx
38#include <mpc5xxx.h>
39#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070040#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070041#include <asm/mp.h>
42#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000043
Simon Glassa733b062013-04-26 02:53:43 +000044#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000045#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020047#include <status_led.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070048#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070049#include <trace.h>
Simon Glass5a541942016-01-18 19:52:21 -070050#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000051#include <watchdog.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090052#include <linux/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000053#include <asm/io.h>
54#include <asm/sections.h>
Alexey Brodkin3fb80162015-02-24 19:40:36 +030055#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +000056#include <asm/init_helpers.h>
Chris Zankelde5e5ce2016-08-10 18:36:43 +030057#endif
58#if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
Simon Glass48a33802013-03-05 14:39:52 +000059#include <asm/relocate.h>
60#endif
Simon Glassa733b062013-04-26 02:53:43 +000061#ifdef CONFIG_SANDBOX
62#include <asm/state.h>
63#endif
Simon Glassab7cd622014-07-23 06:55:04 -060064#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000065#include <linux/compiler.h>
66
67/*
68 * Pointer to initial global data area
69 *
70 * Here we initialize it if needed.
71 */
72#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
73#undef XTRN_DECLARE_GLOBAL_DATA_PTR
74#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
75DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
76#else
77DECLARE_GLOBAL_DATA_PTR;
78#endif
79
80/*
Simon Glass4c509342015-04-28 20:25:03 -060081 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000082 * refactored to a single function, something like:
83 *
84 * void led_set_state(enum led_colour_t colour, int on);
85 */
86/************************************************************************
87 * Coloured LED functionality
88 ************************************************************************
89 * May be supplied by boards if desired
90 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020091__weak void coloured_LED_init(void) {}
92__weak void red_led_on(void) {}
93__weak void red_led_off(void) {}
94__weak void green_led_on(void) {}
95__weak void green_led_off(void) {}
96__weak void yellow_led_on(void) {}
97__weak void yellow_led_off(void) {}
98__weak void blue_led_on(void) {}
99__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +0000100
101/*
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
104 *
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
109 * a structure...
110 */
111
112/*
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
114 */
115
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800116#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000117static int init_func_watchdog_init(void)
118{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800119# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
120 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +0200122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100123 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800124 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000125 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +0200126# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000127 WATCHDOG_RESET();
128
129 return 0;
130}
131
132int init_func_watchdog_reset(void)
133{
134 WATCHDOG_RESET();
135
136 return 0;
137}
138#endif /* CONFIG_WATCHDOG */
139
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200140__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000141{
142 /* please define platform specific board_add_ram_info() */
143}
144
Simon Glass1938f4a2013-03-11 06:49:53 +0000145static int init_baud_rate(void)
146{
147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
148 return 0;
149}
150
151static int display_text_info(void)
152{
Ben Stoltz9b217492015-07-31 09:31:37 -0600153#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100154 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000155
Simon Glass632efa72013-03-11 07:06:48 +0000156 bss_start = (ulong)&__bss_start;
157 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100158
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800159#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100160 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800161#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100162 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800163#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100164
165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
166 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000167#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000168
Simon Glass1938f4a2013-03-11 06:49:53 +0000169#ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
172#endif
173
174 return 0;
175}
176
177static int announce_dram_init(void)
178{
179 puts("DRAM: ");
180 return 0;
181}
182
angelo@sysam.ite310b932015-02-12 01:40:17 +0100183#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000184static int init_func_ram(void)
185{
186#ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
188#else
189 int board_type = 0; /* use dummy arg */
190#endif
191
192 gd->ram_size = initdram(board_type);
193
194 if (gd->ram_size > 0)
195 return 0;
196
197 puts("*** failed ***\n");
198 return 1;
199}
200#endif
201
Simon Glass1938f4a2013-03-11 06:49:53 +0000202static int show_dram_config(void)
203{
York Sunfa39ffe2014-05-02 17:28:05 -0700204 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000205
206#ifdef CONFIG_NR_DRAM_BANKS
207 int i;
208
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700212 debug("Bank #%d: %llx ", i,
213 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000214#ifdef DEBUG
215 print_size(gd->bd->bi_dram[i].size, "\n");
216#endif
217 }
218 debug("\nDRAM: ");
219#else
220 size = gd->ram_size;
221#endif
222
Simon Glasse4fef6c2013-03-11 14:30:42 +0000223 print_size(size, "");
224 board_add_ram_info(0);
225 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000226
227 return 0;
228}
229
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200230__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000231{
232#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
234 gd->bd->bi_dram[0].size = get_effective_memsize();
235#endif
236}
237
Heiko Schocherea818db2013-01-29 08:53:15 +0100238#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000239static int init_func_i2c(void)
240{
241 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200242#ifdef CONFIG_SYS_I2C
243 i2c_init_all();
244#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200246#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000247 puts("ready\n");
248 return 0;
249}
250#endif
251
252#if defined(CONFIG_HARD_SPI)
253static int init_func_spi(void)
254{
255 puts("SPI: ");
256 spi_init();
257 puts("ready\n");
258 return 0;
259}
260#endif
261
262__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000263static int zero_global_data(void)
264{
265 memset((void *)gd, '\0', sizeof(gd_t));
266
267 return 0;
268}
269
270static int setup_mon_len(void)
271{
Michal Simeke945f6d2014-05-08 16:08:44 +0200272#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600274#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000275 gd->mon_len = (ulong)&_end - (ulong)_init;
Chris Zankelde5e5ce2016-08-10 18:36:43 +0300276#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) || \
277 defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800278 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800279#elif defined(CONFIG_NDS32)
280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600281#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000284#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000285 return 0;
286}
287
288__weak int arch_cpu_init(void)
289{
290 return 0;
291}
292
Paul Burton8ebf5062016-09-21 11:18:46 +0100293__weak int mach_cpu_init(void)
294{
295 return 0;
296}
297
Simon Glassa733b062013-04-26 02:53:43 +0000298#ifdef CONFIG_SANDBOX
299static int setup_ram_buf(void)
300{
Simon Glass5c2859c2013-11-10 10:27:03 -0700301 struct sandbox_state *state = state_get_current();
302
303 gd->arch.ram_buf = state->ram_buf;
304 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000305
306 return 0;
307}
308#endif
309
Simon Glass1938f4a2013-03-11 06:49:53 +0000310/* Get the top of usable RAM */
311__weak ulong board_get_usable_ram_top(ulong total_size)
312{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700313#ifdef CONFIG_SYS_SDRAM_BASE
314 /*
Simon Glass4c509342015-04-28 20:25:03 -0600315 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700316 * 32-bit address space. If so, clip the usable RAM so it doesn't.
317 */
318 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
319 /*
320 * Will wrap back to top of 32-bit space when reservations
321 * are made.
322 */
323 return 0;
324#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000325 return gd->ram_top;
326}
327
York Sunaabd7dd2015-12-07 11:05:29 -0800328__weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
329{
330#ifdef CONFIG_SYS_MEM_TOP_HIDE
331 return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
332#else
333 return ram_size;
334#endif
335}
336
Simon Glass1938f4a2013-03-11 06:49:53 +0000337static int setup_dest_addr(void)
338{
339 debug("Monitor len: %08lX\n", gd->mon_len);
340 /*
341 * Ram is setup, size stored in gd !!
342 */
343 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sune8149522015-12-04 11:57:07 -0800344#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
345 /* Reserve memory for secure MMU tables, and/or security monitor */
346 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
347 /*
348 * Record secure memory location. Need recalcuate if memory splits
349 * into banks, or the ram base is not zero.
350 */
York Sune61a7532016-06-24 16:46:18 -0700351 gd->arch.secure_ram = gd->ram_size;
York Sune8149522015-12-04 11:57:07 -0800352#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 /*
354 * Subtract specified amount of memory to hide so that it won't
355 * get "touched" at all by U-Boot. By fixing up gd->ram_size
356 * the Linux kernel should now get passed the now "corrected"
York Sunaabd7dd2015-12-07 11:05:29 -0800357 * memory size and won't touch it either. This has been used
358 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
359 * thie mechanism. If memory is split into banks, addresses
360 * need to be calculated.
Simon Glass1938f4a2013-03-11 06:49:53 +0000361 */
York Sunaabd7dd2015-12-07 11:05:29 -0800362 gd->ram_size = board_reserve_ram_top(gd->ram_size);
363
Simon Glass1938f4a2013-03-11 06:49:53 +0000364#ifdef CONFIG_SYS_SDRAM_BASE
365 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
366#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000367 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000368 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000369 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000370 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700371#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000372 /*
373 * We need to make sure the location we intend to put secondary core
374 * boot code is reserved and not used by any part of u-boot
375 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000376 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
377 gd->relocaddr = determine_mp_bootpg(NULL);
378 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000379 }
380#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000381 return 0;
382}
383
Francois Retief1e85cce2015-11-23 13:05:44 +0200384#if defined(CONFIG_SPARC)
385static int reserve_prom(void)
386{
387 /* defined in arch/sparc/cpu/leon?/prom.c */
388 extern void *__prom_start_reloc;
389 int size = 8192; /* page table = 2k, prom = 6k */
390 gd->relocaddr -= size;
391 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
392 debug("Reserving %dk for PROM and page table at %08lx\n", size,
393 gd->relocaddr);
394 return 0;
395}
396#endif
397
Simon Glass1938f4a2013-03-11 06:49:53 +0000398#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
399static int reserve_logbuffer(void)
400{
401 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000402 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000403 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000404 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000405 return 0;
406}
407#endif
408
409#ifdef CONFIG_PRAM
410/* reserve protected RAM */
411static int reserve_pram(void)
412{
413 ulong reg;
414
415 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000416 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000417 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000418 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000419 return 0;
420}
421#endif /* CONFIG_PRAM */
422
423/* Round memory pointer down to next 4 kB limit */
424static int reserve_round_4k(void)
425{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000426 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000427 return 0;
428}
429
430#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
431 defined(CONFIG_ARM)
432static int reserve_mmu(void)
433{
434 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800435 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000436 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000437
438 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000439 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000440
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000441 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000442 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
443 gd->arch.tlb_addr + gd->arch.tlb_size);
York Sun50e93b92016-06-24 16:46:19 -0700444
445#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
446 /*
447 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
448 * with location within secure ram.
449 */
450 gd->arch.tlb_allocated = gd->arch.tlb_addr;
451#endif
452
Simon Glass1938f4a2013-03-11 06:49:53 +0000453 return 0;
454}
455#endif
456
Simon Glass5a541942016-01-18 19:52:21 -0700457#ifdef CONFIG_DM_VIDEO
458static int reserve_video(void)
459{
460 ulong addr;
461 int ret;
462
463 addr = gd->relocaddr;
464 ret = video_reserve(&addr);
465 if (ret)
466 return ret;
467 gd->relocaddr = addr;
468
469 return 0;
470}
471#else
472
473# ifdef CONFIG_LCD
Simon Glass1938f4a2013-03-11 06:49:53 +0000474static int reserve_lcd(void)
475{
Simon Glass5a541942016-01-18 19:52:21 -0700476# ifdef CONFIG_FB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000477 gd->fb_base = CONFIG_FB_ADDR;
Simon Glass5a541942016-01-18 19:52:21 -0700478# else
Simon Glass1938f4a2013-03-11 06:49:53 +0000479 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000480 gd->relocaddr = lcd_setmem(gd->relocaddr);
481 gd->fb_base = gd->relocaddr;
Simon Glass5a541942016-01-18 19:52:21 -0700482# endif /* CONFIG_FB_ADDR */
483
Simon Glass1938f4a2013-03-11 06:49:53 +0000484 return 0;
485}
Simon Glass5a541942016-01-18 19:52:21 -0700486# endif /* CONFIG_LCD */
Simon Glass1938f4a2013-03-11 06:49:53 +0000487
Simon Glass5a541942016-01-18 19:52:21 -0700488# if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
Simon Glass8703ef32016-01-18 19:52:20 -0700489 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
490 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
491static int reserve_legacy_video(void)
492{
493 /* reserve memory for video display (always full pages) */
494 gd->relocaddr = video_setmem(gd->relocaddr);
495 gd->fb_base = gd->relocaddr;
496
497 return 0;
498}
Simon Glass5a541942016-01-18 19:52:21 -0700499# endif
500#endif /* !CONFIG_DM_VIDEO */
Simon Glass8703ef32016-01-18 19:52:20 -0700501
Simon Glass71c52db2013-06-11 11:14:42 -0700502static int reserve_trace(void)
503{
504#ifdef CONFIG_TRACE
505 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
506 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
507 debug("Reserving %dk for trace data at: %08lx\n",
508 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
509#endif
510
511 return 0;
512}
513
Simon Glass1938f4a2013-03-11 06:49:53 +0000514static int reserve_uboot(void)
515{
516 /*
517 * reserve memory for U-Boot code, data & bss
518 * round down to next 4 kB limit
519 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000520 gd->relocaddr -= gd->mon_len;
521 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000522#ifdef CONFIG_E500
523 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000524 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000525#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000526
527 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000528 gd->relocaddr);
529
530 gd->start_addr_sp = gd->relocaddr;
531
Simon Glass1938f4a2013-03-11 06:49:53 +0000532 return 0;
533}
534
Simon Glass8cae8a62013-03-05 14:39:45 +0000535#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000536/* reserve memory for malloc() area */
537static int reserve_malloc(void)
538{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000539 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000540 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000541 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000542 return 0;
543}
544
545/* (permanently) allocate a Board Info struct */
546static int reserve_board(void)
547{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800548 if (!gd->bd) {
549 gd->start_addr_sp -= sizeof(bd_t);
550 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
551 memset(gd->bd, '\0', sizeof(bd_t));
552 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
553 sizeof(bd_t), gd->start_addr_sp);
554 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000555 return 0;
556}
Simon Glass8cae8a62013-03-05 14:39:45 +0000557#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000558
559static int setup_machine(void)
560{
561#ifdef CONFIG_MACH_TYPE
562 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
563#endif
564 return 0;
565}
566
567static int reserve_global_data(void)
568{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000569 gd->start_addr_sp -= sizeof(gd_t);
570 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000571 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000572 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000573 return 0;
574}
575
576static int reserve_fdt(void)
577{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100578#ifndef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000579 /*
Simon Glass4c509342015-04-28 20:25:03 -0600580 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000581 * must relocate it. If it is embedded in the data section, then it
582 * will be relocated with other data.
583 */
584 if (gd->fdt_blob) {
585 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
586
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000587 gd->start_addr_sp -= gd->fdt_size;
588 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000589 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000590 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000591 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100592#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000593
594 return 0;
595}
596
Andreas Bießmann68145d42015-02-06 23:06:45 +0100597int arch_reserve_stacks(void)
598{
599 return 0;
600}
601
Simon Glass1938f4a2013-03-11 06:49:53 +0000602static int reserve_stacks(void)
603{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100604 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000605 gd->start_addr_sp -= 16;
606 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000607
608 /*
Simon Glass4c509342015-04-28 20:25:03 -0600609 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100610 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000611 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100612 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000613}
614
615static int display_new_sp(void)
616{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000617 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000618
619 return 0;
620}
621
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100622#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000623static int setup_board_part1(void)
624{
625 bd_t *bd = gd->bd;
626
627 /*
628 * Save local variables to board info struct
629 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000630 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
631 bd->bi_memsize = gd->ram_size; /* size in bytes */
632
633#ifdef CONFIG_SYS_SRAM_BASE
634 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
635 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
636#endif
637
Masahiro Yamada58dac322014-03-05 17:40:10 +0900638#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000639 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
640 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
641#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100642#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000643 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
644#endif
645#if defined(CONFIG_MPC83xx)
646 bd->bi_immrbar = CONFIG_SYS_IMMR;
647#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000648
649 return 0;
650}
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100651#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000652
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100653#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000654static int setup_board_part2(void)
655{
656 bd_t *bd = gd->bd;
657
658 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
659 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
660#if defined(CONFIG_CPM2)
661 bd->bi_cpmfreq = gd->arch.cpm_clk;
662 bd->bi_brgfreq = gd->arch.brg_clk;
663 bd->bi_sccfreq = gd->arch.scc_clk;
664 bd->bi_vco = gd->arch.vco_out;
665#endif /* CONFIG_CPM2 */
666#if defined(CONFIG_MPC512X)
667 bd->bi_ipsfreq = gd->arch.ips_clk;
668#endif /* CONFIG_MPC512X */
669#if defined(CONFIG_MPC5xxx)
670 bd->bi_ipbfreq = gd->arch.ipb_clk;
671 bd->bi_pcifreq = gd->pci_clk;
672#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800673#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
674 bd->bi_pcifreq = gd->pci_clk;
675#endif
676#if defined(CONFIG_EXTRA_CLOCK)
677 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
678 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
679 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
680#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000681
682 return 0;
683}
684#endif
685
686#ifdef CONFIG_SYS_EXTBDINFO
687static int setup_board_extra(void)
688{
689 bd_t *bd = gd->bd;
690
691 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
692 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
693 sizeof(bd->bi_r_version));
694
695 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
696 bd->bi_plb_busfreq = gd->bus_clk;
697#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
698 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
699 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
700 bd->bi_pci_busfreq = get_PCI_freq();
701 bd->bi_opbfreq = get_OPB_freq();
702#elif defined(CONFIG_XILINX_405)
703 bd->bi_pci_busfreq = get_PCI_freq();
704#endif
705
706 return 0;
707}
708#endif
709
Simon Glass1938f4a2013-03-11 06:49:53 +0000710#ifdef CONFIG_POST
711static int init_post(void)
712{
713 post_bootmode_init();
714 post_run(NULL, POST_ROM | post_bootmode_get(0));
715
716 return 0;
717}
718#endif
719
Simon Glass1938f4a2013-03-11 06:49:53 +0000720static int setup_dram_config(void)
721{
722 /* Ram is board specific, so move it to board code ... */
723 dram_init_banksize();
724
725 return 0;
726}
727
728static int reloc_fdt(void)
729{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100730#ifndef CONFIG_OF_EMBED
Simon Glassf05ad9b2015-08-04 12:33:39 -0600731 if (gd->flags & GD_FLG_SKIP_RELOC)
732 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000733 if (gd->new_fdt) {
734 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
735 gd->fdt_blob = gd->new_fdt;
736 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100737#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000738
739 return 0;
740}
741
742static int setup_reloc(void)
743{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600744 if (gd->flags & GD_FLG_SKIP_RELOC) {
745 debug("Skipping relocation due to flag\n");
746 return 0;
747 }
748
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800749#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000750 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100751#ifdef CONFIG_M68K
752 /*
753 * On all ColdFire arch cpu, monitor code starts always
754 * just after the default vector table location, so at 0x400
755 */
756 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
757#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800758#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000759 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
760
761 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000762 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000763 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
764 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000765
766 return 0;
767}
768
769/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700770#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000771
772static int jump_to_copy(void)
773{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600774 if (gd->flags & GD_FLG_SKIP_RELOC)
775 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000776 /*
777 * x86 is special, but in a nice way. It uses a trampoline which
778 * enables the dcache if possible.
779 *
780 * For now, other archs use relocate_code(), which is implemented
781 * similarly for all archs. When we do generic relocation, hopefully
782 * we can make all archs enable the dcache prior to relocation.
783 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300784#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000785 /*
786 * SDRAM and console are now initialised. The final stack can now
787 * be setup in SDRAM. Code execution will continue in Flash, but
788 * with the stack in SDRAM and Global Data in temporary memory
789 * (CPU cache)
790 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600791 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000792 board_init_f_r_trampoline(gd->start_addr_sp);
793#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000794 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000795#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000796
797 return 0;
798}
799#endif
800
801/* Record the board_init_f() bootstage (after arch_cpu_init()) */
802static int mark_bootstage(void)
803{
804 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
805
806 return 0;
807}
808
Simon Glass9854a872015-11-08 23:47:48 -0700809static int initf_console_record(void)
810{
811#if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
812 return console_record_init();
813#else
814 return 0;
815#endif
816}
817
Simon Glassab7cd622014-07-23 06:55:04 -0600818static int initf_dm(void)
819{
820#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
821 int ret;
822
823 ret = dm_init_and_scan(true);
824 if (ret)
825 return ret;
826#endif
Simon Glass1057e6c2016-02-24 09:14:50 -0700827#ifdef CONFIG_TIMER_EARLY
828 ret = dm_timer_init();
829 if (ret)
830 return ret;
831#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600832
833 return 0;
834}
835
Simon Glass146251f2015-01-19 22:16:12 -0700836/* Architecture-specific memory reservation */
837__weak int reserve_arch(void)
838{
839 return 0;
840}
841
Simon Glassd4c671c2015-03-05 12:25:16 -0700842__weak int arch_cpu_init_dm(void)
843{
844 return 0;
845}
846
Simon Glass1938f4a2013-03-11 06:49:53 +0000847static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000848#ifdef CONFIG_SANDBOX
849 setup_ram_buf,
850#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000851 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700852#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700853 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700854#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800855#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700856 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800857#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700858 initf_malloc,
Simon Glass9854a872015-11-08 23:47:48 -0700859 initf_console_record,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000860#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
861 /* TODO: can this go into arch_cpu_init()? */
862 probecpu,
863#endif
Bin Menga52a068e2015-08-20 06:40:18 -0700864#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
865 x86_fsp_init,
866#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000867 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100868 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600869 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700870 arch_cpu_init_dm,
Thomas Chou67521952015-10-30 15:35:51 +0800871 mark_bootstage, /* need timer, go after init dm */
Simon Glass1938f4a2013-03-11 06:49:53 +0000872#if defined(CONFIG_BOARD_EARLY_INIT_F)
873 board_early_init_f,
874#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000875 /* TODO: can any of this go into arch_cpu_init()? */
876#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
877 get_clocks, /* get CPU and bus clocks (etc.) */
878#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
879 && !defined(CONFIG_TQM885D)
880 adjust_sdram_tbs_8xx,
881#endif
882 /* TODO: can we rename this to timer_init()? */
883 init_timebase,
884#endif
Bin Meng2317cf02015-12-08 17:31:40 -0800885#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
Francois Retiefc97088c2015-10-28 15:18:22 +0200886 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
887 defined(CONFIG_SPARC)
Simon Glass1938f4a2013-03-11 06:49:53 +0000888 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000889#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000890#ifdef CONFIG_SYS_ALLOC_DPRAM
891#if !defined(CONFIG_CPM2)
892 dpram_init,
893#endif
894#endif
895#if defined(CONFIG_BOARD_POSTCLK_INIT)
896 board_postclk_init,
897#endif
Peng Fan76648462015-10-30 17:30:02 +0800898#if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
angelo@sysam.ite310b932015-02-12 01:40:17 +0100899 get_clocks,
900#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000901 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000902#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
903 /* get CPU and bus clocks according to the environment variable */
904 get_clocks_866,
905 /* adjust sdram refresh rate according to the new clock */
906 sdram_adjust_866,
907 init_timebase,
908#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000909 init_baud_rate, /* initialze baudrate settings */
910 serial_init, /* serial communications setup */
911 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000912#ifdef CONFIG_SANDBOX
913 sandbox_early_getopt_check,
914#endif
915#ifdef CONFIG_OF_CONTROL
916 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000917#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000918 display_options, /* say that we are here */
919 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900920#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000921 prt_8260_rsr,
922 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900923#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000924#if defined(CONFIG_MPC83xx)
925 prt_83xx_rsr,
926#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100927#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000928 checkcpu,
929#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000930 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000931#if defined(CONFIG_MPC5xxx)
932 prt_mpc5xxx_clks,
933#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000934#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900935 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000936#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000937 INIT_FUNC_WATCHDOG_INIT
938#if defined(CONFIG_MISC_INIT_F)
939 misc_init_f,
940#endif
941 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100942#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000943 init_func_i2c,
944#endif
945#if defined(CONFIG_HARD_SPI)
946 init_func_spi,
947#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000948 announce_dram_init,
949 /* TODO: unify all these dram functions? */
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800950#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
951 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000952 dram_init, /* configure available RAM banks */
953#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100954#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000955 init_func_ram,
956#endif
957#ifdef CONFIG_POST
958 post_init_f,
959#endif
960 INIT_FUNC_WATCHDOG_RESET
961#if defined(CONFIG_SYS_DRAM_TEST)
962 testdram,
963#endif /* CONFIG_SYS_DRAM_TEST */
964 INIT_FUNC_WATCHDOG_RESET
965
Simon Glass1938f4a2013-03-11 06:49:53 +0000966#ifdef CONFIG_POST
967 init_post,
968#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000969 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000970 /*
971 * Now that we have DRAM mapped and working, we can
972 * relocate the code and continue running from DRAM.
973 *
974 * Reserve memory at end of RAM for (top down in that order):
975 * - area that won't get touched by U-Boot and Linux (optional)
976 * - kernel log buffer
977 * - protected RAM
978 * - LCD framebuffer
979 * - monitor code
980 * - board info struct
981 */
982 setup_dest_addr,
Chris Zankelde5e5ce2016-08-10 18:36:43 +0300983#if defined(CONFIG_BLACKFIN) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800984 /* Blackfin u-boot monitor should be on top of the ram */
985 reserve_uboot,
986#endif
Francois Retief1e85cce2015-11-23 13:05:44 +0200987#if defined(CONFIG_SPARC)
988 reserve_prom,
989#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000990#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
991 reserve_logbuffer,
992#endif
993#ifdef CONFIG_PRAM
994 reserve_pram,
995#endif
996 reserve_round_4k,
997#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
998 defined(CONFIG_ARM)
999 reserve_mmu,
1000#endif
Simon Glass5a541942016-01-18 19:52:21 -07001001#ifdef CONFIG_DM_VIDEO
1002 reserve_video,
1003#else
1004# ifdef CONFIG_LCD
Simon Glass1938f4a2013-03-11 06:49:53 +00001005 reserve_lcd,
Simon Glass5a541942016-01-18 19:52:21 -07001006# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +00001007 /* TODO: Why the dependency on CONFIG_8xx? */
Simon Glass5a541942016-01-18 19:52:21 -07001008# if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
Sonic Zhangd54d7eb2014-07-17 19:01:34 +08001009 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +01001010 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glass5a541942016-01-18 19:52:21 -07001011 reserve_legacy_video,
1012# endif
1013#endif /* CONFIG_DM_VIDEO */
Simon Glass8703ef32016-01-18 19:52:20 -07001014 reserve_trace,
Chris Zankelde5e5ce2016-08-10 18:36:43 +03001015#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_XTENSA)
Simon Glass1938f4a2013-03-11 06:49:53 +00001016 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +08001017#endif
Simon Glass8cae8a62013-03-05 14:39:45 +00001018#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +00001019 reserve_malloc,
1020 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +00001021#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001022 setup_machine,
1023 reserve_global_data,
1024 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -07001025 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +00001026 reserve_stacks,
1027 setup_dram_config,
1028 show_dram_config,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +01001029#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
Simon Glasse4fef6c2013-03-11 14:30:42 +00001030 setup_board_part1,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +01001031#endif
1032#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +00001033 INIT_FUNC_WATCHDOG_RESET
1034 setup_board_part2,
1035#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001036 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +00001037#ifdef CONFIG_SYS_EXTBDINFO
1038 setup_board_extra,
1039#endif
1040 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +00001041 reloc_fdt,
1042 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001043#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -07001044 copy_uboot_to_ram,
1045 clear_bss,
1046 do_elf_reloc_fixups,
1047#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +03001048#if defined(CONFIG_XTENSA)
1049 clear_bss,
1050#endif
Simon Glass808434c2013-11-10 10:26:59 -07001051#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001052 jump_to_copy,
1053#endif
1054 NULL,
1055};
1056
1057void board_init_f(ulong boot_flags)
1058{
York Sun2a1680e2014-05-02 17:28:04 -07001059#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1060 /*
1061 * For some archtectures, global data is initialized and used before
1062 * calling this function. The data should be preserved. For others,
1063 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1064 * here to host global data until relocation.
1065 */
Simon Glass1938f4a2013-03-11 06:49:53 +00001066 gd_t data;
1067
1068 gd = &data;
1069
David Fengcce6be72013-12-14 11:47:36 +08001070 /*
1071 * Clear global data before it is accessed at debug print
1072 * in initcall_run_list. Otherwise the debug print probably
1073 * get the wrong vaule of gd->have_console.
1074 */
David Fengcce6be72013-12-14 11:47:36 +08001075 zero_global_data();
1076#endif
1077
Simon Glass1938f4a2013-03-11 06:49:53 +00001078 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001079 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001080
1081 if (initcall_run_list(init_sequence_f))
1082 hang();
1083
Ben Stoltz9b217492015-07-31 09:31:37 -06001084#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1085 !defined(CONFIG_EFI_APP)
Simon Glass1938f4a2013-03-11 06:49:53 +00001086 /* NOTREACHED - jump_to_copy() does not return */
1087 hang();
1088#endif
1089}
1090
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001091#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +00001092/*
1093 * For now this code is only used on x86.
1094 *
1095 * init_sequence_f_r is the list of init functions which are run when
1096 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1097 * The following limitations must be considered when implementing an
1098 * '_f_r' function:
1099 * - 'static' variables are read-only
1100 * - Global Data (gd->xxx) is read/write
1101 *
1102 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1103 * supported). It _should_, if possible, copy global data to RAM and
1104 * initialise the CPU caches (to speed up the relocation process)
1105 *
1106 * NOTE: At present only x86 uses this route, but it is intended that
1107 * all archs will move to this when generic relocation is implemented.
1108 */
1109static init_fnc_t init_sequence_f_r[] = {
1110 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001111
1112 NULL,
1113};
1114
1115void board_init_f_r(void)
1116{
1117 if (initcall_run_list(init_sequence_f_r))
1118 hang();
1119
1120 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -07001121 * The pre-relocation drivers may be using memory that has now gone
1122 * away. Mark serial as unavailable - this will fall back to the debug
1123 * UART if available.
1124 */
1125 gd->flags &= ~GD_FLG_SERIAL_READY;
1126
1127 /*
Simon Glass48a33802013-03-05 14:39:52 +00001128 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1129 * Transfer execution from Flash to RAM by calculating the address
1130 * of the in-RAM copy of board_init_r() and calling it
1131 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001132 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001133
1134 /* NOTREACHED - board_init_r() does not return */
1135 hang();
1136}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001137#endif /* CONFIG_X86 */