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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Tom Rixcd782632009-06-28 12:52:29 -05002/*
3 * Copyright (c) 2009 Wind River Systems, Inc.
4 * Tom Rix <Tom.Rix at windriver.com>
5 *
Tom Rix2c155132009-06-28 12:52:30 -05006 * twl4030_power_reset_init is derived from code on omapzoom,
7 * git://git.omapzoom.com/repo/u-boot.git
Tom Rixcd782632009-06-28 12:52:29 -05008 *
9 * Copyright (C) 2007-2009 Texas Instruments, Inc.
Tom Rix2c155132009-06-28 12:52:30 -050010 *
11 * twl4030_power_init is from cpu/omap3/common.c, power_init_r
12 *
13 * (C) Copyright 2004-2008
14 * Texas Instruments, <www.ti.com>
15 *
16 * Author :
17 * Sunil Kumar <sunilsaini05 at gmail.com>
18 * Shashi Ranjan <shashiranjanmca05 at gmail.com>
19 *
20 * Derived from Beagle Board and 3430 SDP code by
21 * Richard Woodruff <r-woodruff2 at ti.com>
22 * Syed Mohammed Khasim <khasim at ti.com>
Tom Rixcd782632009-06-28 12:52:29 -050023 */
24
Simon Glass09140112020-05-10 11:40:03 -060025#include <command.h>
Tom Rixcd782632009-06-28 12:52:29 -050026#include <twl4030.h>
Simon Glassc05ed002020-05-10 11:40:11 -060027#include <linux/delay.h>
Tom Rixcd782632009-06-28 12:52:29 -050028
29/*
30 * Power Reset
31 */
32void twl4030_power_reset_init(void)
33{
34 u8 val = 0;
Nishanth Menonb29c2f02013-03-26 05:20:50 +000035 if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
36 TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
Tom Rixcd782632009-06-28 12:52:29 -050037 printf("Error:TWL4030: failed to read the power register\n");
38 printf("Could not initialize hardware reset\n");
39 } else {
40 val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
Nishanth Menon0208aaf2013-03-26 05:20:49 +000041 if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
42 TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
Tom Rixcd782632009-06-28 12:52:29 -050043 printf("Error:TWL4030: failed to write the power register\n");
44 printf("Could not initialize hardware reset\n");
45 }
46 }
47}
48
Tom Rix2c155132009-06-28 12:52:30 -050049/*
Paul Kocialkowski6dc443e2015-07-20 15:17:07 +020050 * Power off
51 */
52void twl4030_power_off(void)
53{
54 u8 data;
55
56 /* PM master unlock (CFG and TST keys) */
57
58 data = 0xCE;
59 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
60 TWL4030_PM_MASTER_PROTECT_KEY, data);
61 data = 0xEC;
62 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
63 TWL4030_PM_MASTER_PROTECT_KEY, data);
64
65 /* VBAT start disable */
66
67 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
68 TWL4030_PM_MASTER_CFG_P1_TRANSITION, &data);
69 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
70 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
71 TWL4030_PM_MASTER_CFG_P1_TRANSITION, data);
72
73 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
74 TWL4030_PM_MASTER_CFG_P2_TRANSITION, &data);
75 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
76 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
77 TWL4030_PM_MASTER_CFG_P2_TRANSITION, data);
78
79 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
80 TWL4030_PM_MASTER_CFG_P3_TRANSITION, &data);
81 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
82 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
83 TWL4030_PM_MASTER_CFG_P3_TRANSITION, data);
84
85 /* High jitter for PWRANA2 */
86
87 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
88 TWL4030_PM_MASTER_CFG_PWRANA2, &data);
89 data &= ~(TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV |
90 TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV);
91 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
92 TWL4030_PM_MASTER_CFG_PWRANA2, data);
93
94 /* PM master lock */
95
96 data = 0xFF;
97 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
98 TWL4030_PM_MASTER_PROTECT_KEY, data);
99
100 /* Power off */
101
102 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
103 TWL4030_PM_MASTER_P1_SW_EVENTS, &data);
104 data |= TWL4030_PM_MASTER_SW_EVENTS_DEVOFF;
105 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
106 TWL4030_PM_MASTER_P1_SW_EVENTS, data);
107}
108
109/*
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700110 * Set Device Group and Voltage
Tom Rix2c155132009-06-28 12:52:30 -0500111 */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700112void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
113 u8 dev_grp, u8 dev_grp_sel)
114{
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +0000115 int ret;
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700116
117 /* Select the Voltage */
Nishanth Menon0208aaf2013-03-26 05:20:49 +0000118 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
119 vsel_val);
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +0000120 if (ret != 0) {
Peter Meerwalddfe36102012-11-19 23:13:04 +0000121 printf("Could not write vsel to reg %02x (%d)\n",
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +0000122 vsel_reg, ret);
123 return;
124 }
125
126 /* Select the Device Group (enable the supply if dev_grp_sel != 0) */
Nishanth Menon0208aaf2013-03-26 05:20:49 +0000127 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
128 dev_grp_sel);
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +0000129 if (ret != 0)
Peter Meerwalddfe36102012-11-19 23:13:04 +0000130 printf("Could not write grp_sel to reg %02x (%d)\n",
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +0000131 dev_grp, ret);
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700132}
Tom Rix2c155132009-06-28 12:52:30 -0500133
134void twl4030_power_init(void)
135{
Tom Rix2c155132009-06-28 12:52:30 -0500136 /* set VAUX3 to 2.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700137 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
138 TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
139 TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
140 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Tom Rix2c155132009-06-28 12:52:30 -0500141
142 /* set VPLL2 to 1.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700143 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
144 TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
145 TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
146 TWL4030_PM_RECEIVER_DEV_GRP_ALL);
Tom Rix2c155132009-06-28 12:52:30 -0500147
148 /* set VDAC to 1.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -0700149 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
150 TWL4030_PM_RECEIVER_VDAC_VSEL_18,
151 TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
152 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Tom Rix2c155132009-06-28 12:52:30 -0500153}
154
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +0100155void twl4030_power_mmc_init(int dev_index)
Tom Rixfccc0fc2009-06-28 12:52:31 -0500156{
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +0100157 if (dev_index == 0) {
158 /* Set VMMC1 to 3.15 Volts */
159 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
160 TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
161 TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
162 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Paul Kocialkowski2ed8c872014-10-28 18:14:23 +0100163
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +0100164 mdelay(100); /* ramp-up delay from Linux code */
165 } else if (dev_index == 1) {
166 /* Set VMMC2 to 3.15 Volts */
167 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
168 TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
169 TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
170 TWL4030_PM_RECEIVER_DEV_GRP_P1);
171
172 mdelay(100); /* ramp-up delay from Linux code */
173 }
Tom Rixfccc0fc2009-06-28 12:52:31 -0500174}
Adam Ford4c2fb5f2017-04-24 13:34:43 -0500175
176#ifdef CONFIG_CMD_POWEROFF
Simon Glass09140112020-05-10 11:40:03 -0600177int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
Adam Ford4c2fb5f2017-04-24 13:34:43 -0500178{
179 twl4030_power_off();
180
181 return 0;
182}
183#endif
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100184
Igor Opaniuk2147a162021-02-09 13:52:45 +0200185#if CONFIG_IS_ENABLED(DM_I2C)
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100186int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
187{
188 struct udevice *dev;
189 int ret;
190
191 ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
192 if (ret) {
193 pr_err("unable to get I2C bus. ret %d\n", ret);
194 return ret;
195 }
196 ret = dm_i2c_reg_write(dev, reg, val);
197 if (ret) {
198 pr_err("writing to twl4030 failed. ret %d\n", ret);
199 return ret;
200 }
201 return 0;
202}
203
Pali Rohár4fcc0842020-10-26 22:36:15 +0100204int twl4030_i2c_read(u8 chip_no, u8 reg, u8 *valp, int len)
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100205{
206 struct udevice *dev;
207 int ret;
208
209 ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
210 if (ret) {
211 pr_err("unable to get I2C bus. ret %d\n", ret);
212 return ret;
213 }
Pali Rohár4fcc0842020-10-26 22:36:15 +0100214 ret = dm_i2c_read(dev, reg, valp, len);
215 if (ret) {
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100216 pr_err("reading from twl4030 failed. ret %d\n", ret);
217 return ret;
218 }
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100219 return 0;
220}
221#endif