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Haavard Skinnemoen6b443942007-04-14 17:11:49 +02001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
23
24#include <asm/io.h>
25#include <asm/sdram.h>
Haavard Skinnemoend38da532008-01-23 17:20:14 +010026#include <asm/arch/clk.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020027#include <asm/arch/gpio.h>
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020028#include <asm/arch/hmatrix.h>
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020029#include <asm/arch/portmux.h>
Ben Warren89973f82008-08-31 22:22:04 -070030#include <netdev.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020031
32DECLARE_GLOBAL_DATA_PTR;
33
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020034static const struct sdram_config sdram_config = {
35 .data_bits = SDRAM_DATA_16BIT,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020036 .row_bits = 13,
37 .col_bits = 9,
38 .bank_bits = 2,
39 .cas = 3,
40 .twr = 2,
41 .trc = 7,
42 .trp = 2,
43 .trcd = 2,
44 .tras = 5,
45 .txsr = 5,
Haavard Skinnemoend38da532008-01-23 17:20:14 +010046 /* 7.81 us */
47 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020048};
49
50int board_early_init_f(void)
51{
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020052 /* Enable SDRAM in the EBI mux */
53 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020054
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020055 portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
56 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020057
58#if defined(CONFIG_MACB)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020059 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
60 portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020061#endif
62#if defined(CONFIG_MMC)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020063 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020064#endif
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020065#if defined(CONFIG_ATMEL_SPI)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020066 portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020067#endif
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020068
69 return 0;
70}
71
Becky Bruce9973e3c2008-06-09 16:03:40 -050072phys_size_t initdram(int board_type)
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020073{
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020074 unsigned long expected_size;
75 unsigned long actual_size;
76 void *sdram_base;
77
78 sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
79
80 expected_size = sdram_init(sdram_base, &sdram_config);
81 actual_size = get_ram_size(sdram_base, expected_size);
82
83 unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
84
85 if (expected_size != actual_size)
Haavard Skinnemoen7f4b0092008-07-23 10:55:15 +020086 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020087 actual_size >> 20, expected_size >> 20);
88
89 return actual_size;
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020090}
91
Haavard Skinnemoen25e68542008-08-31 18:46:35 +020092int board_early_init_r(void)
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020093{
94 gd->bd->bi_phy_id[0] = 0x01;
95 gd->bd->bi_phy_id[1] = 0x03;
Haavard Skinnemoen25e68542008-08-31 18:46:35 +020096 return 0;
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020097}
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020098
Ben Warrenc8c845c2008-07-05 00:08:48 -070099#ifdef CONFIG_CMD_NET
100int board_eth_init(bd_t *bi)
101{
102 macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
103 macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
104 return 0;
105}
106#endif
107
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200108/* SPI chip select control */
109#ifdef CONFIG_ATMEL_SPI
110#include <spi.h>
111
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200112#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200113
114int spi_cs_is_valid(unsigned int bus, unsigned int cs)
115{
116 return bus == 0 && cs == 0;
117}
118
119void spi_cs_activate(struct spi_slave *slave)
120{
121 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
122}
123
124void spi_cs_deactivate(struct spi_slave *slave)
125{
126 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
127}
128#endif /* CONFIG_ATMEL_SPI */