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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glassfa54eb12014-09-04 16:27:32 -06007#include <common.h>
Paul Burton50fce1d2016-09-08 07:47:29 +01008#include <clk.h>
Simon Glass12e431b2014-09-04 16:27:34 -06009#include <dm.h>
10#include <errno.h>
wdenke85390d2002-04-01 14:29:03 +000011#include <ns16550.h>
Ley Foon Tanb051eec2018-06-14 18:45:22 +080012#include <reset.h>
Simon Glass12e431b2014-09-04 16:27:34 -060013#include <serial.h>
Ladislav Michla1b322a2010-02-01 23:34:25 +010014#include <watchdog.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100015#include <linux/types.h>
16#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000017
Simon Glass12e431b2014-09-04 16:27:34 -060018DECLARE_GLOBAL_DATA_PTR;
19
Detlev Zundel200779e2009-04-03 11:53:01 +020020#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21#define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
Simon Glass12e431b2014-09-04 16:27:34 -060023
24#ifndef CONFIG_DM_SERIAL
Graeme Russ167cdad2010-04-24 00:05:46 +100025#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassf8df9d02011-10-15 19:14:09 +000026#define serial_out(x, y) outb(x, (ulong)y)
27#define serial_in(y) inb((ulong)y)
Dave Aldridge79df1202011-09-01 22:47:14 +000028#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000029#define serial_out(x, y) out_be32(y, x)
30#define serial_in(y) in_be32(y)
Dave Aldridge79df1202011-09-01 22:47:14 +000031#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000032#define serial_out(x, y) out_le32(y, x)
33#define serial_in(y) in_le32(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100034#else
Simon Glassf8df9d02011-10-15 19:14:09 +000035#define serial_out(x, y) writeb(x, y)
36#define serial_in(y) readb(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100037#endif
Simon Glass12e431b2014-09-04 16:27:34 -060038#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000039
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +030040#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -040041#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
42#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -040043#undef UART_MCRVAL
44#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
46#else
47#define UART_MCRVAL (UART_MCR_RTS)
48#endif
Vitaly Andrianovef509b92014-04-04 13:16:53 -040049#endif
50
Prafulla Wadaskara160ea02010-10-27 21:58:31 +053051#ifndef CONFIG_SYS_NS16550_IER
52#define CONFIG_SYS_NS16550_IER 0x00
53#endif /* CONFIG_SYS_NS16550_IER */
54
Simon Glass363e6da2015-02-27 22:06:26 -070055static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass76571672015-01-26 18:27:08 -070056{
57#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 outb(value, (ulong)addr);
Bernhard Messerklinger78b7d372018-02-15 09:02:26 +010059#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass76571672015-01-26 18:27:08 -070060 out_le32(addr, value);
61#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 out_be32(addr, value);
Simon Glass90914002015-05-12 14:55:02 -060063#elif defined(CONFIG_SYS_NS16550_MEM32)
64 writel(value, addr);
Simon Glass76571672015-01-26 18:27:08 -070065#elif defined(CONFIG_SYS_BIG_ENDIAN)
66 writeb(value, addr + (1 << shift) - 1);
67#else
68 writeb(value, addr);
69#endif
70}
71
Simon Glass363e6da2015-02-27 22:06:26 -070072static inline int serial_in_shift(void *addr, int shift)
Simon Glass76571672015-01-26 18:27:08 -070073{
74#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 return inb((ulong)addr);
Bernhard Messerklinger78b7d372018-02-15 09:02:26 +010076#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass76571672015-01-26 18:27:08 -070077 return in_le32(addr);
78#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
79 return in_be32(addr);
Simon Glass90914002015-05-12 14:55:02 -060080#elif defined(CONFIG_SYS_NS16550_MEM32)
81 return readl(addr);
Simon Glass76571672015-01-26 18:27:08 -070082#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Lin20379c12015-02-28 15:55:36 +080083 return readb(addr + (1 << shift) - 1);
Simon Glass76571672015-01-26 18:27:08 -070084#else
85 return readb(addr);
86#endif
87}
88
Marek Vasutfa4ce722016-05-25 02:13:03 +020089#ifdef CONFIG_DM_SERIAL
90
91#ifndef CONFIG_SYS_NS16550_CLK
92#define CONFIG_SYS_NS16550_CLK 0
93#endif
94
Simon Glass12e431b2014-09-04 16:27:34 -060095static void ns16550_writeb(NS16550_t port, int offset, int value)
96{
97 struct ns16550_platdata *plat = port->plat;
98 unsigned char *addr;
99
100 offset *= 1 << plat->reg_shift;
Paul Burtondf8ec552016-05-17 07:43:26 +0100101 addr = (unsigned char *)plat->base + offset;
102
Simon Glass12e431b2014-09-04 16:27:34 -0600103 /*
104 * As far as we know it doesn't make sense to support selection of
105 * these options at run-time, so use the existing CONFIG options.
106 */
Michal Simek59b35dd2016-02-16 16:17:49 +0100107 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
Simon Glass12e431b2014-09-04 16:27:34 -0600108}
109
110static int ns16550_readb(NS16550_t port, int offset)
111{
112 struct ns16550_platdata *plat = port->plat;
113 unsigned char *addr;
114
115 offset *= 1 << plat->reg_shift;
Paul Burtondf8ec552016-05-17 07:43:26 +0100116 addr = (unsigned char *)plat->base + offset;
Simon Glass76571672015-01-26 18:27:08 -0700117
Michal Simek59b35dd2016-02-16 16:17:49 +0100118 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
Simon Glass12e431b2014-09-04 16:27:34 -0600119}
120
Marek Vasut65f83802016-12-01 02:06:29 +0100121static u32 ns16550_getfcr(NS16550_t port)
122{
123 struct ns16550_platdata *plat = port->plat;
124
125 return plat->fcr;
126}
127
Simon Glass12e431b2014-09-04 16:27:34 -0600128/* We can clean these up once everything is moved to driver model */
129#define serial_out(value, addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700130 ns16550_writeb(com_port, \
131 (unsigned char *)addr - (unsigned char *)com_port, value)
Simon Glass12e431b2014-09-04 16:27:34 -0600132#define serial_in(addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700133 ns16550_readb(com_port, \
134 (unsigned char *)addr - (unsigned char *)com_port)
Marek Vasut65f83802016-12-01 02:06:29 +0100135#else
136static u32 ns16550_getfcr(NS16550_t port)
137{
Heiko Schocher17fa0322017-01-18 08:05:49 +0100138 return UART_FCR_DEFVAL;
Marek Vasut65f83802016-12-01 02:06:29 +0100139}
Simon Glass12e431b2014-09-04 16:27:34 -0600140#endif
141
Marek Vasut03c6f172016-05-25 02:13:16 +0200142int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glassfa54eb12014-09-04 16:27:32 -0600143{
144 const unsigned int mode_x_div = 16;
145
Simon Glass21d00432015-01-26 18:27:09 -0700146 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
147}
148
Simon Glass8bbe33c2014-09-04 16:27:33 -0600149static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
150{
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100151 /* to keep serial format, read lcr before writing BKSE */
152 int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
153
154 serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600155 serial_out(baud_divisor & 0xff, &com_port->dll);
156 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100157 serial_out(lcr_val, &com_port->lcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600158}
159
Simon Glassf8df9d02011-10-15 19:14:09 +0000160void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000161{
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800162#if (defined(CONFIG_SPL_BUILD) && \
163 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000164 /*
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800165 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
166 * before SPL starts only THRE bit is set. We have to empty the
167 * transmitter before initialization starts.
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000168 */
169 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
170 == UART_LSR_THRE) {
Simon Glass12e431b2014-09-04 16:27:34 -0600171 if (baud_divisor != -1)
172 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000173 serial_out(0, &com_port->mdr1);
174 }
175#endif
176
Scott Woodcb55b332012-09-18 18:19:05 -0500177 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
178 ;
179
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530180 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Lokesh Vutla5d754192018-08-27 15:55:24 +0530181#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
Graeme Russ167cdad2010-04-24 00:05:46 +1000182 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk945af8d2003-07-16 21:53:01 +0000183#endif
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800184
Graeme Russ167cdad2010-04-24 00:05:46 +1000185 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasut65f83802016-12-01 02:06:29 +0100186 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100187 /* initialize serial config to 8N1 before writing baudrate */
188 serial_out(UART_LCRVAL, &com_port->lcr);
Simon Glass12e431b2014-09-04 16:27:34 -0600189 if (baud_divisor != -1)
190 NS16550_setbrg(com_port, baud_divisor);
Lokesh Vutla5d754192018-08-27 15:55:24 +0530191#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
192 defined(CONFIG_OMAP_SERIAL)
Simon Glassf8df9d02011-10-15 19:14:09 +0000193 /* /16 is proper to hit 115200 with 48MHz */
194 serial_out(0, &com_port->mdr1);
Tom Rini89024dd2017-05-12 22:33:16 -0400195#endif
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +0300196#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -0400197 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
198#endif
wdenke85390d2002-04-01 14:29:03 +0000199}
200
Ron Madridf5675aa2009-02-18 14:30:44 -0800201#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000202void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000203{
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530204 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600205 NS16550_setbrg(com_port, 0);
Graeme Russ167cdad2010-04-24 00:05:46 +1000206 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasut65f83802016-12-01 02:06:29 +0100207 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600208 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000209}
Ron Madridf5675aa2009-02-18 14:30:44 -0800210#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000211
Simon Glassf8df9d02011-10-15 19:14:09 +0000212void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000213{
Simon Glassf8df9d02011-10-15 19:14:09 +0000214 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
215 ;
Graeme Russ167cdad2010-04-24 00:05:46 +1000216 serial_out(c, &com_port->thr);
Stefan Roese1a2d9b32010-10-12 09:39:45 +0200217
218 /*
219 * Call watchdog_reset() upon newline. This is done here in putc
220 * since the environment code uses a single puts() to print the complete
221 * environment upon "printenv". So we can't put this watchdog call
222 * in puts().
223 */
224 if (c == '\n')
225 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000226}
227
Ron Madridf5675aa2009-02-18 14:30:44 -0800228#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000229char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000230{
Graeme Russ167cdad2010-04-24 00:05:46 +1000231 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasutf2041382012-09-15 10:25:19 +0200232#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk232c1502004-03-12 00:14:09 +0000233 extern void usbtty_poll(void);
234 usbtty_poll();
235#endif
Ladislav Michla1b322a2010-02-01 23:34:25 +0100236 WATCHDOG_RESET();
wdenk232c1502004-03-12 00:14:09 +0000237 }
Graeme Russ167cdad2010-04-24 00:05:46 +1000238 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000239}
240
Simon Glassf8df9d02011-10-15 19:14:09 +0000241int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000242{
Simon Glassf8df9d02011-10-15 19:14:09 +0000243 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000244}
245
Ron Madridf5675aa2009-02-18 14:30:44 -0800246#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass12e431b2014-09-04 16:27:34 -0600247
Simon Glass21d00432015-01-26 18:27:09 -0700248#ifdef CONFIG_DEBUG_UART_NS16550
249
250#include <debug_uart.h>
251
Simon Glass97b05972015-10-18 19:51:23 -0600252static inline void _debug_uart_init(void)
Simon Glass21d00432015-01-26 18:27:09 -0700253{
254 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
255 int baud_divisor;
256
257 /*
258 * We copy the code from above because it is already horribly messy.
259 * Trying to refactor to nicely remove the duplication doesn't seem
260 * feasible. The better fix is to move all users of this driver to
261 * driver model.
262 */
Marek Vasut03c6f172016-05-25 02:13:16 +0200263 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
264 CONFIG_BAUDRATE);
Simon Glass6e780c72015-06-23 15:39:06 -0600265 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
266 serial_dout(&com_port->mcr, UART_MCRVAL);
Heiko Schocher17fa0322017-01-18 08:05:49 +0100267 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700268
Simon Glass6e780c72015-06-23 15:39:06 -0600269 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
270 serial_dout(&com_port->dll, baud_divisor & 0xff);
271 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
272 serial_dout(&com_port->lcr, UART_LCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700273}
274
Simon Goldschmidtc4448bd2019-01-09 20:35:31 +0100275static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
276{
277 int ret;
278
279 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
280 ret = serial_din(&com_port->dll) & 0xff;
281 ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
282 serial_dout(&com_port->lcr, UART_LCRVAL);
283
284 return ret;
285}
286
Simon Glass21d00432015-01-26 18:27:09 -0700287static inline void _debug_uart_putc(int ch)
288{
289 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
290
Simon Goldschmidtc4448bd2019-01-09 20:35:31 +0100291 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
292#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
293 if (!NS16550_read_baud_divisor(com_port))
294 return;
295#endif
296 }
Simon Glass6e780c72015-06-23 15:39:06 -0600297 serial_dout(&com_port->thr, ch);
Simon Glass21d00432015-01-26 18:27:09 -0700298}
299
300DEBUG_UART_FUNCS
301
302#endif
303
Simon Glass12e431b2014-09-04 16:27:34 -0600304#ifdef CONFIG_DM_SERIAL
305static int ns16550_serial_putc(struct udevice *dev, const char ch)
306{
307 struct NS16550 *const com_port = dev_get_priv(dev);
308
309 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
310 return -EAGAIN;
311 serial_out(ch, &com_port->thr);
312
313 /*
314 * Call watchdog_reset() upon newline. This is done here in putc
315 * since the environment code uses a single puts() to print the complete
316 * environment upon "printenv". So we can't put this watchdog call
317 * in puts().
318 */
319 if (ch == '\n')
320 WATCHDOG_RESET();
321
322 return 0;
323}
324
325static int ns16550_serial_pending(struct udevice *dev, bool input)
326{
327 struct NS16550 *const com_port = dev_get_priv(dev);
328
329 if (input)
Mario Six4dbf9be2018-01-15 11:09:49 +0100330 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
Simon Glass12e431b2014-09-04 16:27:34 -0600331 else
Mario Six4dbf9be2018-01-15 11:09:49 +0100332 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
Simon Glass12e431b2014-09-04 16:27:34 -0600333}
334
335static int ns16550_serial_getc(struct udevice *dev)
336{
Stefan Roese7fded0c2017-08-16 17:37:15 +0200337 struct NS16550 *const com_port = dev_get_priv(dev);
338
339 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass12e431b2014-09-04 16:27:34 -0600340 return -EAGAIN;
341
Stefan Roese7fded0c2017-08-16 17:37:15 +0200342 return serial_in(&com_port->rbr);
Simon Glass12e431b2014-09-04 16:27:34 -0600343}
344
345static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
346{
347 struct NS16550 *const com_port = dev_get_priv(dev);
348 struct ns16550_platdata *plat = com_port->plat;
349 int clock_divisor;
350
351 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
352
353 NS16550_setbrg(com_port, clock_divisor);
354
355 return 0;
356}
357
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100358static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
359{
360 struct NS16550 *const com_port = dev_get_priv(dev);
361 int lcr_val = UART_LCR_WLS_8;
362 uint parity = SERIAL_GET_PARITY(serial_config);
363 uint bits = SERIAL_GET_BITS(serial_config);
364 uint stop = SERIAL_GET_STOP(serial_config);
365
366 /*
367 * only parity config is implemented, check if other serial settings
368 * are the default one.
369 */
370 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
371 return -ENOTSUPP; /* not supported in driver*/
372
373 switch (parity) {
374 case SERIAL_PAR_NONE:
375 /* no bits to add */
376 break;
377 case SERIAL_PAR_ODD:
378 lcr_val |= UART_LCR_PEN;
379 break;
380 case SERIAL_PAR_EVEN:
381 lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
382 break;
383 default:
384 return -ENOTSUPP; /* not supported in driver*/
385 }
386
387 serial_out(lcr_val, &com_port->lcr);
388 return 0;
389}
390
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200391static int ns16550_serial_getinfo(struct udevice *dev,
392 struct serial_device_info *info)
393{
394 struct NS16550 *const com_port = dev_get_priv(dev);
395 struct ns16550_platdata *plat = com_port->plat;
396
397 info->type = SERIAL_CHIP_16550_COMPATIBLE;
398#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
399 info->addr_space = SERIAL_ADDRESS_SPACE_IO;
400#else
401 info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
402#endif
403 info->addr = plat->base;
404 info->reg_width = plat->reg_width;
405 info->reg_shift = plat->reg_shift;
406 info->reg_offset = plat->reg_offset;
407 return 0;
408}
409
Simon Glass12e431b2014-09-04 16:27:34 -0600410int ns16550_serial_probe(struct udevice *dev)
411{
412 struct NS16550 *const com_port = dev_get_priv(dev);
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800413 struct reset_ctl_bulk reset_bulk;
414 int ret;
415
416 ret = reset_get_bulk(dev, &reset_bulk);
417 if (!ret)
418 reset_deassert_bulk(&reset_bulk);
Simon Glass12e431b2014-09-04 16:27:34 -0600419
Simon Glass11c1a872014-10-22 21:37:05 -0600420 com_port->plat = dev_get_platdata(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600421 NS16550_init(com_port, -1);
422
423 return 0;
424}
425
Marek Vasut79fd9282016-12-01 02:06:30 +0100426#if CONFIG_IS_ENABLED(OF_CONTROL)
427enum {
428 PORT_NS16550 = 0,
Marek Vasut0b060ee2016-12-01 02:06:31 +0100429 PORT_JZ4780,
Marek Vasut79fd9282016-12-01 02:06:30 +0100430};
431#endif
432
Simon Glassb2927fb2016-07-04 11:58:23 -0600433#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass12e431b2014-09-04 16:27:34 -0600434int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
435{
Simon Glass12e431b2014-09-04 16:27:34 -0600436 struct ns16550_platdata *plat = dev->platdata;
Marek Vasut0b060ee2016-12-01 02:06:31 +0100437 const u32 port_type = dev_get_driver_data(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600438 fdt_addr_t addr;
Masahiro Yamada021abf62016-09-26 20:45:27 +0900439 struct clk clk;
440 int err;
Simon Glass12e431b2014-09-04 16:27:34 -0600441
Bin Meng3db886a2014-12-31 16:05:12 +0800442 /* try Processor Local Bus device first */
Simon Glassdb9f8f62017-06-12 06:21:56 -0600443 addr = dev_read_addr(dev);
Sekhar Norid50d6812018-12-06 15:40:08 +0530444#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
Bin Meng3db886a2014-12-31 16:05:12 +0800445 if (addr == FDT_ADDR_T_NONE) {
446 /* then try pci device */
447 struct fdt_pci_addr pci_addr;
448 u32 bar;
449 int ret;
450
451 /* we prefer to use a memory-mapped register */
Simon Glasse160f7d2017-01-17 16:52:55 -0700452 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
Bin Meng3db886a2014-12-31 16:05:12 +0800453 FDT_PCI_SPACE_MEM32, "reg",
454 &pci_addr);
455 if (ret) {
456 /* try if there is any i/o-mapped register */
457 ret = fdtdec_get_pci_addr(gd->fdt_blob,
Simon Glasse160f7d2017-01-17 16:52:55 -0700458 dev_of_offset(dev),
Bin Meng3db886a2014-12-31 16:05:12 +0800459 FDT_PCI_SPACE_IO,
460 "reg", &pci_addr);
461 if (ret)
462 return ret;
463 }
464
Simon Glassfcc0a872015-11-29 13:17:54 -0700465 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
Bin Meng3db886a2014-12-31 16:05:12 +0800466 if (ret)
467 return ret;
468
469 addr = bar;
470 }
471#endif
472
Simon Glass12e431b2014-09-04 16:27:34 -0600473 if (addr == FDT_ADDR_T_NONE)
474 return -EINVAL;
475
Paul Burtondf8ec552016-05-17 07:43:26 +0100476#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass167efe02014-10-22 21:37:04 -0600477 plat->base = addr;
Paul Burtondf8ec552016-05-17 07:43:26 +0100478#else
479 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
480#endif
481
Philipp Tomsich3d404792017-06-07 18:46:02 +0200482 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
483 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
Andy Shevchenko4e720772018-11-20 23:52:35 +0200484 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
Paul Burton50fce1d2016-09-08 07:47:29 +0100485
486 err = clk_get_by_index(dev, 0, &clk);
487 if (!err) {
488 err = clk_get_rate(&clk);
489 if (!IS_ERR_VALUE(err))
490 plat->clock = err;
Alexandre Courbotab895d62016-09-30 17:37:00 +0900491 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
Paul Burton50fce1d2016-09-08 07:47:29 +0100492 debug("ns16550 failed to get clock\n");
493 return err;
494 }
495
496 if (!plat->clock)
Philipp Tomsich3d404792017-06-07 18:46:02 +0200497 plat->clock = dev_read_u32_default(dev, "clock-frequency",
498 CONFIG_SYS_NS16550_CLK);
Thomas Chou8e62d322015-11-19 21:48:05 +0800499 if (!plat->clock) {
500 debug("ns16550 clock not defined\n");
501 return -EINVAL;
502 }
Simon Glass12e431b2014-09-04 16:27:34 -0600503
Heiko Schocher17fa0322017-01-18 08:05:49 +0100504 plat->fcr = UART_FCR_DEFVAL;
Marek Vasut0b060ee2016-12-01 02:06:31 +0100505 if (port_type == PORT_JZ4780)
506 plat->fcr |= UART_FCR_UME;
Marek Vasut65f83802016-12-01 02:06:29 +0100507
Simon Glass12e431b2014-09-04 16:27:34 -0600508 return 0;
509}
Simon Glass11c1a872014-10-22 21:37:05 -0600510#endif
Simon Glass12e431b2014-09-04 16:27:34 -0600511
512const struct dm_serial_ops ns16550_serial_ops = {
513 .putc = ns16550_serial_putc,
514 .pending = ns16550_serial_pending,
515 .getc = ns16550_serial_getc,
516 .setbrg = ns16550_serial_setbrg,
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200517 .setconfig = ns16550_serial_setconfig,
518 .getinfo = ns16550_serial_getinfo,
Simon Glass12e431b2014-09-04 16:27:34 -0600519};
Thomas Chou8e62d322015-11-19 21:48:05 +0800520
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700521#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
Thomas Choucc4228f2015-12-14 20:45:09 +0800522/*
523 * Please consider existing compatible strings before adding a new
524 * one to keep this table compact. Or you may add a generic "ns16550"
525 * compatible string to your dts.
526 */
Thomas Chou8e62d322015-11-19 21:48:05 +0800527static const struct udevice_id ns16550_serial_ids[] = {
Marek Vasut79fd9282016-12-01 02:06:30 +0100528 { .compatible = "ns16550", .data = PORT_NS16550 },
529 { .compatible = "ns16550a", .data = PORT_NS16550 },
Marek Vasut0b060ee2016-12-01 02:06:31 +0100530 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
Marek Vasut79fd9282016-12-01 02:06:30 +0100531 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
532 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
Thomas Chou8e62d322015-11-19 21:48:05 +0800533 {}
534};
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700535#endif /* OF_CONTROL && !OF_PLATDATA */
Thomas Chou8e62d322015-11-19 21:48:05 +0800536
Simon Glassb7e29832015-12-13 21:36:59 -0700537#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700538
539/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
540#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
Thomas Chou8e62d322015-11-19 21:48:05 +0800541U_BOOT_DRIVER(ns16550_serial) = {
542 .name = "ns16550_serial",
543 .id = UCLASS_SERIAL,
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700544#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
Thomas Chou8e62d322015-11-19 21:48:05 +0800545 .of_match = ns16550_serial_ids,
546 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
547 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
548#endif
549 .priv_auto_alloc_size = sizeof(struct NS16550),
550 .probe = ns16550_serial_probe,
551 .ops = &ns16550_serial_ops,
Bin Meng46879192018-10-24 06:36:36 -0700552#if !CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glassb7e5a642015-12-04 08:58:38 -0700553 .flags = DM_FLAG_PRE_RELOC,
Bin Meng46879192018-10-24 06:36:36 -0700554#endif
Thomas Chou8e62d322015-11-19 21:48:05 +0800555};
Simon Glassb7e29832015-12-13 21:36:59 -0700556#endif
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700557#endif /* SERIAL_PRESENT */
558
Simon Glass12e431b2014-09-04 16:27:34 -0600559#endif /* CONFIG_DM_SERIAL */