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Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020011 select TPL_NEEDS_SEPARATE_STACK if TPL
12 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -060013 select SPL_SERIAL
14 select TPL_SERIAL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020015 select DEBUG_UART_BOARD_INIT
16 imply ROCKCHIP_COMMON_BOARD
17 imply SPL_ROCKCHIP_COMMON_BOARD
18 help
19 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
20 including NEON and GPU, Mali-400 graphics, several DDR3 options
21 and video codec support. Peripherals include Gigabit Ethernet,
22 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
23
Heiko Stübner041cdb52016-07-16 00:17:15 +020024config ROCKCHIP_RK3036
25 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053026 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080027 select SUPPORT_SPL
28 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +080029 imply USB_FUNCTION_ROCKUSB
30 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080031 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020032 help
33 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
34 including NEON and GPU, Mali-400 graphics, several DDR3 options
35 and video codec support. Peripherals include Gigabit Ethernet,
36 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
37
Kever Yangdaeed1d2017-11-28 16:04:16 +080038config ROCKCHIP_RK3128
39 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053040 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080041 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080042 help
43 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
44 including NEON and GPU, Mali-400 graphics, several DDR3 options
45 and video codec support. Peripherals include Gigabit Ethernet,
46 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
47
Heiko Stübner0a2be692017-02-18 19:46:36 +010048config ROCKCHIP_RK3188
49 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053050 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080051 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010052 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010053 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020054 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020055 select SPL_REGMAP
56 select SPL_SYSCON
57 select SPL_RAM
Simon Glass9ca00682021-07-10 21:14:31 -060058 select SPL_DRIVERS_MISC
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020059 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080060 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020061 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080062 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080063 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010064 help
65 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
66 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
67 video interfaces, several memory options and video codec support.
68 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
69 UART, SPI, I2C and PWMs.
70
Kever Yang168eef72017-06-23 17:17:52 +080071config ROCKCHIP_RK322X
72 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053073 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080074 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080075 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080076 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080077 select SPL_DM
78 select SPL_OF_LIBFDT
79 select TPL
80 select TPL_DM
81 select TPL_OF_LIBFDT
Kever Yangc34643e2019-04-02 20:41:24 +080082 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass9ca00682021-07-10 21:14:31 -060083 select SPL_DRIVERS_MISC
Kever Yangcca3b092019-07-22 20:02:07 +080084 imply ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -060085 imply SPL_SERIAL
Kever Yang0cd65e42019-07-22 19:59:20 +080086 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -060087 imply TPL_SERIAL
Kever Yang6ae28a32019-07-09 22:05:56 +080088 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080089 select TPL_LIBCOMMON_SUPPORT
90 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080091 help
92 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
93 including NEON and GPU, Mali-400 graphics, several DDR3 options
94 and video codec support. Peripherals include Gigabit Ethernet,
95 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
96
Simon Glass2444dae2015-08-30 16:55:38 -060097config ROCKCHIP_RK3288
98 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053099 select CPU_V7A
Jagan Tekieab5c502020-07-21 12:16:38 +0530100 select OF_BOARD_SETUP
Tom Rinia2ac2b92021-08-27 21:18:30 -0400101 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yanga381bcf2016-07-19 21:16:59 +0800102 select SUPPORT_SPL
103 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +0800104 select SUPPORT_TPL
Jagan Teki38070172020-01-23 19:42:19 +0530105 imply PRE_CONSOLE_BUFFER
Kever Yangde57a9f2019-07-22 20:02:15 +0800106 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +0800107 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800108 imply TPL_CLK
109 imply TPL_DM
Simon Glass9ca00682021-07-10 21:14:31 -0600110 imply TPL_DRIVERS_MISC
Kever Yangd18ca742019-07-02 11:43:05 +0800111 imply TPL_LIBCOMMON_SUPPORT
112 imply TPL_LIBGENERIC_SUPPORT
Kever Yang45290842019-07-02 11:43:06 +0800113 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +0800114 imply TPL_OF_CONTROL
115 imply TPL_OF_PLATDATA
116 imply TPL_RAM
117 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +0800118 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600119 imply TPL_SERIAL
Kever Yangd18ca742019-07-02 11:43:05 +0800120 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +0800121 imply USB_FUNCTION_ROCKUSB
122 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600123 help
124 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
125 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
126 video interfaces supporting HDMI and eDP, several DDR3 options
127 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100128 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600129
Andy Yanf1a22522019-11-14 11:21:12 +0800130config ROCKCHIP_RK3308
131 bool "Support Rockchip RK3308"
132 select ARM64
133 select DEBUG_UART_BOARD_INIT
134 select SUPPORT_SPL
135 select SUPPORT_TPL
136 select SPL
137 select SPL_ATF
138 select SPL_ATF_NO_PLATFORM_PARAM
139 select SPL_LOAD_FIT
140 imply ROCKCHIP_COMMON_BOARD
141 imply SPL_ROCKCHIP_COMMON_BOARD
142 imply SPL_CLK
143 imply SPL_REGMAP
144 imply SPL_SYSCON
145 imply SPL_RAM
Simon Glass2a736062021-08-08 12:20:12 -0600146 imply SPL_SERIAL
147 imply TPL_SERIAL
Andy Yanf1a22522019-11-14 11:21:12 +0800148 imply SPL_SEPARATE_BSS
149 help
150 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
151 Cortex-A35 and highly integrated audio interfaces.
152
Kever Yang85a3cfb2017-02-23 15:37:51 +0800153config ROCKCHIP_RK3328
154 bool "Support Rockchip RK3328"
155 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300156 select SUPPORT_SPL
157 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300158 select SUPPORT_TPL
159 select TPL
Kever Yang3f47db02019-08-02 10:40:01 +0300160 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800161 imply ROCKCHIP_COMMON_BOARD
YouMin Chenca93e322019-11-15 11:04:44 +0800162 imply ROCKCHIP_SDRAM_COMMON
Kever Yang9cc67042019-07-22 19:59:32 +0800163 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600164 imply SPL_SERIAL
165 imply TPL_SERIAL
Kever Yangc009aeb2019-06-09 00:27:15 +0300166 imply SPL_SEPARATE_BSS
167 select ENABLE_ARM_SOC_BOOT0_HOOK
168 select DEBUG_UART_BOARD_INIT
169 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800170 help
171 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
172 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
173 video interfaces supporting HDMI and eDP, several DDR3 options
174 and video codec support. Peripherals include Gigabit Ethernet,
175 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
176
Andreas Färber37a0c602017-05-15 17:51:18 +0800177config ROCKCHIP_RK3368
178 bool "Support Rockchip RK3368"
179 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200180 select SUPPORT_SPL
181 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200182 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800183 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800184 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200185 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600186 imply SPL_SERIAL
187 imply TPL_SERIAL
Kever Yang82560cb2019-07-09 22:05:58 +0800188 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800189 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200190 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
191 into a big and little cluster with 4 cores each) Cortex-A53 including
192 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
193 (for the little cluster), PowerVR G6110 based graphics, one video
194 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
195 video codec support.
196
197 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
198 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800199
Kever Yanga381bcf2016-07-19 21:16:59 +0800200config ROCKCHIP_RK3399
201 bool "Support Rockchip RK3399"
202 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800203 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800204 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800205 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530206 select SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530207 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530208 select SPL_LOAD_FIT
209 select SPL_CLK if SPL
210 select SPL_PINCTRL if SPL
211 select SPL_RAM if SPL
212 select SPL_REGMAP if SPL
213 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800214 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800215 select SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600216 select SPL_SERIAL
Simon Glass9ca00682021-07-10 21:14:31 -0600217 select SPL_DRIVERS_MISC
Jagan Teki2666bd42019-05-08 11:11:43 +0530218 select CLK
219 select FIT
220 select PINCTRL
221 select RAM
222 select REGMAP
223 select SYSCON
224 select DM_PMIC
225 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800226 select BOARD_LATE_INIT
Jagan Teki61853a72020-04-02 17:11:23 +0530227 imply PRE_CONSOLE_BUFFER
Kever Yang920b0132019-07-22 20:02:19 +0800228 imply ROCKCHIP_COMMON_BOARD
YouMin Chena922d0d2019-11-15 11:04:45 +0800229 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Baker46a86062020-06-16 00:30:47 +0100230 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangb7abef22019-07-22 19:59:42 +0800231 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600232 imply TPL_SERIAL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800233 imply TPL_LIBCOMMON_SUPPORT
234 imply TPL_LIBGENERIC_SUPPORT
235 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass9ca00682021-07-10 21:14:31 -0600236 imply TPL_DRIVERS_MISC
Kever Yang6bbf5e12018-11-09 11:18:15 +0800237 imply TPL_OF_CONTROL
238 imply TPL_DM
239 imply TPL_REGMAP
240 imply TPL_SYSCON
241 imply TPL_RAM
242 imply TPL_CLK
243 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800244 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekiefebc8e2020-01-09 14:22:19 +0530245 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
246 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yanga381bcf2016-07-19 21:16:59 +0800247 help
248 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
249 and quad-core Cortex-A53.
250 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
251 video interfaces supporting HDMI and eDP, several DDR3 options
252 and video codec support. Peripherals include Gigabit Ethernet,
253 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
254
Joseph Chen2a950e32021-06-02 15:58:25 +0800255config ROCKCHIP_RK3568
256 bool "Support Rockchip RK3568"
257 select ARM64
Nico Chengdaec31e2021-10-26 10:42:19 +0800258 select SUPPORT_SPL
259 select SPL
Joseph Chen2a950e32021-06-02 15:58:25 +0800260 select CLK
261 select PINCTRL
262 select RAM
263 select REGMAP
264 select SYSCON
265 select BOARD_LATE_INIT
266 imply ROCKCHIP_COMMON_BOARD
267 help
268 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
269 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
270 two video interfaces supporting HDMI and eDP, several DDR3 options
271 and video codec support. Peripherals include Gigabit Ethernet,
272 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
273
Andy Yan2c1e11d2017-06-01 18:00:55 +0800274config ROCKCHIP_RV1108
275 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530276 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800277 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800278 help
279 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
280 and a DSP.
281
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200282config ROCKCHIP_USB_UART
283 bool "Route uart output to usb pins"
284 help
285 Rockchip SoCs have the ability to route the signals of the debug
286 uart through the d+ and d- pins of a specific usb phy to enable
287 some form of closed-case debugging. With this option supported
288 SoCs will enable this routing as a debug measure.
289
Philipp Tomsichee14d292017-06-29 11:21:15 +0200290config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800291 bool "SPL returns to bootrom"
292 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100293 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800294 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200295 depends on SPL
296 help
297 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
298 SPL will return to the boot rom, which will then load the U-Boot
299 binary to keep going on.
300
301config TPL_ROCKCHIP_BACK_TO_BROM
302 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800303 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200304 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800305 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200306 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800307 help
308 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
309 SPL will return to the boot rom, which will then load the U-Boot
310 binary to keep going on.
311
Kever Yang54f17fa2019-07-22 20:02:01 +0800312config ROCKCHIP_COMMON_BOARD
313 bool "Rockchip common board file"
314 help
315 Rockchip SoCs have similar boot process, Common board file is mainly
316 in charge of common process of board_init() and board_late_init() for
317 U-Boot proper.
318
Kever Yang49105fb2019-07-22 19:59:12 +0800319config SPL_ROCKCHIP_COMMON_BOARD
320 bool "Rockchip SPL common board file"
321 depends on SPL
322 help
323 Rockchip SoCs have similar boot process, SPL is mainly in charge of
324 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
325 no TPL for the board.
326
Kever Yang18f85082019-07-09 22:05:55 +0800327config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbd4e41872019-12-20 18:05:22 -0800328 bool "Rockchip TPL common board file"
Kever Yang18f85082019-07-09 22:05:55 +0800329 depends on TPL
330 help
331 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
332 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
333 common board is a basic TPL board init which can be shared for most
Thomas Hebb32f2ca22019-11-13 18:18:03 -0800334 of SoCs to avoid copy-paste for different SoCs.
Kever Yang18f85082019-07-09 22:05:55 +0800335
Andy Yane3067792017-10-11 15:00:16 +0800336config ROCKCHIP_BOOT_MODE_REG
337 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800338 help
Kever Yang15f09a12019-03-28 11:01:23 +0800339 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800340 according to the value from this register.
341
Kever Yangfa1392a2017-04-20 17:03:46 +0800342config ROCKCHIP_SPL_RESERVE_IRAM
343 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800344 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800345 help
346 SPL may need reserve memory for firmware loaded by SPL, whose load
347 address is in IRAM and may overlay with SPL text area if not
348 reserved.
349
Heiko Stübner1d845942017-02-18 19:46:25 +0100350config ROCKCHIP_BROM_HELPER
351 bool
352
Philipp Tomsichb377d222017-10-10 16:21:10 +0200353config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
354 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
355 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
356 help
357 Some Rockchip BROM variants (e.g. on the RK3188) load the
358 first stage in segments and enter multiple times. E.g. on
359 the RK3188, the first 1KB of the first stage are loaded
360 first and entered; after returning to the BROM, the
361 remainder of the first stage is loaded, but the BROM
362 re-enters at the same address/to the same code as previously.
363
364 This enables support code in the BOOT0 hook for the SPL stage
365 to allow multiple entries.
366
367config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
368 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
369 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
370 help
371 Some Rockchip BROM variants (e.g. on the RK3188) load the
372 first stage in segments and enter multiple times. E.g. on
373 the RK3188, the first 1KB of the first stage are loaded
374 first and entered; after returning to the BROM, the
375 remainder of the first stage is loaded, but the BROM
376 re-enters at the same address/to the same code as previously.
377
378 This enables support code in the BOOT0 hook for the TPL stage
379 to allow multiple entries.
380
Simon Glass103c5f12021-08-08 12:20:09 -0600381config SPL_MMC
Philipp Tomsichee14d292017-06-29 11:21:15 +0200382 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400383
Simon Glass9b312e22020-07-19 13:55:57 -0600384config ROCKCHIP_SPI_IMAGE
385 bool "Build a SPI image for rockchip"
386 depends on HAS_ROM
387 help
388 Some Rockchip SoCs support booting from SPI flash. Enable this
389 option to produce a 4MB SPI-flash image (called u-boot.rom)
390 containing U-Boot. The image is built by binman. U-Boot sits near
391 the start of the image.
392
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +0200393source "arch/arm/mach-rockchip/px30/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +0800394source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800395source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100396source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800397source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200398source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanf1a22522019-11-14 11:21:12 +0800399source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800400source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800401source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800402source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen695693b2021-06-02 16:13:46 +0800403source "arch/arm/mach-rockchip/rk3568/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800404source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600405endif