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Masahiro Yamada0b11dbf2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass59e11eb2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +090028
Masahiro Yamadab6036bc2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczak705fcf42015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glasscaa4daa2020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewskie3114822019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glass4bba9d32015-02-13 12:20:48 -070038
Igor Opaniukd1f3abe2021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Simon Glass747093d2022-04-30 00:56:53 -060050config VPL_DM_I2C
51 bool "Enable Driver Model for I2C drivers in VPL"
52 depends on VPL_DM && DM_I2C
53 default y
54 help
55 Enable driver model for I2C. The I2C uclass interface: probe, read,
56 write and speed, is implemented with the bus drivers operations,
57 which provide methods for bus setting and data transfer. Each chip
58 device (bus child) info is kept as parent platdata. The interface
59 is defined in include/i2c.h.
60
Tom Rini55dabcc2021-08-18 23:12:24 -040061config SYS_I2C_LEGACY
62 bool "Enable legacy I2C subsystem and drivers"
63 depends on !DM_I2C
64 help
65 Enable the legacy I2C subsystem and drivers. While this is
66 deprecated in U-Boot itself, this can be useful in some situations
67 in SPL or TPL.
68
69config SPL_SYS_I2C_LEGACY
70 bool "Enable legacy I2C subsystem and drivers in SPL"
71 depends on SUPPORT_SPL && !SPL_DM_I2C
72 help
73 Enable the legacy I2C subsystem and drivers in SPL. This is useful
74 in some size constrained situations.
75
76config TPL_SYS_I2C_LEGACY
77 bool "Enable legacy I2C subsystem and drivers in TPL"
78 depends on SUPPORT_TPL && !SPL_DM_I2C
79 help
80 Enable the legacy I2C subsystem and drivers in TPL. This is useful
81 in some size constrained situations.
82
Tom Rini52c7e372021-08-18 23:12:25 -040083config SYS_I2C_EARLY_INIT
84 bool "Enable legacy I2C subsystem early in boot"
85 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
86 help
87 Add the function prototype for i2c_early_init_f which is called in
88 board_early_init_f.
89
Simon Glasscc456bd2015-08-03 08:19:23 -060090config I2C_CROS_EC_TUNNEL
91 tristate "Chrome OS EC tunnel I2C bus"
92 depends on CROS_EC
93 help
94 This provides an I2C bus that will tunnel i2c commands through to
95 the other side of the Chrome OS EC to the I2C bus connected there.
96 This will work whatever the interface used to talk to the EC (SPI,
97 I2C or LPC). Some Chromebooks use this when the hardware design
98 does not allow direct access to the main PMIC from the AP.
99
Simon Glassf48eaf02015-08-03 08:19:24 -0600100config I2C_CROS_EC_LDO
101 bool "Provide access to LDOs on the Chrome OS EC"
102 depends on CROS_EC
103 ---help---
104 On many Chromebooks the main PMIC is inaccessible to the AP. This is
105 often dealt with by using an I2C pass-through interface provided by
106 the EC. On some unfortunate models (e.g. Spring) the pass-through
107 is not available, and an LDO message is available instead. This
108 option enables a driver which provides very basic access to those
109 regulators, via the EC. We implement this as an I2C bus which
110 emulates just the TPS65090 messages we know about. This is done to
111 avoid duplicating the logic in the TPS65090 regulator driver for
112 enabling/disabling an LDO.
Simon Glasscc456bd2015-08-03 08:19:23 -0600113
Lukasz Majewskie46f8a32017-03-21 12:08:25 +0100114config I2C_SET_DEFAULT_BUS_NUM
115 bool "Set default I2C bus number"
116 depends on DM_I2C
117 help
118 Set default number of I2C bus to be accessed. This option provides
119 behaviour similar to old (i.e. pre DM) I2C bus driver.
120
121config I2C_DEFAULT_BUS_NUMBER
122 hex "I2C default bus number"
123 depends on I2C_SET_DEFAULT_BUS_NUM
124 default 0x0
125 help
126 Number of default I2C bus to use
127
Przemyslaw Marczakc54473c2015-03-31 18:57:18 +0200128config DM_I2C_GPIO
129 bool "Enable Driver Model for software emulated I2C bus driver"
130 depends on DM_I2C && DM_GPIO
131 help
132 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
133 configuration is given by the device tree. Kernel-style device tree
134 bindings are supported.
135 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
136
Igor Opaniukd1f3abe2021-02-09 13:52:43 +0200137config SPL_DM_I2C_GPIO
138 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass83061db2021-07-10 21:14:30 -0600139 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniukd1f3abe2021-02-09 13:52:43 +0200140 default y
141 help
142 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
143 configuration is given by the device tree. Kernel-style device tree
144 bindings are supported.
145 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
146
Songjun Wu8800e0f2016-06-20 13:22:38 +0800147config SYS_I2C_AT91
148 bool "Atmel I2C driver"
149 depends on DM_I2C && ARCH_AT91
150 help
151 Add support for the Atmel I2C driver. A serious problem is that there
152 is no documented way to issue repeated START conditions for more than
153 two messages, as needed to support combined I2C messages. Use the
154 i2c-gpio driver unless your system can cope with this limitation.
155 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
156
Rayagonda Kokatanur956d57a2020-04-08 11:12:27 +0530157config SYS_I2C_IPROC
158 bool "Broadcom I2C driver"
159 depends on DM_I2C
160 help
161 Broadcom I2C driver.
162 Add support for Broadcom I2C driver.
163 Say yes here to to enable the Broadco I2C driver.
164
mario.six@gdsys.ccdbc82ce2016-04-25 08:31:09 +0200165config SYS_I2C_FSL
166 bool "Freescale I2C bus driver"
mario.six@gdsys.ccdbc82ce2016-04-25 08:31:09 +0200167 help
168 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
169 MPC85xx processors.
170
Tom Rini6d5d0c92021-08-18 23:12:35 -0400171if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
172config SYS_FSL_I2C_OFFSET
173 hex "Offset from the IMMR of the address of the first I2C controller"
174
175config SYS_FSL_HAS_I2C2_OFFSET
176 bool "Support a second I2C controller"
177
178config SYS_FSL_I2C2_OFFSET
179 hex "Offset from the IMMR of the address of the second I2C controller"
180 depends on SYS_FSL_HAS_I2C2_OFFSET
181
182config SYS_FSL_HAS_I2C3_OFFSET
183 bool "Support a third I2C controller"
184
185config SYS_FSL_I2C3_OFFSET
186 hex "Offset from the IMMR of the address of the third I2C controller"
187 depends on SYS_FSL_HAS_I2C3_OFFSET
188
189config SYS_FSL_HAS_I2C4_OFFSET
190 bool "Support a fourth I2C controller"
191
192config SYS_FSL_I2C4_OFFSET
193 hex "Offset from the IMMR of the address of the fourth I2C controller"
194 depends on SYS_FSL_HAS_I2C4_OFFSET
195endif
196
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800197config SYS_I2C_CADENCE
198 tristate "Cadence I2C Controller"
Michal Simek664e16c2020-08-06 15:18:36 +0200199 depends on DM_I2C
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800200 help
201 Say yes here to select Cadence I2C Host Controller. This controller is
202 e.g. used by Xilinx Zynq.
203
Arthur Li7f5ea252020-06-01 12:56:31 -0700204config SYS_I2C_CA
205 tristate "Cortina-Access I2C Controller"
206 depends on DM_I2C && CORTINA_PLATFORM
Arthur Li7f5ea252020-06-01 12:56:31 -0700207 help
208 Add support for the Cortina Access I2C host controller.
209 Say yes here to select Cortina-Access I2C Host Controller.
210
Adam Ford9f8cf762018-08-10 05:05:22 -0500211config SYS_I2C_DAVINCI
212 bool "Davinci I2C Controller"
213 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
214 help
215 Say yes here to add support for Davinci and Keystone I2C controller
216
Stefan Roesee32d0db2016-04-28 09:47:17 +0200217config SYS_I2C_DW
218 bool "Designware I2C Controller"
Stefan Roesee32d0db2016-04-28 09:47:17 +0200219 help
220 Say yes here to select the Designware I2C Host Controller. This
221 controller is used in various SoCs, e.g. the ST SPEAr, Altera
222 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
223
Ryan Chen4088f5f2023-01-30 14:19:24 +0800224config SYS_I2C_AST2600
225 bool "AST2600 I2C Controller"
226 depends on DM_I2C && ARCH_ASPEED
227 help
228 Say yes here to select AST2600 I2C Host Controller. The driver
229 support AST2600 I2C new mode register. This I2C controller supports:
230 _Standard-mode (up to 100 kHz)
231 _Fast-mode (up to 400 kHz)
232 _Fast-mode Plus (up to 1 MHz)
233
maxims@google.com4dc038f2017-04-17 12:00:30 -0700234config SYS_I2C_ASPEED
235 bool "Aspeed I2C Controller"
236 depends on DM_I2C && ARCH_ASPEED
237 help
238 Say yes here to select Aspeed I2C Host Controller. The driver
239 supports AST2500 and AST2400 controllers, but is very limited.
240 Only single master mode is supported and only byte-by-byte
241 synchronous reads and writes are supported, no Pool Buffers or DMA.
242
Simon Glassabb0b012016-01-17 16:11:44 -0700243config SYS_I2C_INTEL
244 bool "Intel I2C/SMBUS driver"
245 depends on DM_I2C
246 help
247 Add support for the Intel SMBUS driver. So far this driver is just
248 a stub which perhaps some basic init. There is no implementation of
249 the I2C API meaning that any I2C operations will immediately fail
250 for now.
251
Peng Fan7ee3f142017-02-24 09:54:18 +0800252config SYS_I2C_IMX_LPI2C
253 bool "NXP i.MX LPI2C driver"
Peng Fan7ee3f142017-02-24 09:54:18 +0800254 help
255 Add support for the NXP i.MX LPI2C driver.
256
Trevor Woerner07055562021-06-10 22:37:08 -0400257config SYS_I2C_LPC32XX
258 bool "LPC32XX I2C driver"
259 depends on ARCH_LPC32XX
260 help
261 Enable support for the LPC32xx I2C driver.
262
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100263config SYS_I2C_MESON
264 bool "Amlogic Meson I2C driver"
265 depends on DM_I2C && ARCH_MESON
266 help
Beniamino Galvani4ecbb8b2017-11-26 17:40:54 +0100267 Add support for the I2C controller available in Amlogic Meson
268 SoCs. The controller supports programmable bus speed including
269 standard (100kbits/s) and fast (400kbit/s) speed and allows the
270 software to define a flexible format of the bit streams. It has an
271 internal buffer holding up to 8 bytes for transfers and supports
272 both 7-bit and 10-bit addresses.
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100273
Weijie Gao9ad71f62022-09-09 19:59:48 +0800274config SYS_I2C_MTK
275 bool "MediaTek I2C driver"
276 help
277 This selects the MediaTek Integrated Inter Circuit bus driver.
278 The I2C bus adapter is the base for some other I2C client,
279 eg: touch, sensors.
280 If you want to use MediaTek I2C interface, say Y here.
281 If unsure, say N.
282
Padmarao Begari0dc0d1e2021-11-17 18:21:16 +0530283config SYS_I2C_MICROCHIP
284 bool "Microchip I2C driver"
285 help
286 Add support for the Microchip I2C driver. This is operating on
287 standard mode up to 100 kbits/s and fast mode up to 400 kbits/s.
288
Jagan Teki72c8c102016-12-06 00:00:57 +0100289config SYS_I2C_MXC
Sriram Dash942ecc82018-02-06 11:26:30 +0530290 bool "NXP MXC I2C driver"
Jagan Teki72c8c102016-12-06 00:00:57 +0100291 help
Chris Packham74751452019-01-13 22:13:25 +1300292 Add support for the NXP I2C driver. This supports up to four bus
293 channels and operating on standard mode up to 100 kbits/s and fast
294 mode up to 400 kbits/s.
Jagan Teki72c8c102016-12-06 00:00:57 +0100295
Tom Rini15e7b762021-08-18 23:12:33 -0400296if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
Sriram Dash942ecc82018-02-06 11:26:30 +0530297config SYS_I2C_MXC_I2C1
298 bool "NXP MXC I2C1"
299 help
300 Add support for NXP MXC I2C Controller 1.
301 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
302
303config SYS_I2C_MXC_I2C2
304 bool "NXP MXC I2C2"
305 help
306 Add support for NXP MXC I2C Controller 2.
307 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
308
309config SYS_I2C_MXC_I2C3
310 bool "NXP MXC I2C3"
311 help
312 Add support for NXP MXC I2C Controller 3.
313 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
314
315config SYS_I2C_MXC_I2C4
316 bool "NXP MXC I2C4"
317 help
318 Add support for NXP MXC I2C Controller 4.
319 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dashfa452192018-02-06 11:26:31 +0530320
321config SYS_I2C_MXC_I2C5
322 bool "NXP MXC I2C5"
323 help
324 Add support for NXP MXC I2C Controller 5.
325 Required for SoCs which have I2C MXC controller 5 eg LX2160A
326
327config SYS_I2C_MXC_I2C6
328 bool "NXP MXC I2C6"
329 help
330 Add support for NXP MXC I2C Controller 6.
331 Required for SoCs which have I2C MXC controller 6 eg LX2160A
332
333config SYS_I2C_MXC_I2C7
334 bool "NXP MXC I2C7"
335 help
336 Add support for NXP MXC I2C Controller 7.
337 Required for SoCs which have I2C MXC controller 7 eg LX2160A
338
339config SYS_I2C_MXC_I2C8
340 bool "NXP MXC I2C8"
341 help
342 Add support for NXP MXC I2C Controller 8.
343 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash942ecc82018-02-06 11:26:30 +0530344endif
345
346if SYS_I2C_MXC_I2C1
347config SYS_MXC_I2C1_SPEED
348 int "I2C Channel 1 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500349 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530350 default 100000
351 help
352 MXC I2C Channel 1 speed
353
354config SYS_MXC_I2C1_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400355 hex "I2C1 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530356 default 0
357 help
358 MXC I2C1 Slave
359endif
360
361if SYS_I2C_MXC_I2C2
362config SYS_MXC_I2C2_SPEED
363 int "I2C Channel 2 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500364 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530365 default 100000
366 help
367 MXC I2C Channel 2 speed
368
369config SYS_MXC_I2C2_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400370 hex "I2C2 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530371 default 0
372 help
373 MXC I2C2 Slave
374endif
375
376if SYS_I2C_MXC_I2C3
377config SYS_MXC_I2C3_SPEED
378 int "I2C Channel 3 speed"
379 default 100000
380 help
381 MXC I2C Channel 3 speed
382
383config SYS_MXC_I2C3_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400384 hex "I2C3 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530385 default 0
386 help
387 MXC I2C3 Slave
388endif
389
390if SYS_I2C_MXC_I2C4
391config SYS_MXC_I2C4_SPEED
392 int "I2C Channel 4 speed"
393 default 100000
394 help
395 MXC I2C Channel 4 speed
396
397config SYS_MXC_I2C4_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400398 hex "I2C4 Slave"
Sriram Dash942ecc82018-02-06 11:26:30 +0530399 default 0
400 help
401 MXC I2C4 Slave
402endif
403
Sriram Dashfa452192018-02-06 11:26:31 +0530404if SYS_I2C_MXC_I2C5
405config SYS_MXC_I2C5_SPEED
406 int "I2C Channel 5 speed"
407 default 100000
408 help
409 MXC I2C Channel 5 speed
410
411config SYS_MXC_I2C5_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400412 hex "I2C5 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530413 default 0
414 help
415 MXC I2C5 Slave
416endif
417
418if SYS_I2C_MXC_I2C6
419config SYS_MXC_I2C6_SPEED
420 int "I2C Channel 6 speed"
421 default 100000
422 help
423 MXC I2C Channel 6 speed
424
425config SYS_MXC_I2C6_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400426 hex "I2C6 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530427 default 0
428 help
429 MXC I2C6 Slave
430endif
431
432if SYS_I2C_MXC_I2C7
433config SYS_MXC_I2C7_SPEED
434 int "I2C Channel 7 speed"
435 default 100000
436 help
437 MXC I2C Channel 7 speed
438
439config SYS_MXC_I2C7_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400440 hex "I2C7 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530441 default 0
442 help
443 MXC I2C7 Slave
444endif
445
446if SYS_I2C_MXC_I2C8
447config SYS_MXC_I2C8_SPEED
448 int "I2C Channel 8 speed"
449 default 100000
450 help
451 MXC I2C Channel 8 speed
452
453config SYS_MXC_I2C8_SLAVE
Tom Rini15e7b762021-08-18 23:12:33 -0400454 hex "I2C8 Slave"
Sriram Dashfa452192018-02-06 11:26:31 +0530455 default 0
456 help
457 MXC I2C8 Slave
458endif
459
Stefan Boschc25e9e02020-07-10 19:07:28 +0200460config SYS_I2C_NEXELL
461 bool "Nexell I2C driver"
462 depends on DM_I2C
463 help
464 Add support for the Nexell I2C driver. This is used with various
465 Nexell parts such as S5Pxx18 series SoCs. All chips
466 have several I2C ports and all are provided, controlled by the
467 device tree.
468
Jim Liu2b77eea2022-06-23 13:31:42 +0800469config SYS_I2C_NPCM
470 bool "Nuvoton NPCM I2C driver"
471 help
472 Support for Nuvoton I2C controller driver.
473
Pragnesh Patelb2d4cbe2020-11-14 14:42:34 +0530474config SYS_I2C_OCORES
475 bool "ocores I2C driver"
476 depends on DM_I2C
477 help
478 Add support for ocores I2C controller. For details see
479 https://opencores.org/projects/i2c
480
Adam Forddaa0f052017-08-07 13:11:34 -0500481config SYS_I2C_OMAP24XX
482 bool "TI OMAP2+ I2C driver"
Vignesh R14106bc2019-06-04 18:08:11 -0500483 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Forddaa0f052017-08-07 13:11:34 -0500484 help
485 Add support for the OMAP2+ I2C driver.
486
Marek Vasuta06a0ac2018-04-21 18:57:28 +0200487config SYS_I2C_RCAR_I2C
488 bool "Renesas RCar I2C driver"
489 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
490 help
491 Support for Renesas RCar I2C controller.
492
Marek Vasut9e75ea42017-11-28 08:02:27 +0100493config SYS_I2C_RCAR_IIC
494 bool "Renesas RCar Gen3 IIC driver"
Marek Vasutf51155e2018-02-17 02:17:40 +0100495 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut9e75ea42017-11-28 08:02:27 +0100496 help
497 Support for Renesas RCar Gen3 IIC controller.
498
Simon Glass34374692015-08-30 16:55:39 -0600499config SYS_I2C_ROCKCHIP
500 bool "Rockchip I2C driver"
501 depends on DM_I2C
502 help
503 Add support for the Rockchip I2C driver. This is used with various
504 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham74751452019-01-13 22:13:25 +1300505 have several I2C ports and all are provided, controlled by the
Simon Glass34374692015-08-30 16:55:39 -0600506 device tree.
507
Simon Glass1174aad2015-03-06 13:19:04 -0700508config SYS_I2C_SANDBOX
509 bool "Sandbox I2C driver"
510 depends on SANDBOX && DM_I2C
511 help
512 Enable I2C support for sandbox. This is an emulation of a real I2C
513 bus. Devices can be attached to the bus using the device tree
Masahiro Yamadac77c7db2017-02-11 12:39:55 +0900514 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass1174aad2015-03-06 13:19:04 -0700515
Tom Rini6aa07542021-08-18 23:12:34 -0400516config SYS_I2C_SH
517 bool "Legacy SuperH I2C interface"
518 depends on ARCH_RMOBILE && SYS_I2C_LEGACY
519 help
520 Enable the legacy SuperH I2C interface.
521
522if SYS_I2C_SH
523config SYS_I2C_SH_NUM_CONTROLLERS
524 int
525 default 5
526
527config SYS_I2C_SH_BASE0
528 hex
529 default 0xE6820000
530
531config SYS_I2C_SH_BASE1
532 hex
533 default 0xE6822000
534
535config SYS_I2C_SH_BASE2
536 hex
537 default 0xE6824000
538
539config SYS_I2C_SH_BASE3
540 hex
541 default 0xE6826000
542
543config SYS_I2C_SH_BASE4
544 hex
545 default 0xE6828000
546
547config SH_I2C_8BIT
548 bool
549 default y
550
551config SH_I2C_DATA_HIGH
552 int
553 default 4
554
555config SH_I2C_DATA_LOW
556 int
557 default 5
558
559config SH_I2C_CLOCK
560 int
561 default 104000000
562endif
563
Tom Rinide695722021-08-17 17:59:46 -0400564config SYS_I2C_SOFT
565 bool "Legacy software I2C interface"
566 help
567 Enable the legacy software defined I2C interface
568
569config SYS_I2C_SOFT_SPEED
570 int "Software I2C bus speed"
571 depends on SYS_I2C_SOFT
572 default 100000
573 help
574 Speed of the software I2C bus
575
576config SYS_I2C_SOFT_SLAVE
577 hex "Software I2C slave address"
578 depends on SYS_I2C_SOFT
579 default 0xfe
580 help
581 Slave address of the software I2C bus
582
Suneel Garapati5c2c3e82020-05-26 14:13:07 +0200583config SYS_I2C_OCTEON
584 bool "Octeon II/III/TX/TX2 I2C driver"
585 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
586 default y
587 help
588 Add support for the Marvell Octeon I2C driver. This is used with
589 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
590 chips have several I2C ports and all are provided, controlled by
591 the device tree.
592
Sumit Garg9bdec962023-02-01 19:29:00 +0530593config SYS_I2C_QUP
594 bool "Qualcomm QUP I2C controller"
595 depends on ARCH_SNAPDRAGON
596 help
597 Support for Qualcomm QUP I2C controller based on Qualcomm Universal
598 Peripherals (QUP) engine. The QUP engine is an advanced high
599 performance slave port that provides a common data path (an output
600 FIFO and an input FIFO) for I2C and SPI interfaces. The I2C/SPI QUP
601 controller is publicly documented in the Snapdragon 410E (APQ8016E)
602 Technical Reference Manual, chapter "6.1 Qualcomm Universal
603 Peripherals Engine (QUP)".
604
Jaehoon Chung1d61ad92017-01-09 14:47:52 +0900605config SYS_I2C_S3C24X0
606 bool "Samsung I2C driver"
Tom Rini0283da42021-08-17 17:59:42 -0400607 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
Jaehoon Chung1d61ad92017-01-09 14:47:52 +0900608 help
609 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass1174aad2015-03-06 13:19:04 -0700610
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200611config SYS_I2C_STM32F7
612 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay2514c2d2018-03-12 10:46:10 +0100613 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200614 help
615 Enable this option to add support for STM32 I2C controller
616 introduced with STM32F7/H7 SoCs. This I2C controller supports :
617 _ Slave and master modes
618 _ Multimaster capability
619 _ Standard-mode (up to 100 kHz)
620 _ Fast-mode (up to 400 kHz)
621 _ Fast-mode Plus (up to 1 MHz)
622 _ 7-bit and 10-bit addressing mode
623 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
624 _ All 7-bit addresses acknowledge mode
625 _ General call
626 _ Programmable setup and hold times
627 _ Easy to use event management
628 _ Optional clock stretching
629 _ Software reset
630
Samuel Holland104950a2021-10-08 00:17:20 -0500631config SYS_I2C_SUN6I_P2WI
632 bool "Allwinner sun6i P2WI controller"
633 depends on ARCH_SUNXI
634 help
635 Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded
636 in the Allwinner A31 and A31s SOCs. This interface is used to connect
637 to specific devices like the X-Powers AXP221 PMIC.
638
Samuel Holland3227c852021-10-08 00:17:21 -0500639config SYS_I2C_SUN8I_RSB
640 bool "Allwinner sun8i Reduced Serial Bus controller"
641 depends on ARCH_SUNXI
642 help
643 Support for Allwinner's Reduced Serial Bus (RSB) controller. This
644 controller is responsible for communicating with various RSB based
645 devices, such as X-Powers AXPxxx PMICs and AC100/AC200 CODEC ICs.
646
Jassi Brar4483fba2021-06-04 18:44:48 +0900647config SYS_I2C_SYNQUACER
648 bool "Socionext SynQuacer I2C controller"
649 depends on ARCH_SYNQUACER && DM_I2C
650 help
651 Support for Socionext Synquacer I2C controller. This I2C controller
652 will be used for RTC and LS-connector on DeveloperBox.
653
Peter Robinson02253d42019-02-20 12:17:26 +0000654config SYS_I2C_TEGRA
655 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner18138ab2020-05-06 08:02:41 -0400656 depends on ARCH_TEGRA
Peter Robinson02253d42019-02-20 12:17:26 +0000657 help
658 Support for NVIDIA I2C controller available in Tegra SoCs.
659
Masahiro Yamada26f820f2015-01-13 12:44:36 +0900660config SYS_I2C_UNIPHIER
661 bool "UniPhier I2C driver"
662 depends on ARCH_UNIPHIER && DM_I2C
663 default y
664 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900665 Support for UniPhier I2C controller driver. This I2C controller
666 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900667
668config SYS_I2C_UNIPHIER_F
669 bool "UniPhier FIFO-builtin I2C driver"
670 depends on ARCH_UNIPHIER && DM_I2C
671 default y
672 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900673 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900674 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass3d1957f2015-08-03 08:19:21 -0600675
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200676config SYS_I2C_VERSATILE
677 bool "Arm Ltd Versatile I2C bus driver"
Tom Rinic6c26a02021-02-20 20:05:47 -0500678 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200679 help
680 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
681 controller is present in the development boards manufactured by Arm Ltd.
682
Marek BehĂșn999ac222021-10-09 19:33:37 +0200683config SYS_I2C_MV
684 bool "Marvell PXA (Armada 3720) I2C driver"
685 help
686 Support for PXA based I2C controller used on Armada 3720 SoC.
687 In Linux, this driver is called i2c-pxa.
688
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200689config SYS_I2C_MVTWSI
690 bool "Marvell I2C driver"
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200691 help
692 Support for Marvell I2C controllers as used on the orion5x and
693 kirkwood SoC families.
694
Stephen Warren34f1c9f2016-08-08 11:28:27 -0600695config TEGRA186_BPMP_I2C
696 bool "Enable Tegra186 BPMP-based I2C driver"
697 depends on TEGRA186_BPMP
698 help
699 Support for Tegra I2C controllers managed by the BPMP (Boot and
700 Power Management Processor). On Tegra186, some I2C controllers are
701 directly controlled by the main CPU, whereas others are controlled
702 by the BPMP, and can only be accessed by the main CPU via IPC
703 requests to the BPMP. This driver covers the latter case.
704
Tom Rinia5752f82021-08-18 23:12:32 -0400705config SYS_I2C_SLAVE
706 hex "I2C Slave address channel (all buses)"
707 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
708 default 0xfe
709 help
710 I2C Slave address channel 0 for all buses in the legacy drivers.
711 Many boards/controllers/drivers don't support an I2C slave
712 interface so provide a default slave address for them for use in
713 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
714 defined for any board which does support a slave interface and
715 this default used otherwise.
716
717config SYS_I2C_SPEED
718 int "I2C Slave channel 0 speed (all buses)"
719 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
720 default 100000
721 help
722 I2C Slave speed channel 0 for all buses in the legacy drivers.
723
Adam Fordfc760cc2017-08-11 06:39:34 -0500724config SYS_I2C_BUS_MAX
725 int "Max I2C busses"
Tom Rinicb42c1f2022-06-27 13:35:50 -0400726 depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
Adam Fordfc760cc2017-08-11 06:39:34 -0500727 default 2 if TI816X
Tom Rinicb42c1f2022-06-27 13:35:50 -0400728 default 3 if OMAP34XX || AM33XX || AM43XX
Tom Rinif5528162022-12-02 16:42:41 -0500729 default 4 if ARCH_SOCFPGA || OMAP44XX
Adam Fordfc760cc2017-08-11 06:39:34 -0500730 default 5 if OMAP54XX
731 help
732 Define the maximum number of available I2C buses.
733
Marek Vasutad827a52018-12-19 12:26:27 +0100734config SYS_I2C_XILINX_XIIC
735 bool "Xilinx AXI I2C driver"
736 depends on DM_I2C
737 help
738 Support for Xilinx AXI I2C controller.
739
Mario Six92164212018-01-15 11:08:11 +0100740config SYS_I2C_IHS
741 bool "gdsys IHS I2C driver"
742 depends on DM_I2C
743 help
744 Support for gdsys IHS I2C driver on FPGA bus.
745
Simon Glass3d1957f2015-08-03 08:19:21 -0600746source "drivers/i2c/muxes/Kconfig"
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900747
Simon Glass59e11eb2021-07-10 21:14:35 -0600748endif