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Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner041cdb52016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080010 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020011 help
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16
Kever Yangdaeed1d2017-11-28 16:04:16 +080017config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053019 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080020 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080021 help
22 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
23 including NEON and GPU, Mali-400 graphics, several DDR3 options
24 and video codec support. Peripherals include Gigabit Ethernet,
25 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
26
Heiko Stübner0a2be692017-02-18 19:46:36 +010027config ROCKCHIP_RK3188
28 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053029 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080030 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010031 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010032 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020033 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020034 select SPL_REGMAP
35 select SPL_SYSCON
36 select SPL_RAM
37 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020038 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080039 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020040 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080041 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080042 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010043 help
44 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
45 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
46 video interfaces, several memory options and video codec support.
47 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
48 UART, SPI, I2C and PWMs.
49
Kever Yang168eef72017-06-23 17:17:52 +080050config ROCKCHIP_RK322X
51 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053052 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080053 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080054 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080055 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080056 select SPL_DM
57 select SPL_OF_LIBFDT
58 select TPL
59 select TPL_DM
60 select TPL_OF_LIBFDT
61 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
62 select TPL_NEEDS_SEPARATE_STACK if TPL
63 select SPL_DRIVERS_MISC_SUPPORT
Kever Yangcca3b092019-07-22 20:02:07 +080064 imply ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080065 imply SPL_SERIAL_SUPPORT
Kever Yang0cd65e42019-07-22 19:59:20 +080066 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080067 imply TPL_SERIAL_SUPPORT
Kever Yang6ae28a32019-07-09 22:05:56 +080068 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080069 select TPL_LIBCOMMON_SUPPORT
70 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080071 help
72 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
73 including NEON and GPU, Mali-400 graphics, several DDR3 options
74 and video codec support. Peripherals include Gigabit Ethernet,
75 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
76
Simon Glass2444dae2015-08-30 16:55:38 -060077config ROCKCHIP_RK3288
78 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053079 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080080 select SUPPORT_SPL
81 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +080082 select SUPPORT_TPL
Kever Yangde57a9f2019-07-22 20:02:15 +080083 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +080084 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +080085 imply TPL_CLK
86 imply TPL_DM
87 imply TPL_DRIVERS_MISC_SUPPORT
88 imply TPL_LIBCOMMON_SUPPORT
89 imply TPL_LIBGENERIC_SUPPORT
90 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +080091 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +080092 imply TPL_OF_CONTROL
93 imply TPL_OF_PLATDATA
94 imply TPL_RAM
95 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +080096 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +080097 imply TPL_SERIAL_SUPPORT
98 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +080099 imply USB_FUNCTION_ROCKUSB
100 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600101 help
102 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
103 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
104 video interfaces supporting HDMI and eDP, several DDR3 options
105 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100106 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600107
Kever Yang85a3cfb2017-02-23 15:37:51 +0800108config ROCKCHIP_RK3328
109 bool "Support Rockchip RK3328"
110 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300111 select SUPPORT_SPL
112 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300113 select SUPPORT_TPL
114 select TPL
115 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
116 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800117 imply ROCKCHIP_COMMON_BOARD
Kever Yang9cc67042019-07-22 19:59:32 +0800118 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangc009aeb2019-06-09 00:27:15 +0300119 imply SPL_SERIAL_SUPPORT
Kever Yang3f47db02019-08-02 10:40:01 +0300120 imply TPL_SERIAL_SUPPORT
Kever Yangc009aeb2019-06-09 00:27:15 +0300121 imply SPL_SEPARATE_BSS
122 select ENABLE_ARM_SOC_BOOT0_HOOK
123 select DEBUG_UART_BOARD_INIT
124 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800125 help
126 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
127 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
128 video interfaces supporting HDMI and eDP, several DDR3 options
129 and video codec support. Peripherals include Gigabit Ethernet,
130 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
131
Andreas Färber37a0c602017-05-15 17:51:18 +0800132config ROCKCHIP_RK3368
133 bool "Support Rockchip RK3368"
134 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200135 select SUPPORT_SPL
136 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200137 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
138 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800139 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800140 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200141 imply SPL_SEPARATE_BSS
142 imply SPL_SERIAL_SUPPORT
143 imply TPL_SERIAL_SUPPORT
Kever Yang82560cb2019-07-09 22:05:58 +0800144 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800145 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200146 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
147 into a big and little cluster with 4 cores each) Cortex-A53 including
148 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
149 (for the little cluster), PowerVR G6110 based graphics, one video
150 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
151 video codec support.
152
153 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
154 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800155
Kever Yanga381bcf2016-07-19 21:16:59 +0800156config ROCKCHIP_RK3399
157 bool "Support Rockchip RK3399"
158 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800159 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800160 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800161 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530162 select SPL_ATF
163 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530164 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530165 select SPL_LOAD_FIT
166 select SPL_CLK if SPL
167 select SPL_PINCTRL if SPL
168 select SPL_RAM if SPL
169 select SPL_REGMAP if SPL
170 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800171 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
172 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800173 select SPL_SEPARATE_BSS
Philipp Tomsichc0508e42017-07-26 12:29:01 +0200174 select SPL_SERIAL_SUPPORT
175 select SPL_DRIVERS_MISC_SUPPORT
Jagan Teki2666bd42019-05-08 11:11:43 +0530176 select CLK
177 select FIT
178 select PINCTRL
179 select RAM
180 select REGMAP
181 select SYSCON
182 select DM_PMIC
183 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800184 select BOARD_LATE_INIT
Kever Yang920b0132019-07-22 20:02:19 +0800185 imply ROCKCHIP_COMMON_BOARD
Kever Yangb7abef22019-07-22 19:59:42 +0800186 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang6bbf5e12018-11-09 11:18:15 +0800187 imply TPL_SERIAL_SUPPORT
188 imply TPL_LIBCOMMON_SUPPORT
189 imply TPL_LIBGENERIC_SUPPORT
190 imply TPL_SYS_MALLOC_SIMPLE
Kever Yang6bbf5e12018-11-09 11:18:15 +0800191 imply TPL_DRIVERS_MISC_SUPPORT
192 imply TPL_OF_CONTROL
193 imply TPL_DM
194 imply TPL_REGMAP
195 imply TPL_SYSCON
196 imply TPL_RAM
197 imply TPL_CLK
198 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800199 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yanga381bcf2016-07-19 21:16:59 +0800200 help
201 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
202 and quad-core Cortex-A53.
203 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
204 video interfaces supporting HDMI and eDP, several DDR3 options
205 and video codec support. Peripherals include Gigabit Ethernet,
206 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
207
Andy Yan2c1e11d2017-06-01 18:00:55 +0800208config ROCKCHIP_RV1108
209 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530210 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800211 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800212 help
213 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
214 and a DSP.
215
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200216config ROCKCHIP_USB_UART
217 bool "Route uart output to usb pins"
218 help
219 Rockchip SoCs have the ability to route the signals of the debug
220 uart through the d+ and d- pins of a specific usb phy to enable
221 some form of closed-case debugging. With this option supported
222 SoCs will enable this routing as a debug measure.
223
Philipp Tomsichee14d292017-06-29 11:21:15 +0200224config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800225 bool "SPL returns to bootrom"
226 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100227 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800228 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200229 depends on SPL
230 help
231 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
232 SPL will return to the boot rom, which will then load the U-Boot
233 binary to keep going on.
234
235config TPL_ROCKCHIP_BACK_TO_BROM
236 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800237 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200238 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800239 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200240 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800241 help
242 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
243 SPL will return to the boot rom, which will then load the U-Boot
244 binary to keep going on.
245
Kever Yang54f17fa2019-07-22 20:02:01 +0800246config ROCKCHIP_COMMON_BOARD
247 bool "Rockchip common board file"
248 help
249 Rockchip SoCs have similar boot process, Common board file is mainly
250 in charge of common process of board_init() and board_late_init() for
251 U-Boot proper.
252
Kever Yang49105fb2019-07-22 19:59:12 +0800253config SPL_ROCKCHIP_COMMON_BOARD
254 bool "Rockchip SPL common board file"
255 depends on SPL
256 help
257 Rockchip SoCs have similar boot process, SPL is mainly in charge of
258 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
259 no TPL for the board.
260
Kever Yang18f85082019-07-09 22:05:55 +0800261config TPL_ROCKCHIP_COMMON_BOARD
262 bool ""
263 depends on TPL
264 help
265 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
266 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
267 common board is a basic TPL board init which can be shared for most
268 of SoCs to avoid copy-pase for different SoCs.
269
Andy Yane3067792017-10-11 15:00:16 +0800270config ROCKCHIP_BOOT_MODE_REG
271 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800272 help
Kever Yang15f09a12019-03-28 11:01:23 +0800273 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800274 according to the value from this register.
275
Kever Yangfa1392a2017-04-20 17:03:46 +0800276config ROCKCHIP_SPL_RESERVE_IRAM
277 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800278 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800279 help
280 SPL may need reserve memory for firmware loaded by SPL, whose load
281 address is in IRAM and may overlay with SPL text area if not
282 reserved.
283
Heiko Stübner1d845942017-02-18 19:46:25 +0100284config ROCKCHIP_BROM_HELPER
285 bool
286
Philipp Tomsichb377d222017-10-10 16:21:10 +0200287config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
288 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
289 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
290 help
291 Some Rockchip BROM variants (e.g. on the RK3188) load the
292 first stage in segments and enter multiple times. E.g. on
293 the RK3188, the first 1KB of the first stage are loaded
294 first and entered; after returning to the BROM, the
295 remainder of the first stage is loaded, but the BROM
296 re-enters at the same address/to the same code as previously.
297
298 This enables support code in the BOOT0 hook for the SPL stage
299 to allow multiple entries.
300
301config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
302 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
303 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
304 help
305 Some Rockchip BROM variants (e.g. on the RK3188) load the
306 first stage in segments and enter multiple times. E.g. on
307 the RK3188, the first 1KB of the first stage are loaded
308 first and entered; after returning to the BROM, the
309 remainder of the first stage is loaded, but the BROM
310 re-enters at the same address/to the same code as previously.
311
312 This enables support code in the BOOT0 hook for the TPL stage
313 to allow multiple entries.
314
Sandy Patterson230e0e02016-08-29 07:31:16 -0400315config SPL_MMC_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200316 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400317
huang linbe1d5e02015-11-17 14:20:27 +0800318source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800319source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100320source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800321source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200322source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800323source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800324source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800325source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800326source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600327endif