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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07002/**
3 * (C) Copyright 2014, Cavium Inc.
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07004**/
5
6#include <common.h>
Simon Glass9a3b4ce2019-12-28 10:45:01 -07007#include <cpu_func.h>
Simon Glass9d922452017-05-17 17:18:03 -06008#include <dm.h>
Simon Glass2cf431c2019-11-14 12:57:47 -07009#include <init.h>
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070010#include <malloc.h>
11#include <errno.h>
Simon Glass90526e92020-05-10 11:39:56 -060012#include <net.h>
Simon Glass401d1c42020-10-30 21:38:53 -060013#include <asm/global_data.h>
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070014#include <linux/compiler.h>
15
Sergey Temerkhanov3ed2ece2015-10-14 09:55:52 -070016#include <cavium/atf.h>
Alexander Grafd473f0c2016-03-04 01:09:48 +010017#include <asm/armv8/mmu.h>
Sergey Temerkhanov3ed2ece2015-10-14 09:55:52 -070018
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070019#if !CONFIG_IS_ENABLED(OF_CONTROL)
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070020#include <dm/platform_data/serial_pl01x.h>
21
Simon Glass8a8d24b2020-12-03 16:55:23 -070022static const struct pl01x_serial_plat serial0 = {
Tom Rini65cc0e22022-11-16 13:10:41 -050023 .base = CFG_SYS_SERIAL0,
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070024 .type = TYPE_PL011,
25 .clock = 0,
26 .skip_init = true,
27};
28
Simon Glass20e442a2020-12-28 20:34:54 -070029U_BOOT_DRVINFO(thunderx_serial0) = {
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070030 .name = "serial_pl01x",
Simon Glasscaa4daa2020-12-03 16:55:18 -070031 .plat = &serial0,
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070032};
33
Simon Glass8a8d24b2020-12-03 16:55:23 -070034static const struct pl01x_serial_plat serial1 = {
Tom Rini65cc0e22022-11-16 13:10:41 -050035 .base = CFG_SYS_SERIAL1,
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070036 .type = TYPE_PL011,
37 .clock = 0,
38 .skip_init = true,
39};
40
Simon Glass20e442a2020-12-28 20:34:54 -070041U_BOOT_DRVINFO(thunderx_serial1) = {
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070042 .name = "serial_pl01x",
Simon Glasscaa4daa2020-12-03 16:55:18 -070043 .plat = &serial1,
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070044};
45#endif
46
47DECLARE_GLOBAL_DATA_PTR;
48
Alexander Grafd473f0c2016-03-04 01:09:48 +010049static struct mm_region thunderx_mem_map[] = {
50 {
York Suncd4b0c52016-06-24 16:46:22 -070051 .virt = 0x000000000000UL,
52 .phys = 0x000000000000UL,
Alexander Grafd473f0c2016-03-04 01:09:48 +010053 .size = 0x40000000000UL,
54 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
55 }, {
York Suncd4b0c52016-06-24 16:46:22 -070056 .virt = 0x800000000000UL,
57 .phys = 0x800000000000UL,
Alexander Grafd473f0c2016-03-04 01:09:48 +010058 .size = 0x40000000000UL,
59 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
60 PTE_BLOCK_NON_SHARE,
61 }, {
York Suncd4b0c52016-06-24 16:46:22 -070062 .virt = 0x840000000000UL,
63 .phys = 0x840000000000UL,
Alexander Grafd473f0c2016-03-04 01:09:48 +010064 .size = 0x40000000000UL,
65 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
66 PTE_BLOCK_NON_SHARE,
67 }, {
68 /* List terminator */
69 0,
70 }
71};
72
73struct mm_region *mem_map = thunderx_mem_map;
74
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070075int board_init(void)
76{
77 return 0;
78}
79
80int timer_init(void)
81{
82 return 0;
83}
84
Sergey Temerkhanov3ed2ece2015-10-14 09:55:52 -070085int dram_init(void)
86{
87 ssize_t node_count = atf_node_count();
88 ssize_t dram_size;
89 int node;
90
91 printf("Initializing\nNodes in system: %zd\n", node_count);
92
93 gd->ram_size = 0;
94
95 for (node = 0; node < node_count; node++) {
96 dram_size = atf_dram_size(node);
97 printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
98 gd->ram_size += dram_size;
99 }
100
101 gd->ram_size -= MEM_BASE;
102
103 *(unsigned long *)CPU_RELEASE_ADDR = 0;
104
105 puts("DRAM size:");
106
107 return 0;
108}
109
Sergey Temerkhanov746f9852015-10-14 09:55:50 -0700110/*
111 * Board specific reset that is system reset.
112 */
Harald Seiler35b65dd2020-12-15 16:47:52 +0100113void reset_cpu(void)
Sergey Temerkhanov746f9852015-10-14 09:55:50 -0700114{
115}
116
117/*
118 * Board specific ethernet initialization routine.
119 */
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900120int board_eth_init(struct bd_info *bis)
Sergey Temerkhanov746f9852015-10-14 09:55:50 -0700121{
122 int rc = 0;
123
124 return rc;
125}