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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbellcba69ee2014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbellcba69ee2014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goededaf6d392015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goedee049fe22015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Andre Przywarad29adf82017-04-26 01:32:48 +010018#ifdef CONFIG_ARM64
Jagan Tekie628f002017-11-10 22:21:09 +053019#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad29adf82017-04-26 01:32:48 +010020#endif
21
Ian Campbellcba69ee2014-05-05 11:52:26 +010022/* Serial & console */
Ian Campbellcba69ee2014-05-05 11:52:26 +010023#define CONFIG_SYS_NS16550_SERIAL
24/* ns16550 reg in the low bits of cpu reg */
Icenowy Zheng2c699fe2022-01-29 10:23:06 -050025#ifdef CONFIG_MACH_SUNIV
26/* suniv doesn't have apb2 and uart is connected to apb1 */
27#define CONFIG_SYS_NS16550_CLK 100000000
28#else
Ian Campbellcba69ee2014-05-05 11:52:26 +010029#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zheng2c699fe2022-01-29 10:23:06 -050030#endif
Thomas Chou4fb60552015-11-19 21:48:13 +080031#ifndef CONFIG_DM_SERIAL
Simon Glass1a81cf832014-10-30 20:25:50 -060032# define CONFIG_SYS_NS16550_REG_SIZE -4
33# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
34# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
35# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
36# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
37# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
38#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010039
Paul Kocialkowski8a65f692015-05-16 19:52:11 +020040/* CPU */
Paul Kocialkowski8a65f692015-05-16 19:52:11 +020041
Hans de Goedee049fe22015-05-19 22:12:31 +020042/*
43 * The DRAM Base differs between some models. We cannot use macros for the
44 * CONFIG_FOO defines which contain the DRAM base address since they end
45 * up unexpanded in include/autoconf.mk .
46 *
47 * So we have to have this #ifdef #else #endif block for these.
48 */
49#ifdef CONFIG_MACH_SUN9I
50#define SDRAM_OFFSET(x) 0x2##x
51#define CONFIG_SYS_SDRAM_BASE 0x20000000
Hans de Goedee049fe22015-05-19 22:12:31 +020052#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
Icenowy Zheng2c699fe2022-01-29 10:23:06 -050053#elif defined(CONFIG_MACH_SUNIV)
54#define SDRAM_OFFSET(x) 0x8##x
55#define CONFIG_SYS_SDRAM_BASE 0x80000000
Icenowy Zheng2c699fe2022-01-29 10:23:06 -050056#define CONFIG_SPL_BSS_START_ADDR 0x81f80000
Hans de Goedee049fe22015-05-19 22:12:31 +020057#else
58#define SDRAM_OFFSET(x) 0x4##x
Ian Campbellcba69ee2014-05-05 11:52:26 +010059#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zhengc1994892017-04-08 15:30:12 +080060/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goedee049fe22015-05-19 22:12:31 +020061#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
62#endif
63
64#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goedee049fe22015-05-19 22:12:31 +020065
Hans de Goede77fe9882015-05-20 15:27:16 +020066/*
67 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
68 * slightly bigger. Note that it is possible to map the first 32 KiB of the
69 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
70 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
71 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zhengcadc7c22018-07-21 16:20:20 +080072 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
73 * is known yet.
74 * H6 has SRAM A1 at 0x00020000.
Hans de Goede77fe9882015-05-20 15:27:16 +020075 */
Icenowy Zhengcadc7c22018-07-21 16:20:20 +080076#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
77/* FIXME: this may be larger on some SoCs */
78#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +010079
80#define CONFIG_SYS_INIT_SP_OFFSET \
81 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82#define CONFIG_SYS_INIT_SP_ADDR \
83 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84
Ian Campbellcba69ee2014-05-05 11:52:26 +010085#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
86#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
87
Ian Campbella6e50a82014-07-18 20:38:41 +010088#ifdef CONFIG_AHCI
Bernhard Nortmann0751b132015-06-10 10:51:40 +020089#define CONFIG_SYS_64BIT_LBA
Ian Campbella6e50a82014-07-18 20:38:41 +010090#endif
91
Hans de Goedee5268612015-08-16 14:48:22 +020092#ifdef CONFIG_NAND_SUNXI
Boris Brezillona0dfa882016-06-15 21:09:27 +020093#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon4ccae812016-06-15 21:09:23 +020094#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffer960caeb2015-07-23 14:33:03 +020095#endif
96
Ian Campbelle24ea552014-05-05 14:42:31 +010097/* mmc config */
Ian Campbelle24ea552014-05-05 14:42:31 +010098#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardfb1c43c2017-02-27 18:22:03 +010099
Emmanuel Vadotae042be2016-11-05 20:51:11 +0100100#define CONFIG_SYS_MMC_MAX_DEVICE 4
Ian Campbelle24ea552014-05-05 14:42:31 +0100101
Ian Campbellcba69ee2014-05-05 11:52:26 +0100102/*
103 * Miscellaneous configurable options
104 */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100105
Ian Campbellcba69ee2014-05-05 11:52:26 +0100106/* standalone support */
Hans de Goedee049fe22015-05-19 22:12:31 +0200107#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbellcba69ee2014-05-05 11:52:26 +0100108
Ian Campbellcba69ee2014-05-05 11:52:26 +0100109/* FLASH and environment organization */
110
Boris Brezillonfa5e1022015-07-27 16:21:26 +0200111#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100112
Icenowy Zhengcadc7c22018-07-21 16:20:20 +0800113/*
114 * We cannot use expressions here, because expressions won't be evaluated in
115 * autoconf.mk.
116 */
117#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Siarhei Siamashka7f0ef5a2017-04-26 01:32:49 +0100118#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywara54522c92017-04-26 01:32:42 +0100119#ifdef CONFIG_ARM64
120/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
121#define LOW_LEVEL_SRAM_STACK 0x00054000
122#else
Andre Przywarabc613d82017-02-16 01:20:23 +0000123#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywara54522c92017-04-26 01:32:42 +0100124#endif /* !CONFIG_ARM64 */
Icenowy Zhenge5715e72018-07-21 16:20:24 +0800125#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabec8ec293e2021-01-11 21:11:46 +0100126#ifdef CONFIG_MACH_SUN50I_H616
127#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
128#define LOW_LEVEL_SRAM_STACK 0x58000
129#else
Icenowy Zhenge5715e72018-07-21 16:20:24 +0800130#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
131/* end of SRAM A2 on H6 for now */
132#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabec8ec293e2021-01-11 21:11:46 +0100133#endif
Siarhei Siamashkad96ebc42016-03-29 17:29:10 +0200134#else
Siarhei Siamashka7f0ef5a2017-04-26 01:32:49 +0100135#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarabc613d82017-02-16 01:20:23 +0000136#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashkad96ebc42016-03-29 17:29:10 +0200137#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100138
Andre Przywarabc613d82017-02-16 01:20:23 +0000139#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
140
Jernej Skrabec8ec293e2021-01-11 21:11:46 +0100141#ifndef CONFIG_MACH_SUN50I_H616
Ian Campbell50827a52014-05-05 11:52:30 +0100142#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
Jernej Skrabec8ec293e2021-01-11 21:11:46 +0100143#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100144
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200145/* Ethernet support */
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200146
Paul Kocialkowski2582ca02015-08-04 17:04:09 +0200147#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede6a72e802015-05-10 14:10:27 +0200148#define CONFIG_USB_OHCI_NEW
Hans de Goede6a72e802015-05-10 14:10:27 +0200149#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goede1a800f72015-01-11 17:17:00 +0100150#endif
151
Ian Campbellcba69ee2014-05-05 11:52:26 +0100152#ifndef CONFIG_SPL_BUILD
Hans de Goede2ec3a612014-07-31 23:04:45 +0200153
Andre Przywara671f9ad2016-05-04 22:15:32 +0100154#ifdef CONFIG_ARM64
155/*
156 * Boards seem to come with at least 512MB of DRAM.
157 * The kernel should go at 512K, which is the default text offset (that will
158 * be adjusted at runtime if needed).
159 * There is no compression for arm64 kernels (yet), so leave some space
160 * for really big kernels, say 256MB for now.
161 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara671f9ad2016-05-04 22:15:32 +0100162 */
Jernej Skrabec17d6ece2021-03-23 21:27:31 +0100163#define BOOTM_SIZE __stringify(0xa000000)
164#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferraris747c2422021-02-20 13:14:15 +0100165#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
166#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec17d6ece2021-03-23 21:27:31 +0100167#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
168#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
169#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
170#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
171#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara671f9ad2016-05-04 22:15:32 +0100172
Icenowy Zheng2c699fe2022-01-29 10:23:06 -0500173#elif defined(CONFIG_MACH_SUN8I_V3S)
Icenowy Zhengc1994892017-04-08 15:30:12 +0800174/*
175 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
176 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
Jernej Skrabec17d6ece2021-03-23 21:27:31 +0100177 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Icenowy Zhengc1994892017-04-08 15:30:12 +0800178 */
Jernej Skrabec17d6ece2021-03-23 21:27:31 +0100179#define BOOTM_SIZE __stringify(0x2e00000)
180#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
181#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
182#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
183#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
184#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
185#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
Icenowy Zheng2c699fe2022-01-29 10:23:06 -0500186
187#elif defined(CONFIG_MACH_SUNIV)
188/*
189 * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
190 * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
191 * 512K script, 512K pxe and the ramdisk at the end.
192 */
193#define BOOTM_SIZE __stringify(0x1700000)
194#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000))
195#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000))
196#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000))
197#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000))
198#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000))
199#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000))
200
201#else
202/*
203 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
204 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
205 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
206 */
207#define BOOTM_SIZE __stringify(0xa000000)
208#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
209#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
210#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
211#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
212#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
213#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Andre Przywara671f9ad2016-05-04 22:15:32 +0100214#endif
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200215
Hans de Goede846e3252014-08-01 09:37:58 +0200216#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zhengc1994892017-04-08 15:30:12 +0800217 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200218 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
219 "fdt_addr_r=" FDT_ADDR_R "\0" \
220 "scriptaddr=" SCRIPT_ADDR_R "\0" \
221 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec17d6ece2021-03-23 21:27:31 +0100222 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200223 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
224
Arnaud Ferraris747c2422021-02-20 13:14:15 +0100225#ifdef CONFIG_ARM64
226
227#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
228 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
229 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
230
231#else
232
233#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
234
235#endif
236
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200237#define DFU_ALT_INFO_RAM \
238 "dfu_alt_info_ram=" \
239 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
240 "fdt ram " FDT_ADDR_R " 0x100000;" \
241 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede846e3252014-08-01 09:37:58 +0200242
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800243#ifdef CONFIG_MMC
Karsten Merker5a37a402015-12-16 20:59:40 +0100244#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripardde86fc32017-08-23 10:12:22 +0200245#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
246 BOOTENV_DEV_MMC(MMC, mmc, 0) \
247 BOOTENV_DEV_MMC(MMC, mmc, 1) \
248 "bootcmd_mmc_auto=" \
249 "if test ${mmc_bootdev} -eq 1; then " \
250 "run bootcmd_mmc1; " \
251 "run bootcmd_mmc0; " \
252 "elif test ${mmc_bootdev} -eq 0; then " \
253 "run bootcmd_mmc0; " \
254 "run bootcmd_mmc1; " \
255 "fi\0"
256
257#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
258 "mmc_auto "
259
260#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker5a37a402015-12-16 20:59:40 +0100261#else
Maxime Ripardde86fc32017-08-23 10:12:22 +0200262#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker5a37a402015-12-16 20:59:40 +0100263#endif
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800264#else
265#define BOOT_TARGET_DEVICES_MMC(func)
266#endif
267
Hans de Goede2ec3a612014-07-31 23:04:45 +0200268#ifdef CONFIG_AHCI
269#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
270#else
271#define BOOT_TARGET_DEVICES_SCSI(func)
272#endif
273
Paul Kocialkowski2582ca02015-08-04 17:04:09 +0200274#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800275#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
276#else
277#define BOOT_TARGET_DEVICES_USB(func)
278#endif
279
Ondrej Jirman0eabec12019-02-13 18:50:36 +0100280#ifdef CONFIG_CMD_PXE
281#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
282#else
283#define BOOT_TARGET_DEVICES_PXE(func)
284#endif
285
286#ifdef CONFIG_CMD_DHCP
287#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
288#else
289#define BOOT_TARGET_DEVICES_DHCP(func)
290#endif
291
Bernhard Nortmannf3b589c2015-09-17 18:52:53 +0200292/* FEL boot support, auto-execute boot.scr if a script address was provided */
293#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
294 "bootcmd_fel=" \
295 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
296 "echo '(FEL boot)'; " \
297 "source ${fel_scriptaddr}; " \
298 "fi\0"
299#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
300 "fel "
301
Hans de Goede2ec3a612014-07-31 23:04:45 +0200302#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmannf3b589c2015-09-17 18:52:53 +0200303 func(FEL, fel, na) \
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800304 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200305 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800306 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman0eabec12019-02-13 18:50:36 +0100307 BOOT_TARGET_DEVICES_PXE(func) \
308 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede2ec3a612014-07-31 23:04:45 +0200309
Hans de Goede3b824022015-10-09 17:11:15 +0100310#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
311#define BOOTCMD_SUNXI_COMPAT \
312 "bootcmd_sunxi_compat=" \
313 "setenv root /dev/mmcblk0p3 rootwait; " \
314 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
315 "echo Loaded environment from uEnv.txt; " \
316 "env import -t 0x44000000 ${filesize}; " \
317 "fi; " \
318 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
319 "ext2load mmc 0 0x43000000 script.bin && " \
320 "ext2load mmc 0 0x48000000 uImage && " \
321 "bootm 0x48000000\0"
322#else
323#define BOOTCMD_SUNXI_COMPAT
324#endif
325
Hans de Goede2ec3a612014-07-31 23:04:45 +0200326#include <config_distro_bootcmd.h>
327
Hans de Goede86b49092014-09-18 21:03:34 +0200328#ifdef CONFIG_USB_KEYBOARD
329#define CONSOLE_STDIN_SETTINGS \
Hans de Goede86b49092014-09-18 21:03:34 +0200330 "stdin=serial,usbkbd\0"
331#else
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200332#define CONSOLE_STDIN_SETTINGS \
333 "stdin=serial\0"
Hans de Goede86b49092014-09-18 21:03:34 +0200334#endif
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200335
Jagan Teki5d235322021-02-22 00:12:34 +0000336#ifdef CONFIG_DM_VIDEO
Jernej Skrabec56009452017-03-27 19:22:32 +0200337#define CONSOLE_STDOUT_SETTINGS \
338 "stdout=serial,vidconsole\0" \
339 "stderr=serial,vidconsole\0"
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200340#else
341#define CONSOLE_STDOUT_SETTINGS \
342 "stdout=serial\0" \
343 "stderr=serial\0"
344#endif
345
Maxime Ripardc8564b22017-02-27 18:22:11 +0100346#ifdef CONFIG_MTDIDS_DEFAULT
347#define SUNXI_MTDIDS_DEFAULT \
348 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
349#else
350#define SUNXI_MTDIDS_DEFAULT
351#endif
352
353#ifdef CONFIG_MTDPARTS_DEFAULT
354#define SUNXI_MTDPARTS_DEFAULT \
355 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
356#else
357#define SUNXI_MTDPARTS_DEFAULT
358#endif
359
Maxime Ripardc53654f2017-11-14 21:24:00 +0100360#define PARTS_DEFAULT \
361 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
362 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
363 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
364 "name=system,size=-,uuid=${uuid_gpt_system};"
365
366#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
367
368#ifdef CONFIG_ARM64
369#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
370#else
371#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
372#endif
373
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200374#define CONSOLE_ENV_SETTINGS \
375 CONSOLE_STDIN_SETTINGS \
376 CONSOLE_STDOUT_SETTINGS
377
Andreas Färber2eff3b72017-04-14 18:44:47 +0200378#ifdef CONFIG_ARM64
379#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
380#else
381#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
382#endif
383
Hans de Goede2ec3a612014-07-31 23:04:45 +0200384#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200385 CONSOLE_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200386 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferraris747c2422021-02-20 13:14:15 +0100387 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashka2a909c52015-10-25 06:44:46 +0200388 DFU_ALT_INFO_RAM \
Andreas Färber2eff3b72017-04-14 18:44:47 +0200389 "fdtfile=" FDTFILE "\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200390 "console=ttyS0,115200\0" \
Maxime Ripardc8564b22017-02-27 18:22:11 +0100391 SUNXI_MTDIDS_DEFAULT \
392 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripardc53654f2017-11-14 21:24:00 +0100393 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
394 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
395 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede3b824022015-10-09 17:11:15 +0100396 BOOTCMD_SUNXI_COMPAT \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200397 BOOTENV
398
399#else /* ifndef CONFIG_SPL_BUILD */
400#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100401#endif
402
403#endif /* _SUNXI_COMMON_CONFIG_H */