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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chouc8a7ba92015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08004 */
5
Patrick Delaunayb953ec22021-04-27 11:02:19 +02006#define LOG_CATEGORY UCLASS_TIMER
7
Thomas Chouc8a7ba92015-10-09 13:46:34 +08008#include <common.h>
Sean Andersona5d4f862020-10-04 21:39:52 -04009#include <clk.h>
Sean Anderson35761212020-09-28 10:52:22 -040010#include <cpu.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080011#include <dm.h>
Simon Glass401d1c42020-10-30 21:38:53 -060012#include <asm/global_data.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +053013#include <dm/lists.h>
Sean Andersona5d4f862020-10-04 21:39:52 -040014#include <dm/device_compat.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +053015#include <dm/device-internal.h>
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020016#include <dm/root.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080017#include <errno.h>
Sean Andersona5d4f862020-10-04 21:39:52 -040018#include <init.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080019#include <timer.h>
Simon Glass61b29b82020-02-03 07:36:15 -070020#include <linux/err.h>
Ovidiu Panait8272d4c2022-10-12 08:36:55 +030021#include <relocate.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080022
Bin Meng579eb5a2015-11-13 00:11:15 -080023DECLARE_GLOBAL_DATA_PTR;
24
Thomas Chouc8a7ba92015-10-09 13:46:34 +080025/*
Bin Meng435ae762015-11-13 00:11:14 -080026 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Meng9ca07eb2015-11-24 13:31:17 -070027 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Chouc8a7ba92015-10-09 13:46:34 +080028 * the input clock frequency of the timer. The get_count() method is used
Bin Meng9ca07eb2015-11-24 13:31:17 -070029 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Chouc8a7ba92015-10-09 13:46:34 +080030 * the value should be inversed inside the method. There may be no real
31 * tick, and no timer interrupt.
32 */
33
Simon Glass4f051822016-02-24 09:14:48 -070034int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080035{
Ovidiu Panait1e766a02022-10-12 08:36:54 +030036 struct timer_ops *ops = timer_get_ops(dev);
Thomas Chouc8a7ba92015-10-09 13:46:34 +080037
38 if (!ops->get_count)
39 return -ENOSYS;
40
Sean Anderson8af7bb92020-10-07 14:37:44 -040041 *count = ops->get_count(dev);
42 return 0;
Thomas Chouc8a7ba92015-10-09 13:46:34 +080043}
44
Simon Glass4f051822016-02-24 09:14:48 -070045unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080046{
Simon Glass0fd3d912020-12-22 19:30:28 -070047 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Thomas Chouc8a7ba92015-10-09 13:46:34 +080048
49 return uc_priv->clock_rate;
50}
51
Bin Meng579eb5a2015-11-13 00:11:15 -080052static int timer_pre_probe(struct udevice *dev)
53{
Ovidiu Panait8272d4c2022-10-12 08:36:55 +030054 if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) &&
55 (gd->flags & GD_FLG_RELOC)) {
56 struct timer_ops *ops = timer_get_ops(dev);
57 static int reloc_done;
58
59 if (!reloc_done) {
60 if (ops->get_count)
61 MANUAL_RELOC(ops->get_count);
62
63 reloc_done++;
64 }
65 }
66
Simon Glassdcfc42b2021-08-07 07:24:06 -060067 if (CONFIG_IS_ENABLED(OF_REAL)) {
68 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
69 struct clk timer_clk;
70 int err;
71 ulong ret;
Bin Meng579eb5a2015-11-13 00:11:15 -080072
Simon Glassdcfc42b2021-08-07 07:24:06 -060073 /*
74 * It is possible that a timer device has a null ofnode
75 */
76 if (!dev_has_ofnode(dev))
77 return 0;
Bin Meng7efb4a62019-07-05 09:23:15 -070078
Simon Glassdcfc42b2021-08-07 07:24:06 -060079 err = clk_get_by_index(dev, 0, &timer_clk);
80 if (!err) {
81 ret = clk_get_rate(&timer_clk);
82 if (IS_ERR_VALUE(ret))
83 return ret;
84 uc_priv->clock_rate = ret;
85 } else {
86 uc_priv->clock_rate =
87 dev_read_u32_default(dev, "clock-frequency", 0);
88 }
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020089 }
Bin Meng579eb5a2015-11-13 00:11:15 -080090
91 return 0;
92}
93
Stephen Warren0a7edce2016-01-06 10:33:03 -070094static int timer_post_probe(struct udevice *dev)
95{
96 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
97
98 if (!uc_priv->clock_rate)
99 return -EINVAL;
100
101 return 0;
102}
103
Simon Glass529d5f92021-03-15 18:11:18 +1300104#if CONFIG_IS_ENABLED(CPU)
Sean Anderson35761212020-09-28 10:52:22 -0400105int timer_timebase_fallback(struct udevice *dev)
106{
107 struct udevice *cpu;
Simon Glass8a8d24b2020-12-03 16:55:23 -0700108 struct cpu_plat *cpu_plat;
Sean Anderson35761212020-09-28 10:52:22 -0400109 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
110
111 /* Did we get our clock rate from the device tree? */
112 if (uc_priv->clock_rate)
113 return 0;
114
115 /* Fall back to timebase-frequency */
116 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
117 cpu = cpu_get_current_dev();
118 if (!cpu)
119 return -ENODEV;
120
Simon Glasscaa4daa2020-12-03 16:55:18 -0700121 cpu_plat = dev_get_parent_plat(cpu);
Sean Anderson35761212020-09-28 10:52:22 -0400122 if (!cpu_plat)
123 return -ENODEV;
124
125 uc_priv->clock_rate = cpu_plat->timebase_freq;
126 return 0;
127}
128#endif
129
Bin Meng9ca07eb2015-11-24 13:31:17 -0700130u64 timer_conv_64(u32 count)
131{
132 /* increment tbh if tbl has rolled over */
133 if (count < gd->timebase_l)
134 gd->timebase_h++;
135 gd->timebase_l = count;
136 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
137}
138
Simon Glass4aa50532023-01-15 14:15:42 -0700139int dm_timer_init(void)
Mugunthan V Nc8336972016-01-16 21:33:58 +0530140{
Mugunthan V Nc8336972016-01-16 21:33:58 +0530141 struct udevice *dev = NULL;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200142 __maybe_unused ofnode node;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530143 int ret;
144
145 if (gd->timer)
146 return 0;
147
Philipp Tomsichaf823152017-09-11 22:04:11 +0200148 /*
149 * Directly access gd->dm_root to suppress error messages, if the
150 * virtual root driver does not yet exist.
151 */
152 if (gd->dm_root == NULL)
153 return -EAGAIN;
154
Simon Glassdcfc42b2021-08-07 07:24:06 -0600155 if (CONFIG_IS_ENABLED(OF_REAL)) {
156 /* Check for a chosen timer to be used for tick */
157 node = ofnode_get_chosen_node("tick-timer");
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200158
Simon Glassdcfc42b2021-08-07 07:24:06 -0600159 if (ofnode_valid(node) &&
160 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
161 /*
162 * If the timer is not marked to be bound before
163 * relocation, bind it anyway.
164 */
Tom Rini776bf6a2021-10-12 12:01:00 -0400165 if (!lists_bind_fdt(dm_root(), node, &dev, NULL, false)) {
Simon Glassdcfc42b2021-08-07 07:24:06 -0600166 ret = device_probe(dev);
167 if (ret)
168 return ret;
169 }
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200170 }
171 }
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200172
173 if (!dev) {
174 /* Fall back to the first available timer */
Simon Glass3f603cb2016-02-11 13:23:26 -0700175 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V Nc8336972016-01-16 21:33:58 +0530176 if (ret)
177 return ret;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530178 }
179
180 if (dev) {
181 gd->timer = dev;
182 return 0;
183 }
184
185 return -ENODEV;
186}
187
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800188UCLASS_DRIVER(timer) = {
189 .id = UCLASS_TIMER,
190 .name = "timer",
Bin Meng579eb5a2015-11-13 00:11:15 -0800191 .pre_probe = timer_pre_probe,
Mugunthan V Na5d80112015-12-24 16:08:06 +0530192 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren0a7edce2016-01-06 10:33:03 -0700193 .post_probe = timer_post_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700194 .per_device_auto = sizeof(struct timer_dev_priv),
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800195};