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Stefan Roesec157d8e2005-08-01 16:41:48 +02001/*
Stefan Roese700200c2007-01-30 17:04:19 +01002 * (C) Copyright 2005-2007
Stefan Roese84286382005-08-11 18:03:14 +02003 * Stefan Roese, DENX Software Engineering, sr@denx.de.
Stefan Roesec157d8e2005-08-01 16:41:48 +02004 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
Stefan Roese700200c2007-01-30 17:04:19 +010025 * yosemite.h - configuration for Yosemite & Yellowstone boards
Stefan Roesec157d8e2005-08-01 16:41:48 +020026 ***********************************************************************/
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
Stefan Roese700200c2007-01-30 17:04:19 +010033/* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
34#ifndef CONFIG_YELLOWSTONE
Stefan Roese700200c2007-01-30 17:04:19 +010035#define CONFIG_440EP 1 /* Specific PPC440EP support */
36#define CONFIG_HOSTNAME yosemite
37#else
38#define CONFIG_440GR 1 /* Specific PPC440GR support */
39#define CONFIG_HOSTNAME yellowstone
40#endif
41#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roesec157d8e2005-08-01 16:41:48 +020042#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
43
Stefan Roese84286382005-08-11 18:03:14 +020044#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
45#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
Stefan Roesef3443862006-10-07 11:30:52 +020046#define CONFIG_BOARD_RESET 1 /* call board_reset() */
Stefan Roese84286382005-08-11 18:03:14 +020047
Stefan Roesec157d8e2005-08-01 16:41:48 +020048/*-----------------------------------------------------------------------
49 * Base addresses -- Note these are effective addresses where the
50 * actual resources get mapped (not physical addresses)
51 *----------------------------------------------------------------------*/
Stefan Roese84286382005-08-11 18:03:14 +020052#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
53#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
54#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
55#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
56#define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
57#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
58#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
59#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
60#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020061
62/*Don't change either of these*/
Stefan Roese84286382005-08-11 18:03:14 +020063#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
64#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020065/*Don't change either of these*/
66
Stefan Roese84286382005-08-11 18:03:14 +020067#define CFG_USB_DEVICE 0x50000000
68#define CFG_NVRAM_BASE_ADDR 0x80000000
69#define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
70#define CFG_BOOT_BASE_ADDR 0xf0000000
Stefan Roesec157d8e2005-08-01 16:41:48 +020071
72/*-----------------------------------------------------------------------
73 * Initial RAM & stack pointer (placed in SDRAM)
74 *----------------------------------------------------------------------*/
Stefan Roese887e2ec2006-09-07 11:51:23 +020075#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
Stefan Roese84286382005-08-11 18:03:14 +020076#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
77#define CFG_INIT_RAM_END (8 << 10)
78#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020079#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
80#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
81
Stefan Roesec157d8e2005-08-01 16:41:48 +020082/*-----------------------------------------------------------------------
83 * Serial Port
84 *----------------------------------------------------------------------*/
Stefan Roesec157d8e2005-08-01 16:41:48 +020085#define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
Stefan Roese84286382005-08-11 18:03:14 +020086#define CONFIG_BAUDRATE 115200
87#define CONFIG_SERIAL_MULTI 1
Stefan Roesec157d8e2005-08-01 16:41:48 +020088/*define this if you want console on UART1*/
89#undef CONFIG_UART1_CONSOLE
90
91#define CFG_BAUDRATE_TABLE \
92 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
93
94/*-----------------------------------------------------------------------
Stefan Roese84286382005-08-11 18:03:14 +020095 * Environment
Stefan Roesec157d8e2005-08-01 16:41:48 +020096 *----------------------------------------------------------------------*/
Stefan Roese84286382005-08-11 18:03:14 +020097/*
98 * Define here the location of the environment variables (FLASH or EEPROM).
99 * Note: DENX encourages to use redundant environment in FLASH.
100 */
101#if 1
102#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
103#else
104#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
105#endif
Stefan Roesec157d8e2005-08-01 16:41:48 +0200106
107/*-----------------------------------------------------------------------
108 * FLASH related
109 *----------------------------------------------------------------------*/
Wolfgang Denk095b8a32005-08-02 17:06:17 +0200110#define CFG_FLASH_CFI /* The flash is CFI compatible */
111#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
112#define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200113
114#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
115#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
116
117#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
118#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
119
Stefan Roese278bc4b2006-05-10 15:06:58 +0200120#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
121
Stefan Roesec157d8e2005-08-01 16:41:48 +0200122#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Stefan Roese84286382005-08-11 18:03:14 +0200123
124#ifdef CFG_ENV_IS_IN_FLASH
125#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
126#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
127#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
128
129/* Address and size of Redundant Environment Sector */
130#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
131#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
132#endif /* CFG_ENV_IS_IN_FLASH */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200133
134/*-----------------------------------------------------------------------
135 * DDR SDRAM
136 *----------------------------------------------------------------------*/
Wolfgang Denk095b8a32005-08-02 17:06:17 +0200137#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
Stefan Roese84286382005-08-11 18:03:14 +0200138#define CFG_KBYTES_SDRAM (128 * 1024) /* 128MB */
139#define CFG_SDRAM_BANKS (2)
140
Stefan Roesec157d8e2005-08-01 16:41:48 +0200141
142/*-----------------------------------------------------------------------
143 * I2C
144 *----------------------------------------------------------------------*/
145#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
146#undef CONFIG_SOFT_I2C /* I2C bit-banged */
147#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
148#define CFG_I2C_SLAVE 0x7F
149
Stefan Roesec157d8e2005-08-01 16:41:48 +0200150#define CFG_I2C_MULTI_EEPROMS
Stefan Roesec157d8e2005-08-01 16:41:48 +0200151#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
152#define CFG_I2C_EEPROM_ADDR_LEN 1
153#define CFG_EEPROM_PAGE_WRITE_ENABLE
154#define CFG_EEPROM_PAGE_WRITE_BITS 3
155#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
156
Stefan Roese84286382005-08-11 18:03:14 +0200157#ifdef CFG_ENV_IS_IN_EEPROM
158#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
159#define CFG_ENV_OFFSET 0x0
160#endif /* CFG_ENV_IS_IN_EEPROM */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200161
Stefan Roese84286382005-08-11 18:03:14 +0200162#define CONFIG_PREBOOT "echo;" \
163 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
164 "echo"
165
166#undef CONFIG_BOOTARGS
167
Stefan Roese700200c2007-01-30 17:04:19 +0100168/* Setup some board specific values for the default environment variables */
169#ifndef CONFIG_YELLOWSTONE
170#define CONFIG_HOSTNAME yosemite
171#define CFG_BOOTFILE "bootfile=/tftpboot/yosemite/uImage\0"
172#define CFG_ROOTPATH "rootpath=/opt/eldk/ppc_4xxFP\0"
173#else
174#define CONFIG_HOSTNAME yellowstone
175#define CFG_BOOTFILE "bootfile=/tftpboot/yellowstone/uImage\0"
176#define CFG_ROOTPATH "rootpath=/opt/eldk/ppc_4xx\0"
177#endif
178
Stefan Roese84286382005-08-11 18:03:14 +0200179#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Roese700200c2007-01-30 17:04:19 +0100180 CFG_BOOTFILE \
181 CFG_ROOTPATH \
Stefan Roese84286382005-08-11 18:03:14 +0200182 "netdev=eth0\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200183 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100184 "nfsroot=${serverip}:${rootpath}\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200185 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100186 "addip=setenv bootargs ${bootargs} " \
187 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
188 ":${hostname}:${netdev}:off panic=1\0" \
189 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
Stefan Roese84286382005-08-11 18:03:14 +0200190 "flash_nfs=run nfsargs addip addtty;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100191 "bootm ${kernel_addr}\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200192 "flash_self=run ramargs addip addtty;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100193 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
194 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
Stefan Roese84286382005-08-11 18:03:14 +0200195 "bootm\0" \
Stefan Roese700200c2007-01-30 17:04:19 +0100196 "bootfile=/tftpboot/${hostname}/uImage\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200197 "kernel_addr=fc000000\0" \
Stefan Roese56ced702006-05-15 15:11:20 +0200198 "ramdisk_addr=fc180000\0" \
Stefan Roese700200c2007-01-30 17:04:19 +0100199 "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0" \
Stefan Roese84286382005-08-11 18:03:14 +0200200 "update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
Stefan Roese700200c2007-01-30 17:04:19 +0100201 "cp.b 200000 fff80000 80000;" \
Stefan Roese84286382005-08-11 18:03:14 +0200202 "setenv filesize;saveenv\0" \
203 "upd=run load;run update\0" \
204 ""
205#define CONFIG_BOOTCOMMAND "run flash_self"
206
207#if 0
208#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
209#else
210#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
211#endif
212
213#define CONFIG_BAUDRATE 115200
214
215#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200216#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
217
Stefan Roese84286382005-08-11 18:03:14 +0200218#define CONFIG_MII 1 /* MII PHY management */
219#define CONFIG_NET_MULTI 1 /* required for netconsole */
220#define CONFIG_PHY1_ADDR 3
Stefan Roesec157d8e2005-08-01 16:41:48 +0200221#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
222#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200223
Stefan Roese1e25f952005-10-20 16:34:28 +0200224#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
225
226#define CONFIG_NETCONSOLE /* include NetConsole support */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200227
228/* Partitions */
229#define CONFIG_MAC_PARTITION
230#define CONFIG_DOS_PARTITION
231#define CONFIG_ISO_PARTITION
232
Stefan Roese846b0dd2005-08-08 12:42:22 +0200233#ifdef CONFIG_440EP
Stefan Roesec157d8e2005-08-01 16:41:48 +0200234/* USB */
235#define CONFIG_USB_OHCI
236#define CONFIG_USB_STORAGE
237
Stefan Roese700200c2007-01-30 17:04:19 +0100238/* Comment this out to enable USB 1.1 device */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200239#define USB_2_0_DEVICE
Stefan Roese700200c2007-01-30 17:04:19 +0100240
241#define CMD_USB (CFG_CMD_USB | CFG_CMD_FAT | CFG_CMD_EXT2)
242
243#define CONFIG_SUPPORT_VFAT
244#else
245#define CMD_USB 0 /* no USB on 440GR */
246#endif /* CONFIG_440EP */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200247
248#ifdef DEBUG
249#define CONFIG_PANIC_HANG
250#else
251#define CONFIG_HW_WATCHDOG /* watchdog */
252#endif
253
Stefan Roese84286382005-08-11 18:03:14 +0200254#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
255 CFG_CMD_ASKENV | \
256 CFG_CMD_DHCP | \
257 CFG_CMD_DIAG | \
258 CFG_CMD_ELF | \
Stefan Roese4f92ed52006-08-07 14:33:32 +0200259 CFG_CMD_EEPROM | \
Stefan Roese84286382005-08-11 18:03:14 +0200260 CFG_CMD_I2C | \
261 CFG_CMD_IRQ | \
262 CFG_CMD_MII | \
263 CFG_CMD_NET | \
264 CFG_CMD_NFS | \
265 CFG_CMD_PCI | \
266 CFG_CMD_PING | \
267 CFG_CMD_REGINFO | \
268 CFG_CMD_SDRAM | \
Stefan Roese700200c2007-01-30 17:04:19 +0100269 CMD_USB)
Stefan Roese3b6748e2005-10-14 15:37:34 +0200270
Stefan Roesec157d8e2005-08-01 16:41:48 +0200271/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
272#include <cmd_confdefs.h>
273
274/*
275 * Miscellaneous configurable options
276 */
277#define CFG_LONGHELP /* undef to save memory */
Stefan Roese84286382005-08-11 18:03:14 +0200278#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200279#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Stefan Roese84286382005-08-11 18:03:14 +0200280#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200281#else
Stefan Roese84286382005-08-11 18:03:14 +0200282#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200283#endif
Stefan Roese84286382005-08-11 18:03:14 +0200284#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
285#define CFG_MAXARGS 16 /* max number of command args */
286#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200287
Stefan Roese84286382005-08-11 18:03:14 +0200288#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
289#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200290
291#define CFG_LOAD_ADDR 0x100000 /* default load address */
Stefan Roese84286382005-08-11 18:03:14 +0200292#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
293#define CONFIG_LYNXKDI 1 /* support kdi files */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200294
Stefan Roese84286382005-08-11 18:03:14 +0200295#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200296
Stefan Roese4f92ed52006-08-07 14:33:32 +0200297#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
298#define CONFIG_LOOPW 1 /* enable loopw command */
299#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
300#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
301#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
302
Stefan Roesec157d8e2005-08-01 16:41:48 +0200303/*-----------------------------------------------------------------------
304 * PCI stuff
305 *-----------------------------------------------------------------------
306 */
307/* General PCI */
Stefan Roese84286382005-08-11 18:03:14 +0200308#define CONFIG_PCI /* include pci support */
309#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
310#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
311#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
Stefan Roesec157d8e2005-08-01 16:41:48 +0200312
313/* Board-specific PCI */
Stefan Roese84286382005-08-11 18:03:14 +0200314#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200315#define CFG_PCI_TARGET_INIT
316#define CFG_PCI_MASTER_INIT
317
Stefan Roese84286382005-08-11 18:03:14 +0200318#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
319#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200320
321/*
322 * For booting Linux, the board info and command line data
323 * have to be in the first 8 MB of memory, since this is
324 * the maximum mapped by the Linux kernel during initialization.
325 */
326#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Stefan Roese84286382005-08-11 18:03:14 +0200327
Stefan Roesec157d8e2005-08-01 16:41:48 +0200328/*-----------------------------------------------------------------------
Stefan Roese36adff32007-01-13 07:59:19 +0100329 * External Bus Controller (EBC) Setup
330 *----------------------------------------------------------------------*/
331#define CFG_FLASH CFG_FLASH_BASE
332#define CFG_CPLD 0x80000000
333
334/* Memory Bank 0 (NOR-FLASH) initialization */
335#define CFG_EBC_PB0AP 0x03017300
336#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
337
338/* Memory Bank 2 (CPLD) initialization */
339#define CFG_EBC_PB2AP 0x04814500
340#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
341
342/*-----------------------------------------------------------------------
Stefan Roesec157d8e2005-08-01 16:41:48 +0200343 * Cache Configuration
344 */
Wolfgang Denk0c8721a2005-09-23 11:05:55 +0200345#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
Stefan Roesec157d8e2005-08-01 16:41:48 +0200346#define CFG_CACHELINE_SIZE 32 /* ... */
347#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
348#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
349#endif
350
351/*
352 * Internal Definitions
353 *
354 * Boot Flags
355 */
356#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
357#define BOOTFLAG_WARM 0x02 /* Software reboot */
358
359#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
360#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
361#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
362#endif
Stefan Roese84286382005-08-11 18:03:14 +0200363
Stefan Roesec157d8e2005-08-01 16:41:48 +0200364#endif /* __CONFIG_H */