blob: 929f9a9d73469c74d75f35e4933199b2018da804 [file] [log] [blame]
wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010042#include <mtd/cfi_flash.h>
wdenk028ab6b2004-02-23 23:54:43 +000043
wdenk5653fc32004-02-08 22:55:38 +000044/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010045 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000051 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010057 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000060 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010062 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000063 */
64
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010065static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysinger4ffeab22010-12-22 09:41:13 -050066#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010067static uint flash_verbose = 1;
Mike Frysinger4ffeab22010-12-22 09:41:13 -050068#else
69#define flash_verbose 1
70#endif
Wolfgang Denk92eb7292006-12-27 01:26:13 +010071
Wolfgang Denk2a112b22008-08-08 16:39:54 +020072flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
73
Stefan Roese79b4cda2006-02-28 15:29:58 +010074/*
75 * Check if chip width is defined. If not, start detecting with 8bit.
76 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
78#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +010079#endif
80
Stefan Roese6f726f92010-10-25 18:31:48 +020081/*
82 * 0xffff is an undefined value for the configuration register. When
83 * this value is returned, the configuration register shall not be
84 * written at all (default mode).
85 */
86static u16 cfi_flash_config_reg(int i)
87{
88#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
89 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
90#else
91 return 0xffff;
92#endif
93}
94
Stefan Roeseca5def32010-08-31 10:00:10 +020095#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
96int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
97#endif
98
Stefan Roeseb00e19c2010-08-30 10:11:51 +020099static phys_addr_t __cfi_flash_bank_addr(int i)
100{
101 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
102}
103phys_addr_t cfi_flash_bank_addr(int i)
104 __attribute__((weak, alias("__cfi_flash_bank_addr")));
105
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200106static unsigned long __cfi_flash_bank_size(int i)
107{
108#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
109 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
110#else
111 return 0;
112#endif
113}
114unsigned long cfi_flash_bank_size(int i)
115 __attribute__((weak, alias("__cfi_flash_bank_size")));
116
Stefan Roese45aa5a72008-11-17 14:45:22 +0100117static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100118{
119 __raw_writeb(value, addr);
120}
121
Stefan Roese45aa5a72008-11-17 14:45:22 +0100122static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100123{
124 __raw_writew(value, addr);
125}
126
Stefan Roese45aa5a72008-11-17 14:45:22 +0100127static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100128{
129 __raw_writel(value, addr);
130}
131
Stefan Roese45aa5a72008-11-17 14:45:22 +0100132static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100133{
134 /* No architectures currently implement __raw_writeq() */
135 *(volatile u64 *)addr = value;
136}
137
Stefan Roese45aa5a72008-11-17 14:45:22 +0100138static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100139{
140 return __raw_readb(addr);
141}
142
Stefan Roese45aa5a72008-11-17 14:45:22 +0100143static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100144{
145 return __raw_readw(addr);
146}
147
Stefan Roese45aa5a72008-11-17 14:45:22 +0100148static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100149{
150 return __raw_readl(addr);
151}
152
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100153static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100154{
155 /* No architectures currently implement __raw_readq() */
156 return *(volatile u64 *)addr;
157}
158
Stefan Roese45aa5a72008-11-17 14:45:22 +0100159#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
160void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
161void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
162void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
163void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
164u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
165u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
166u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100167u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100168#else
169#define flash_write8 __flash_write8
170#define flash_write16 __flash_write16
171#define flash_write32 __flash_write32
172#define flash_write64 __flash_write64
173#define flash_read8 __flash_read8
174#define flash_read16 __flash_read16
175#define flash_read32 __flash_read32
176#define flash_read64 __flash_read64
177#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100178
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200179/*-----------------------------------------------------------------------
180 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100182flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200183{
184 int i;
Stefan Roesecba34aa2010-08-30 11:14:38 +0200185 flash_info_t *info = NULL;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200188 info = & flash_info[i];
189 if (info->size && info->start[0] <= base &&
190 base <= info->start[0] + info->size - 1)
191 break;
192 }
193
Stefan Roesecba34aa2010-08-30 11:14:38 +0200194 return info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200195}
wdenk5653fc32004-02-08 22:55:38 +0000196#endif
197
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100198unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
199{
200 if (sect != (info->sector_count - 1))
201 return info->start[sect + 1] - info->start[sect];
202 else
203 return info->start[0] + info->size - info->start[sect];
204}
205
wdenk5653fc32004-02-08 22:55:38 +0000206/*-----------------------------------------------------------------------
207 * create an address based on the offset and the port width
208 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100209static inline void *
210flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000211{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100212 unsigned int byte_offset = offset * info->portwidth;
213
Becky Bruce09ce9922009-02-02 16:34:51 -0600214 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100215}
216
217static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
218 unsigned int offset, void *addr)
219{
wdenk5653fc32004-02-08 22:55:38 +0000220}
wdenkbf9e3b32004-02-12 00:47:09 +0000221
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200222/*-----------------------------------------------------------------------
223 * make a proper sized command based on the port and chip widths
224 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200225static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200226{
227 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400228 int cword_offset;
229 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200231 u32 cmd_le = cpu_to_le32(cmd);
232#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400233 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200234 uchar *cp = (uchar *) cmdbuf;
235
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400236 for (i = info->portwidth; i > 0; i--){
237 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400239 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200240 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200241#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400242 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200243 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200244#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200245 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400246 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200247}
248
wdenkbf9e3b32004-02-12 00:47:09 +0000249#ifdef DEBUG
250/*-----------------------------------------------------------------------
251 * Debug support
252 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100253static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000254{
255 int i;
256 char *cp;
257
Wolfgang Denk657f2062009-02-04 09:42:20 +0100258 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000259 for (i = 0; i < 8; i++)
260 sprintf (&str[i * 2], "%2.2x", *cp++);
261}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200262
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100263static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000264{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100265 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000266 int x, y;
267
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100268 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
269 debug("%02x : ", x);
270 for (y = 0; y < 16; y++)
271 debug("%2.2x ", p[x + y]);
272 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000273 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100274 unsigned char c = p[x + y];
275 if (c >= 0x20 && c <= 0x7e)
276 debug("%c", c);
277 else
278 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000279 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100280 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000281 }
282}
wdenkbf9e3b32004-02-12 00:47:09 +0000283#endif
284
285
wdenk5653fc32004-02-08 22:55:38 +0000286/*-----------------------------------------------------------------------
287 * read a character at a port width address
288 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100289static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000290{
291 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000293
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100294 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100296 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000297#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100298 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000299#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100300 flash_unmap (info, 0, offset, cp);
301 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000302}
303
304/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100305 * read a word at a port width address, assume 16bit bus
306 */
307static inline ushort flash_read_word (flash_info_t * info, uint offset)
308{
309 ushort *addr, retval;
310
311 addr = flash_map (info, 0, offset);
312 retval = flash_read16 (addr);
313 flash_unmap (info, 0, offset, addr);
314 return retval;
315}
316
317
318/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100319 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000320 * port size word. Swap for ppc format.
321 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100322static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
323 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000324{
wdenkbf9e3b32004-02-12 00:47:09 +0000325 uchar *addr;
326 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000327
wdenkbf9e3b32004-02-12 00:47:09 +0000328#ifdef DEBUG
329 int x;
330#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100331 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000332
333#ifdef DEBUG
334 debug ("long addr is at %p info->portwidth = %d\n", addr,
335 info->portwidth);
336 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100337 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000338 }
339#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200340#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100341 retval = ((flash_read8(addr) << 16) |
342 (flash_read8(addr + info->portwidth) << 24) |
343 (flash_read8(addr + 2 * info->portwidth)) |
344 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000345#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100346 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
347 (flash_read8(addr + info->portwidth - 1) << 16) |
348 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
349 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000350#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100351 flash_unmap(info, sect, offset, addr);
352
wdenkbf9e3b32004-02-12 00:47:09 +0000353 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000354}
355
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356/*
357 * Write a proper sized command to the correct address
358 */
Stefan Roesefa36ae72009-10-27 15:15:55 +0100359void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
360 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200361{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100362
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100363 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200364 cfiword_t cword;
365
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100366 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200367 flash_make_cmd (info, cmd, &cword);
368 switch (info->portwidth) {
369 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100370 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200371 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100372 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200373 break;
374 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100375 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200376 cmd, cword.w,
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100378 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200379 break;
380 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100381 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200382 cmd, cword.l,
383 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100384 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200385 break;
386 case FLASH_CFI_64BIT:
387#ifdef DEBUG
388 {
389 char str[20];
390
391 print_longlong (str, cword.ll);
392
393 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100394 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200395 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
396 }
397#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100398 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200399 break;
400 }
401
402 /* Ensure all the instructions are fully finished */
403 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100404
405 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200406}
407
408static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
409{
410 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
411 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
412}
413
414/*-----------------------------------------------------------------------
415 */
416static int flash_isequal (flash_info_t * info, flash_sect_t sect,
417 uint offset, uchar cmd)
418{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100419 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200420 cfiword_t cword;
421 int retval;
422
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100423 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200424 flash_make_cmd (info, cmd, &cword);
425
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100426 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200427 switch (info->portwidth) {
428 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100429 debug ("is= %x %x\n", flash_read8(addr), cword.c);
430 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200431 break;
432 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100433 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
434 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200435 break;
436 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700437 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100438 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200439 break;
440 case FLASH_CFI_64BIT:
441#ifdef DEBUG
442 {
443 char str1[20];
444 char str2[20];
445
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100446 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200447 print_longlong (str2, cword.ll);
448 debug ("is= %s %s\n", str1, str2);
449 }
450#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100451 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200452 break;
453 default:
454 retval = 0;
455 break;
456 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100457 flash_unmap(info, sect, offset, addr);
458
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200459 return retval;
460}
461
462/*-----------------------------------------------------------------------
463 */
464static int flash_isset (flash_info_t * info, flash_sect_t sect,
465 uint offset, uchar cmd)
466{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100467 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200468 cfiword_t cword;
469 int retval;
470
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100471 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200472 flash_make_cmd (info, cmd, &cword);
473 switch (info->portwidth) {
474 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100475 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 break;
477 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100478 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100481 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200482 break;
483 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100484 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200485 break;
486 default:
487 retval = 0;
488 break;
489 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100490 flash_unmap(info, sect, offset, addr);
491
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200492 return retval;
493}
494
495/*-----------------------------------------------------------------------
496 */
497static int flash_toggle (flash_info_t * info, flash_sect_t sect,
498 uint offset, uchar cmd)
499{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100500 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200501 cfiword_t cword;
502 int retval;
503
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100504 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200505 flash_make_cmd (info, cmd, &cword);
506 switch (info->portwidth) {
507 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200508 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 break;
510 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200511 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 break;
513 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200514 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200515 break;
516 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100517 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
518 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200519 break;
520 default:
521 retval = 0;
522 break;
523 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100524 flash_unmap(info, sect, offset, addr);
525
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200526 return retval;
527}
528
529/*
530 * flash_is_busy - check to see if the flash is busy
531 *
532 * This routine checks the status of the chip and returns true if the
533 * chip is busy.
534 */
535static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
536{
537 int retval;
538
539 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400540 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 case CFI_CMDSET_INTEL_STANDARD:
542 case CFI_CMDSET_INTEL_EXTENDED:
543 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
544 break;
545 case CFI_CMDSET_AMD_STANDARD:
546 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100547#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200548 case CFI_CMDSET_AMD_LEGACY:
549#endif
550 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
551 break;
552 default:
553 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100554 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200555 debug ("flash_is_busy: %d\n", retval);
556 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100557}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200558
559/*-----------------------------------------------------------------------
560 * wait for XSR.7 to be set. Time out with an error if it does not.
561 * This routine does not set the flash to read-array mode.
562 */
563static int flash_status_check (flash_info_t * info, flash_sect_t sector,
564 ulong tout, char *prompt)
565{
566 ulong start;
567
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200568#if CONFIG_SYS_HZ != 1000
Renato Andreolac40c94a2010-03-24 23:00:47 +0800569 if ((ulong)CONFIG_SYS_HZ > 100000)
570 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
571 else
572 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200573#endif
574
575 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800576 reset_timer();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200577 start = get_timer (0);
578 while (flash_is_busy (info, sector)) {
579 if (get_timer (start) > tout) {
580 printf ("Flash %s timeout at address %lx data %lx\n",
581 prompt, info->start[sector],
582 flash_read_long (info, sector, 0));
583 flash_write_cmd (info, sector, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -0700584 udelay(1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200585 return ERR_TIMOUT;
586 }
587 udelay (1); /* also triggers watchdog */
588 }
589 return ERR_OK;
590}
591
592/*-----------------------------------------------------------------------
593 * Wait for XSR.7 to be set, if it times out print an error, otherwise
594 * do a full status check.
595 *
596 * This routine sets the flash to read-array mode.
597 */
598static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
599 ulong tout, char *prompt)
600{
601 int retcode;
602
603 retcode = flash_status_check (info, sector, tout, prompt);
604 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400605 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200606 case CFI_CMDSET_INTEL_EXTENDED:
607 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500608 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200609 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
610 retcode = ERR_INVAL;
611 printf ("Flash %s error at address %lx\n", prompt,
612 info->start[sector]);
613 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
614 FLASH_STATUS_PSLBS)) {
615 puts ("Command Sequence Error.\n");
616 } else if (flash_isset (info, sector, 0,
617 FLASH_STATUS_ECLBS)) {
618 puts ("Block Erase Error.\n");
619 retcode = ERR_NOT_ERASED;
620 } else if (flash_isset (info, sector, 0,
621 FLASH_STATUS_PSLBS)) {
622 puts ("Locking Error\n");
623 }
624 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
625 puts ("Block locked.\n");
626 retcode = ERR_PROTECTED;
627 }
628 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
629 puts ("Vpp Low Error.\n");
630 }
631 flash_write_cmd (info, sector, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -0700632 udelay(1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200633 break;
634 default:
635 break;
636 }
637 return retcode;
638}
639
Thomas Choue5720822010-03-26 08:17:00 +0800640static int use_flash_status_poll(flash_info_t *info)
641{
642#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
643 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
644 info->vendor == CFI_CMDSET_AMD_STANDARD)
645 return 1;
646#endif
647 return 0;
648}
649
650static int flash_status_poll(flash_info_t *info, void *src, void *dst,
651 ulong tout, char *prompt)
652{
653#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
654 ulong start;
655 int ready;
656
657#if CONFIG_SYS_HZ != 1000
658 if ((ulong)CONFIG_SYS_HZ > 100000)
659 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
660 else
661 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
662#endif
663
664 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800665 reset_timer();
Thomas Choue5720822010-03-26 08:17:00 +0800666 start = get_timer(0);
667 while (1) {
668 switch (info->portwidth) {
669 case FLASH_CFI_8BIT:
670 ready = flash_read8(dst) == flash_read8(src);
671 break;
672 case FLASH_CFI_16BIT:
673 ready = flash_read16(dst) == flash_read16(src);
674 break;
675 case FLASH_CFI_32BIT:
676 ready = flash_read32(dst) == flash_read32(src);
677 break;
678 case FLASH_CFI_64BIT:
679 ready = flash_read64(dst) == flash_read64(src);
680 break;
681 default:
682 ready = 0;
683 break;
684 }
685 if (ready)
686 break;
687 if (get_timer(start) > tout) {
688 printf("Flash %s timeout at address %lx data %lx\n",
689 prompt, (ulong)dst, (ulong)flash_read8(dst));
690 return ERR_TIMOUT;
691 }
692 udelay(1); /* also triggers watchdog */
693 }
694#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
695 return ERR_OK;
696}
697
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200698/*-----------------------------------------------------------------------
699 */
700static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
701{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200702#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200703 unsigned short w;
704 unsigned int l;
705 unsigned long long ll;
706#endif
707
708 switch (info->portwidth) {
709 case FLASH_CFI_8BIT:
710 cword->c = c;
711 break;
712 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200713#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200714 w = c;
715 w <<= 8;
716 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100717#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200718 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100719#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200720 break;
721 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200722#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200723 l = c;
724 l <<= 24;
725 cword->l = (cword->l >> 8) | l;
726#else
727 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200728#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200729 break;
730 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200731#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200732 ll = c;
733 ll <<= 56;
734 cword->ll = (cword->ll >> 8) | ll;
735#else
736 cword->ll = (cword->ll << 8) | c;
737#endif
738 break;
wdenk5653fc32004-02-08 22:55:38 +0000739 }
wdenk5653fc32004-02-08 22:55:38 +0000740}
741
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100742/*
743 * Loop through the sector table starting from the previously found sector.
744 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000745 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200746static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000747{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100748 static flash_sect_t saved_sector = 0; /* previously found sector */
Martin Krauseaf567302011-03-21 18:07:56 +0100749 static flash_info_t *saved_info = 0; /* previously used flash bank */
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100750 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000751
Martin Krauseaf567302011-03-21 18:07:56 +0100752 if ((info != saved_info) || (sector >= info->sector_count))
753 sector = 0;
754
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100755 while ((info->start[sector] < addr)
756 && (sector < info->sector_count - 1))
757 sector++;
758 while ((info->start[sector] > addr) && (sector > 0))
759 /*
760 * also decrements the sector in case of an overshot
761 * in the first loop
762 */
763 sector--;
764
765 saved_sector = sector;
Martin Krauseaf567302011-03-21 18:07:56 +0100766 saved_info = info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200767 return sector;
wdenk7680c142005-05-16 15:23:22 +0000768}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200769
770/*-----------------------------------------------------------------------
771 */
772static int flash_write_cfiword (flash_info_t * info, ulong dest,
773 cfiword_t cword)
774{
Becky Bruce09ce9922009-02-02 16:34:51 -0600775 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200776 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100777 flash_sect_t sect = 0;
778 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200779
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200780 /* Check if Flash is (sufficiently) erased */
781 switch (info->portwidth) {
782 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100783 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200784 break;
785 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100786 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200787 break;
788 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100789 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200790 break;
791 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100792 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200793 break;
794 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100795 flag = 0;
796 break;
797 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600798 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100799 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200800
801 /* Disable interrupts which might cause a timeout here */
802 flag = disable_interrupts ();
803
804 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400805 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200806 case CFI_CMDSET_INTEL_EXTENDED:
807 case CFI_CMDSET_INTEL_STANDARD:
808 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
809 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
810 break;
811 case CFI_CMDSET_AMD_EXTENDED:
812 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500813 sect = find_sector(info, dest);
814 flash_unlock_seq (info, sect);
815 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100816 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200817 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800818#ifdef CONFIG_FLASH_CFI_LEGACY
819 case CFI_CMDSET_AMD_LEGACY:
820 sect = find_sector(info, dest);
821 flash_unlock_seq (info, 0);
822 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
823 sect_found = 1;
824 break;
825#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200826 }
827
828 switch (info->portwidth) {
829 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100830 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200831 break;
832 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100833 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200834 break;
835 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100836 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200837 break;
838 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100839 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200840 break;
841 }
842
843 /* re-enable interrupts if necessary */
844 if (flag)
845 enable_interrupts ();
846
Jens Gehrleina7292872008-12-16 17:25:54 +0100847 if (!sect_found)
848 sect = find_sector (info, dest);
849
Thomas Choue5720822010-03-26 08:17:00 +0800850 if (use_flash_status_poll(info))
851 return flash_status_poll(info, &cword, dstaddr,
852 info->write_tout, "write");
853 else
854 return flash_full_status_check(info, sect,
855 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200856}
857
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200858#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200859
860static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
861 int len)
862{
863 flash_sect_t sector;
864 int cnt;
865 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100866 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100867 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100868 void *dst2 = dst;
869 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200870 uint offset = 0;
871 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400872 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100873
Stefan Roese0dc80e22007-12-27 07:50:54 +0100874 switch (info->portwidth) {
875 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200876 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100877 break;
878 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200879 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100880 break;
881 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200882 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100883 break;
884 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200885 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100886 break;
887 default:
888 retcode = ERR_INVAL;
889 goto out_unmap;
890 }
891
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200892 cnt = len >> shift;
893
Stefan Roese0dc80e22007-12-27 07:50:54 +0100894 while ((cnt-- > 0) && (flag == 0)) {
895 switch (info->portwidth) {
896 case FLASH_CFI_8BIT:
897 flag = ((flash_read8(dst2) & flash_read8(src)) ==
898 flash_read8(src));
899 src += 1, dst2 += 1;
900 break;
901 case FLASH_CFI_16BIT:
902 flag = ((flash_read16(dst2) & flash_read16(src)) ==
903 flash_read16(src));
904 src += 2, dst2 += 2;
905 break;
906 case FLASH_CFI_32BIT:
907 flag = ((flash_read32(dst2) & flash_read32(src)) ==
908 flash_read32(src));
909 src += 4, dst2 += 4;
910 break;
911 case FLASH_CFI_64BIT:
912 flag = ((flash_read64(dst2) & flash_read64(src)) ==
913 flash_read64(src));
914 src += 8, dst2 += 8;
915 break;
916 }
917 }
918 if (!flag) {
919 retcode = ERR_NOT_ERASED;
920 goto out_unmap;
921 }
922
923 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100924 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200925
926 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400927 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200928 case CFI_CMDSET_INTEL_STANDARD:
929 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400930 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
931 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200932 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400933 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
934 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200935 retcode = flash_status_check (info, sector,
936 info->buffer_write_tout,
937 "write to buffer");
938 if (retcode == ERR_OK) {
939 /* reduce the number of loops by the width of
940 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200941 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400942 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200943 while (cnt-- > 0) {
944 switch (info->portwidth) {
945 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100946 flash_write8(flash_read8(src), dst);
947 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200948 break;
949 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100950 flash_write16(flash_read16(src), dst);
951 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200952 break;
953 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100954 flash_write32(flash_read32(src), dst);
955 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200956 break;
957 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100958 flash_write64(flash_read64(src), dst);
959 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200960 break;
961 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100962 retcode = ERR_INVAL;
963 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200964 }
965 }
966 flash_write_cmd (info, sector, 0,
967 FLASH_CMD_WRITE_BUFFER_CONFIRM);
968 retcode = flash_full_status_check (
969 info, sector, info->buffer_write_tout,
970 "buffer write");
971 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100972
973 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200974
975 case CFI_CMDSET_AMD_STANDARD:
976 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200977 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200978
979#ifdef CONFIG_FLASH_SPANSION_S29WS_N
980 offset = ((unsigned long)dst - info->start[sector]) >> shift;
981#endif
982 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
983 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -0500984 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200985
986 switch (info->portwidth) {
987 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100988 while (cnt-- > 0) {
989 flash_write8(flash_read8(src), dst);
990 src += 1, dst += 1;
991 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200992 break;
993 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100994 while (cnt-- > 0) {
995 flash_write16(flash_read16(src), dst);
996 src += 2, dst += 2;
997 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200998 break;
999 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001000 while (cnt-- > 0) {
1001 flash_write32(flash_read32(src), dst);
1002 src += 4, dst += 4;
1003 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001004 break;
1005 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001006 while (cnt-- > 0) {
1007 flash_write64(flash_read64(src), dst);
1008 src += 8, dst += 8;
1009 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001010 break;
1011 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001012 retcode = ERR_INVAL;
1013 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001014 }
1015
1016 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +08001017 if (use_flash_status_poll(info))
1018 retcode = flash_status_poll(info, src - (1 << shift),
1019 dst - (1 << shift),
1020 info->buffer_write_tout,
1021 "buffer write");
1022 else
1023 retcode = flash_full_status_check(info, sector,
1024 info->buffer_write_tout,
1025 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001026 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001027
1028 default:
1029 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001030 retcode = ERR_INVAL;
1031 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001032 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001033
1034out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001035 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001036}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001037#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001038
wdenk7680c142005-05-16 15:23:22 +00001039
1040/*-----------------------------------------------------------------------
1041 */
wdenkbf9e3b32004-02-12 00:47:09 +00001042int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001043{
1044 int rcode = 0;
1045 int prot;
1046 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001047 int st;
wdenk5653fc32004-02-08 22:55:38 +00001048
wdenkbf9e3b32004-02-12 00:47:09 +00001049 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001050 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001051 return 1;
1052 }
1053 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001054 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001055 return 1;
1056 }
1057
1058 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001059 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001060 if (info->protect[sect]) {
1061 prot++;
1062 }
1063 }
1064 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001065 printf ("- Warning: %d protected sectors will not be erased!\n",
1066 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001067 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001068 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001069 }
1070
1071
wdenkbf9e3b32004-02-12 00:47:09 +00001072 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001073 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001074 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001075 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001076 case CFI_CMDSET_INTEL_STANDARD:
1077 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001078 flash_write_cmd (info, sect, 0,
1079 FLASH_CMD_CLEAR_STATUS);
1080 flash_write_cmd (info, sect, 0,
1081 FLASH_CMD_BLOCK_ERASE);
1082 flash_write_cmd (info, sect, 0,
1083 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001084 break;
1085 case CFI_CMDSET_AMD_STANDARD:
1086 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001087 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001088 flash_write_cmd (info, sect,
1089 info->addr_unlock1,
1090 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001091 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001092 flash_write_cmd (info, sect, 0,
1093 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001094 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001095#ifdef CONFIG_FLASH_CFI_LEGACY
1096 case CFI_CMDSET_AMD_LEGACY:
1097 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001098 flash_write_cmd (info, 0, info->addr_unlock1,
1099 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001100 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001101 flash_write_cmd (info, sect, 0,
1102 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001103 break;
1104#endif
wdenk5653fc32004-02-08 22:55:38 +00001105 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001106 debug ("Unkown flash vendor %d\n",
1107 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001108 break;
1109 }
1110
Thomas Choue5720822010-03-26 08:17:00 +08001111 if (use_flash_status_poll(info)) {
1112 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1113 void *dest;
1114 dest = flash_map(info, sect, 0);
1115 st = flash_status_poll(info, &cword, dest,
1116 info->erase_blk_tout, "erase");
1117 flash_unmap(info, sect, 0, dest);
1118 } else
1119 st = flash_full_status_check(info, sect,
1120 info->erase_blk_tout,
1121 "erase");
1122 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001123 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001124 else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001125 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001126 }
1127 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001128
1129 if (flash_verbose)
1130 puts (" done\n");
1131
wdenk5653fc32004-02-08 22:55:38 +00001132 return rcode;
1133}
1134
Stefan Roese70084df2010-08-13 09:36:36 +02001135#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1136static int sector_erased(flash_info_t *info, int i)
1137{
1138 int k;
1139 int size;
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001140 u32 *flash;
Stefan Roese70084df2010-08-13 09:36:36 +02001141
1142 /*
1143 * Check if whole sector is erased
1144 */
1145 size = flash_sector_size(info, i);
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001146 flash = (u32 *)info->start[i];
Stefan Roese70084df2010-08-13 09:36:36 +02001147 /* divide by 4 for longword access */
1148 size = size >> 2;
1149
1150 for (k = 0; k < size; k++) {
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001151 if (flash_read32(flash++) != 0xffffffff)
Stefan Roese70084df2010-08-13 09:36:36 +02001152 return 0; /* not erased */
1153 }
1154
1155 return 1; /* erased */
1156}
1157#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1158
wdenkbf9e3b32004-02-12 00:47:09 +00001159void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001160{
1161 int i;
1162
1163 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001164 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001165 return;
1166 }
1167
Peter Tysereddf52b2010-12-28 18:12:05 -06001168 printf ("%s flash (%d x %d)",
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001169 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001170 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001171 if (info->size < 1024*1024)
1172 printf (" Size: %ld kB in %d Sectors\n",
1173 info->size >> 10, info->sector_count);
1174 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001175 printf (" Size: %ld MB in %d Sectors\n",
1176 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001177 printf (" ");
1178 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001179 case CFI_CMDSET_INTEL_PROG_REGIONS:
1180 printf ("Intel Prog Regions");
1181 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001182 case CFI_CMDSET_INTEL_STANDARD:
1183 printf ("Intel Standard");
1184 break;
1185 case CFI_CMDSET_INTEL_EXTENDED:
1186 printf ("Intel Extended");
1187 break;
1188 case CFI_CMDSET_AMD_STANDARD:
1189 printf ("AMD Standard");
1190 break;
1191 case CFI_CMDSET_AMD_EXTENDED:
1192 printf ("AMD Extended");
1193 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001194#ifdef CONFIG_FLASH_CFI_LEGACY
1195 case CFI_CMDSET_AMD_LEGACY:
1196 printf ("AMD Legacy");
1197 break;
1198#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001199 default:
1200 printf ("Unknown (%d)", info->vendor);
1201 break;
1202 }
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001203 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1204 info->manufacturer_id);
1205 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1206 info->device_id);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001207 if ((info->device_id & 0xff) == 0x7E) {
1208 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1209 info->device_id2);
Stefan Roese260421a2006-11-13 13:55:24 +01001210 }
1211 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001212 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001213 info->write_tout);
1214 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001215 printf (" Buffer write timeout: %ld ms, "
1216 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001217 info->buffer_write_tout,
1218 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001219 }
wdenk5653fc32004-02-08 22:55:38 +00001220
Stefan Roese260421a2006-11-13 13:55:24 +01001221 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001222 for (i = 0; i < info->sector_count; ++i) {
Kim Phillips2e973942010-07-26 18:35:39 -05001223 if (ctrlc())
Stefan Roese70084df2010-08-13 09:36:36 +02001224 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001225 if ((i % 5) == 0)
Stefan Roese70084df2010-08-13 09:36:36 +02001226 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001227#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001228 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001229 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001230 info->start[i],
Stefan Roese70084df2010-08-13 09:36:36 +02001231 sector_erased(info, i) ? 'E' : ' ',
Stefan Roese260421a2006-11-13 13:55:24 +01001232 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001233#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001234 printf (" %08lX %s ",
1235 info->start[i],
1236 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001237#endif
1238 }
wdenk4b9206e2004-03-23 22:14:11 +00001239 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001240 return;
1241}
1242
1243/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001244 * This is used in a few places in write_buf() to show programming
1245 * progress. Making it a function is nasty because it needs to do side
1246 * effect updates to digit and dots. Repeated code is nasty too, so
1247 * we define it once here.
1248 */
Stefan Roesef0105722008-03-19 07:09:26 +01001249#ifdef CONFIG_FLASH_SHOW_PROGRESS
1250#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001251 if (flash_verbose) { \
1252 dots -= dots_sub; \
1253 if ((scale > 0) && (dots <= 0)) { \
1254 if ((digit % 5) == 0) \
1255 printf ("%d", digit / 5); \
1256 else \
1257 putc ('.'); \
1258 digit--; \
1259 dots += scale; \
1260 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001261 }
Stefan Roesef0105722008-03-19 07:09:26 +01001262#else
1263#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1264#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001265
1266/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001267 * Copy memory to flash, returns:
1268 * 0 - OK
1269 * 1 - write timeout
1270 * 2 - Flash not erased
1271 */
wdenkbf9e3b32004-02-12 00:47:09 +00001272int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001273{
1274 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001275 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001276 int aln;
1277 cfiword_t cword;
1278 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001279#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001280 int buffered_size;
1281#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001282#ifdef CONFIG_FLASH_SHOW_PROGRESS
1283 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1284 int scale = 0;
1285 int dots = 0;
1286
1287 /*
1288 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1289 */
1290 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1291 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1292 CONFIG_FLASH_SHOW_PROGRESS);
1293 }
1294#endif
1295
wdenkbf9e3b32004-02-12 00:47:09 +00001296 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001297 wp = (addr & ~(info->portwidth - 1));
1298
1299 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001300 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001301 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001302 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001303 for (i = 0; i < aln; ++i)
1304 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001305
wdenkbf9e3b32004-02-12 00:47:09 +00001306 for (; (i < info->portwidth) && (cnt > 0); i++) {
1307 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001308 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001309 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001310 for (; (cnt == 0) && (i < info->portwidth); ++i)
1311 flash_add_byte (info, &cword, flash_read8(p + i));
1312
1313 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001314 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001315 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001316
1317 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001318 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001319 }
1320
wdenkbf9e3b32004-02-12 00:47:09 +00001321 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001322#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001323 buffered_size = (info->portwidth / info->chipwidth);
1324 buffered_size *= info->buffer_size;
1325 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001326 /* prohibit buffer write when buffer_size is 1 */
1327 if (info->buffer_size == 1) {
1328 cword.l = 0;
1329 for (i = 0; i < info->portwidth; i++)
1330 flash_add_byte (info, &cword, *src++);
1331 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1332 return rc;
1333 wp += info->portwidth;
1334 cnt -= info->portwidth;
1335 continue;
1336 }
1337
1338 /* write buffer until next buffered_size aligned boundary */
1339 i = buffered_size - (wp % buffered_size);
1340 if (i > cnt)
1341 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001342 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001343 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001344 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001345 wp += i;
1346 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001347 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001348 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001349 }
1350#else
wdenkbf9e3b32004-02-12 00:47:09 +00001351 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001352 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001353 for (i = 0; i < info->portwidth; i++) {
1354 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001355 }
wdenkbf9e3b32004-02-12 00:47:09 +00001356 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001357 return rc;
1358 wp += info->portwidth;
1359 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001360 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001361 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001362#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001363
wdenk5653fc32004-02-08 22:55:38 +00001364 if (cnt == 0) {
1365 return (0);
1366 }
1367
1368 /*
1369 * handle unaligned tail bytes
1370 */
1371 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001372 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001373 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001374 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001375 --cnt;
1376 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001377 for (; i < info->portwidth; ++i)
1378 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001379
wdenkbf9e3b32004-02-12 00:47:09 +00001380 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001381}
1382
1383/*-----------------------------------------------------------------------
1384 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001385#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001386
wdenkbf9e3b32004-02-12 00:47:09 +00001387int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001388{
1389 int retcode = 0;
1390
Rafael Camposbc9019e2008-07-31 10:22:20 +02001391 switch (info->vendor) {
1392 case CFI_CMDSET_INTEL_PROG_REGIONS:
1393 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001394 case CFI_CMDSET_INTEL_EXTENDED:
Philippe De Muyter54652992010-08-17 18:40:25 +02001395 /*
1396 * see errata called
1397 * "Numonyx Axcell P33/P30 Specification Update" :)
1398 */
1399 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1400 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1401 prot)) {
1402 /*
1403 * cmd must come before FLASH_CMD_PROTECT + 20us
1404 * Disable interrupts which might cause a timeout here.
1405 */
1406 int flag = disable_interrupts ();
1407 unsigned short cmd;
1408
1409 if (prot)
1410 cmd = FLASH_CMD_PROTECT_SET;
1411 else
1412 cmd = FLASH_CMD_PROTECT_CLEAR;
1413
Rafael Camposbc9019e2008-07-31 10:22:20 +02001414 flash_write_cmd (info, sector, 0,
Philippe De Muyter54652992010-08-17 18:40:25 +02001415 FLASH_CMD_PROTECT);
1416 flash_write_cmd (info, sector, 0, cmd);
1417 /* re-enable interrupts if necessary */
1418 if (flag)
1419 enable_interrupts ();
1420 }
Rafael Camposbc9019e2008-07-31 10:22:20 +02001421 break;
1422 case CFI_CMDSET_AMD_EXTENDED:
1423 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001424 /* U-Boot only checks the first byte */
1425 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1426 if (prot) {
1427 flash_unlock_seq (info, 0);
1428 flash_write_cmd (info, 0,
1429 info->addr_unlock1,
1430 ATM_CMD_SOFTLOCK_START);
1431 flash_unlock_seq (info, 0);
1432 flash_write_cmd (info, sector, 0,
1433 ATM_CMD_LOCK_SECT);
1434 } else {
1435 flash_write_cmd (info, 0,
1436 info->addr_unlock1,
1437 AMD_CMD_UNLOCK_START);
1438 if (info->device_id == ATM_ID_BV6416)
1439 flash_write_cmd (info, sector,
1440 0, ATM_CMD_UNLOCK_SECT);
1441 }
1442 }
1443 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001444#ifdef CONFIG_FLASH_CFI_LEGACY
1445 case CFI_CMDSET_AMD_LEGACY:
1446 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1447 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1448 if (prot)
1449 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1450 else
1451 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1452#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001453 };
wdenk5653fc32004-02-08 22:55:38 +00001454
Stefan Roesedf4e8132010-10-25 18:31:29 +02001455 /*
1456 * Flash needs to be in status register read mode for
1457 * flash_full_status_check() to work correctly
1458 */
1459 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
wdenkbf9e3b32004-02-12 00:47:09 +00001460 if ((retcode =
1461 flash_full_status_check (info, sector, info->erase_blk_tout,
1462 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001463
1464 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001465
1466 /*
1467 * On some of Intel's flash chips (marked via legacy_unlock)
1468 * unprotect unprotects all locking.
1469 */
1470 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001471 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001472
1473 for (i = 0; i < info->sector_count; i++) {
1474 if (info->protect[i])
1475 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001476 }
1477 }
1478 }
wdenk5653fc32004-02-08 22:55:38 +00001479 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001480}
1481
wdenk5653fc32004-02-08 22:55:38 +00001482/*-----------------------------------------------------------------------
1483 * flash_read_user_serial - read the OneTimeProgramming cells
1484 */
wdenkbf9e3b32004-02-12 00:47:09 +00001485void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1486 int len)
wdenk5653fc32004-02-08 22:55:38 +00001487{
wdenkbf9e3b32004-02-12 00:47:09 +00001488 uchar *src;
1489 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001490
1491 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001492 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001493 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1494 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001495 flash_write_cmd (info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001496 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001497 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001498}
wdenkbf9e3b32004-02-12 00:47:09 +00001499
wdenk5653fc32004-02-08 22:55:38 +00001500/*
1501 * flash_read_factory_serial - read the device Id from the protection area
1502 */
wdenkbf9e3b32004-02-12 00:47:09 +00001503void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1504 int len)
wdenk5653fc32004-02-08 22:55:38 +00001505{
wdenkbf9e3b32004-02-12 00:47:09 +00001506 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001507
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001508 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001509 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1510 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001511 flash_write_cmd (info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001512 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001513 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001514}
1515
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001516#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001517
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001518/*-----------------------------------------------------------------------
1519 * Reverse the order of the erase regions in the CFI QRY structure.
1520 * This is needed for chips that are either a) correctly detected as
1521 * top-boot, or b) buggy.
1522 */
1523static void cfi_reverse_geometry(struct cfi_qry *qry)
1524{
1525 unsigned int i, j;
1526 u32 tmp;
1527
1528 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1529 tmp = qry->erase_region_info[i];
1530 qry->erase_region_info[i] = qry->erase_region_info[j];
1531 qry->erase_region_info[j] = tmp;
1532 }
1533}
wdenk5653fc32004-02-08 22:55:38 +00001534
1535/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001536 * read jedec ids from device and set corresponding fields in info struct
1537 *
1538 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1539 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001540 */
1541static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1542{
1543 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001544 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001545 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1546 udelay(1000); /* some flash are slow to respond */
1547 info->manufacturer_id = flash_read_uchar (info,
1548 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001549 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1550 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1551 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001552 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1553}
1554
1555static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1556{
1557 info->cmd_reset = FLASH_CMD_RESET;
1558
1559 cmdset_intel_read_jedec_ids(info);
1560 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1561
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001562#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001563 /* read legacy lock/unlock bit from intel flash */
1564 if (info->ext_addr) {
1565 info->legacy_unlock = flash_read_uchar (info,
1566 info->ext_addr + 5) & 0x08;
1567 }
1568#endif
1569
1570 return 0;
1571}
1572
1573static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1574{
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001575 ushort bankId = 0;
1576 uchar manuId;
1577
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001578 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1579 flash_unlock_seq(info, 0);
1580 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1581 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001582
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001583 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1584 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1585 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1586 bankId += 0x100;
1587 manuId = flash_read_uchar (info,
1588 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1589 }
1590 info->manufacturer_id = manuId;
Tor Krill90447ec2008-03-28 11:29:10 +01001591
1592 switch (info->chipwidth){
1593 case FLASH_CFI_8BIT:
1594 info->device_id = flash_read_uchar (info,
1595 FLASH_OFFSET_DEVICE_ID);
1596 if (info->device_id == 0x7E) {
1597 /* AMD 3-byte (expanded) device ids */
1598 info->device_id2 = flash_read_uchar (info,
1599 FLASH_OFFSET_DEVICE_ID2);
1600 info->device_id2 <<= 8;
1601 info->device_id2 |= flash_read_uchar (info,
1602 FLASH_OFFSET_DEVICE_ID3);
1603 }
1604 break;
1605 case FLASH_CFI_16BIT:
1606 info->device_id = flash_read_word (info,
1607 FLASH_OFFSET_DEVICE_ID);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001608 if ((info->device_id & 0xff) == 0x7E) {
1609 /* AMD 3-byte (expanded) device ids */
1610 info->device_id2 = flash_read_uchar (info,
1611 FLASH_OFFSET_DEVICE_ID2);
1612 info->device_id2 <<= 8;
1613 info->device_id2 |= flash_read_uchar (info,
1614 FLASH_OFFSET_DEVICE_ID3);
1615 }
Tor Krill90447ec2008-03-28 11:29:10 +01001616 break;
1617 default:
1618 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001619 }
1620 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001621 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001622}
1623
1624static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1625{
1626 info->cmd_reset = AMD_CMD_RESET;
1627
1628 cmdset_amd_read_jedec_ids(info);
1629 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1630
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001631 return 0;
1632}
1633
1634#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001635static void flash_read_jedec_ids (flash_info_t * info)
1636{
1637 info->manufacturer_id = 0;
1638 info->device_id = 0;
1639 info->device_id2 = 0;
1640
1641 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001642 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001643 case CFI_CMDSET_INTEL_STANDARD:
1644 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001645 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001646 break;
1647 case CFI_CMDSET_AMD_STANDARD:
1648 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001649 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001650 break;
1651 default:
1652 break;
1653 }
1654}
1655
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001656/*-----------------------------------------------------------------------
1657 * Call board code to request info about non-CFI flash.
1658 * board_flash_get_legacy needs to fill in at least:
1659 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1660 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001661static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001662{
1663 flash_info_t *info = &flash_info[banknum];
1664
1665 if (board_flash_get_legacy(base, banknum, info)) {
1666 /* board code may have filled info completely. If not, we
1667 use JEDEC ID probing. */
1668 if (!info->vendor) {
1669 int modes[] = {
1670 CFI_CMDSET_AMD_STANDARD,
1671 CFI_CMDSET_INTEL_STANDARD
1672 };
1673 int i;
1674
1675 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1676 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001677 info->start[0] =
1678 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001679 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001680 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001681 if (info->portwidth == FLASH_CFI_8BIT
1682 && info->interface == FLASH_CFI_X8X16) {
1683 info->addr_unlock1 = 0x2AAA;
1684 info->addr_unlock2 = 0x5555;
1685 } else {
1686 info->addr_unlock1 = 0x5555;
1687 info->addr_unlock2 = 0x2AAA;
1688 }
1689 flash_read_jedec_ids(info);
1690 debug("JEDEC PROBE: ID %x %x %x\n",
1691 info->manufacturer_id,
1692 info->device_id,
1693 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001694 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001695 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001696 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001697 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001698 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001699 }
1700 }
1701
1702 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001703 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001704 case CFI_CMDSET_INTEL_STANDARD:
1705 case CFI_CMDSET_INTEL_EXTENDED:
1706 info->cmd_reset = FLASH_CMD_RESET;
1707 break;
1708 case CFI_CMDSET_AMD_STANDARD:
1709 case CFI_CMDSET_AMD_EXTENDED:
1710 case CFI_CMDSET_AMD_LEGACY:
1711 info->cmd_reset = AMD_CMD_RESET;
1712 break;
1713 }
1714 info->flash_id = FLASH_MAN_CFI;
1715 return 1;
1716 }
1717 return 0; /* use CFI */
1718}
1719#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001720static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001721{
1722 return 0; /* use CFI */
1723}
1724#endif
1725
Stefan Roese260421a2006-11-13 13:55:24 +01001726/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001727 * detect if flash is compatible with the Common Flash Interface (CFI)
1728 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001729 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001730static void flash_read_cfi (flash_info_t *info, void *buf,
1731 unsigned int start, size_t len)
1732{
1733 u8 *p = buf;
1734 unsigned int i;
1735
1736 for (i = 0; i < len; i++)
1737 p[i] = flash_read_uchar(info, start + i);
1738}
1739
Stefan Roesefa36ae72009-10-27 15:15:55 +01001740void __flash_cmd_reset(flash_info_t *info)
1741{
1742 /*
1743 * We do not yet know what kind of commandset to use, so we issue
1744 * the reset command in both Intel and AMD variants, in the hope
1745 * that AMD flash roms ignore the Intel command.
1746 */
1747 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001748 udelay(1);
Stefan Roesefa36ae72009-10-27 15:15:55 +01001749 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1750}
1751void flash_cmd_reset(flash_info_t *info)
1752 __attribute__((weak,alias("__flash_cmd_reset")));
1753
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001754static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001755{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001756 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001757
Stefan Roesefa36ae72009-10-27 15:15:55 +01001758 /* Issue FLASH reset command */
1759 flash_cmd_reset(info);
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001760
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001761 for (cfi_offset=0;
1762 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1763 cfi_offset++) {
1764 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1765 FLASH_CMD_CFI);
1766 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1767 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1768 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001769 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1770 sizeof(struct cfi_qry));
1771 info->interface = le16_to_cpu(qry->interface_desc);
1772
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001773 info->cfi_offset = flash_offset_cfi[cfi_offset];
1774 debug ("device interface is %d\n",
1775 info->interface);
1776 debug ("found port %d chip %d ",
1777 info->portwidth, info->chipwidth);
1778 debug ("port %d bits chip %d bits\n",
1779 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1780 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1781
1782 /* calculate command offsets as in the Linux driver */
1783 info->addr_unlock1 = 0x555;
1784 info->addr_unlock2 = 0x2aa;
1785
1786 /*
1787 * modify the unlock address if we are
1788 * in compatibility mode
1789 */
1790 if ( /* x8/x16 in x8 mode */
1791 ((info->chipwidth == FLASH_CFI_BY8) &&
1792 (info->interface == FLASH_CFI_X8X16)) ||
1793 /* x16/x32 in x16 mode */
1794 ((info->chipwidth == FLASH_CFI_BY16) &&
1795 (info->interface == FLASH_CFI_X16X32)))
1796 {
1797 info->addr_unlock1 = 0xaaa;
1798 info->addr_unlock2 = 0x555;
1799 }
1800
1801 info->name = "CFI conformant";
1802 return 1;
1803 }
1804 }
1805
1806 return 0;
1807}
1808
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001809static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001810{
wdenkbf9e3b32004-02-12 00:47:09 +00001811 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001812
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001813 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001814 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1815 for (info->chipwidth = FLASH_CFI_BY8;
1816 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001817 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001818 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001819 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001820 }
wdenkbf9e3b32004-02-12 00:47:09 +00001821 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001822 return 0;
1823}
wdenkbf9e3b32004-02-12 00:47:09 +00001824
wdenk5653fc32004-02-08 22:55:38 +00001825/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001826 * Manufacturer-specific quirks. Add workarounds for geometry
1827 * reversal, etc. here.
1828 */
1829static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1830{
1831 /* check if flash geometry needs reversal */
1832 if (qry->num_erase_regions > 1) {
1833 /* reverse geometry if top boot part */
1834 if (info->cfi_version < 0x3131) {
1835 /* CFI < 1.1, try to guess from device id */
1836 if ((info->device_id & 0x80) != 0)
1837 cfi_reverse_geometry(qry);
1838 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1839 /* CFI >= 1.1, deduct from top/bottom flag */
1840 /* note: ext_addr is valid since cfi_version > 0 */
1841 cfi_reverse_geometry(qry);
1842 }
1843 }
1844}
1845
1846static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1847{
1848 int reverse_geometry = 0;
1849
1850 /* Check the "top boot" bit in the PRI */
1851 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1852 reverse_geometry = 1;
1853
1854 /* AT49BV6416(T) list the erase regions in the wrong order.
1855 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001856 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001857 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001858 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1859 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001860
1861 if (reverse_geometry)
1862 cfi_reverse_geometry(qry);
1863}
1864
Richard Retanubune8eac432009-01-14 08:44:26 -05001865static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1866{
1867 /* check if flash geometry needs reversal */
1868 if (qry->num_erase_regions > 1) {
1869 /* reverse geometry if top boot part */
1870 if (info->cfi_version < 0x3131) {
Mike Frysinger6a011ce2011-04-10 16:06:29 -04001871 /* CFI < 1.1, guess by device id */
1872 if (info->device_id == 0x22CA || /* M29W320DT */
1873 info->device_id == 0x2256 || /* M29W320ET */
1874 info->device_id == 0x22D7) { /* M29W800DT */
Richard Retanubune8eac432009-01-14 08:44:26 -05001875 cfi_reverse_geometry(qry);
1876 }
Mike Frysinger4c2105c2011-05-09 18:33:36 -04001877 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1878 /* CFI >= 1.1, deduct from top/bottom flag */
1879 /* note: ext_addr is valid since cfi_version > 0 */
1880 cfi_reverse_geometry(qry);
Richard Retanubune8eac432009-01-14 08:44:26 -05001881 }
1882 }
1883}
1884
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001885/*
wdenk5653fc32004-02-08 22:55:38 +00001886 * The following code cannot be run from FLASH!
1887 *
1888 */
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001889ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001890{
wdenkbf9e3b32004-02-12 00:47:09 +00001891 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001892 int i, j;
1893 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001894 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001895 unsigned long tmp;
1896 int size_ratio;
1897 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001898 int erase_region_size;
1899 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001900 struct cfi_qry qry;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001901 unsigned long max_size;
Stefan Roese260421a2006-11-13 13:55:24 +01001902
Kumar Galaf9796902008-05-15 15:13:08 -05001903 memset(&qry, 0, sizeof(qry));
1904
Stefan Roese260421a2006-11-13 13:55:24 +01001905 info->ext_addr = 0;
1906 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001907#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001908 info->legacy_unlock = 0;
1909#endif
wdenk5653fc32004-02-08 22:55:38 +00001910
Becky Bruce09ce9922009-02-02 16:34:51 -06001911 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001912
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001913 if (flash_detect_cfi (info, &qry)) {
1914 info->vendor = le16_to_cpu(qry.p_id);
1915 info->ext_addr = le16_to_cpu(qry.p_adr);
1916 num_erase_regions = qry.num_erase_regions;
1917
Stefan Roese260421a2006-11-13 13:55:24 +01001918 if (info->ext_addr) {
1919 info->cfi_version = (ushort) flash_read_uchar (info,
1920 info->ext_addr + 3) << 8;
1921 info->cfi_version |= (ushort) flash_read_uchar (info,
1922 info->ext_addr + 4);
1923 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001924
wdenkbf9e3b32004-02-12 00:47:09 +00001925#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001926 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001927#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001928
wdenkbf9e3b32004-02-12 00:47:09 +00001929 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001930 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001931 case CFI_CMDSET_INTEL_STANDARD:
1932 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001933 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001934 break;
1935 case CFI_CMDSET_AMD_STANDARD:
1936 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001937 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001938 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001939 default:
1940 printf("CFI: Unknown command set 0x%x\n",
1941 info->vendor);
1942 /*
1943 * Unfortunately, this means we don't know how
1944 * to get the chip back to Read mode. Might
1945 * as well try an Intel-style reset...
1946 */
1947 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1948 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001949 }
wdenkcd37d9e2004-02-10 00:03:41 +00001950
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001951 /* Do manufacturer-specific fixups */
1952 switch (info->manufacturer_id) {
Mario Schuknecht2c9f48a2011-02-21 13:13:14 +01001953 case 0x0001: /* AMD */
1954 case 0x0037: /* AMIC */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001955 flash_fixup_amd(info, &qry);
1956 break;
1957 case 0x001f:
1958 flash_fixup_atmel(info, &qry);
1959 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001960 case 0x0020:
1961 flash_fixup_stm(info, &qry);
1962 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001963 }
1964
wdenkbf9e3b32004-02-12 00:47:09 +00001965 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001966 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1967 debug ("device id is 0x%x\n", info->device_id);
1968 debug ("device id2 is 0x%x\n", info->device_id2);
1969 debug ("cfi version is 0x%04x\n", info->cfi_version);
1970
wdenk5653fc32004-02-08 22:55:38 +00001971 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001972 /* if the chip is x8/x16 reduce the ratio by half */
1973 if ((info->interface == FLASH_CFI_X8X16)
1974 && (info->chipwidth == FLASH_CFI_BY8)) {
1975 size_ratio >>= 1;
1976 }
wdenkbf9e3b32004-02-12 00:47:09 +00001977 debug ("size_ratio %d port %d bits chip %d bits\n",
1978 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1979 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001980 info->size = 1 << qry.dev_size;
1981 /* multiply the size by the number of chips */
1982 info->size *= size_ratio;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001983 max_size = cfi_flash_bank_size(banknum);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001984 if (max_size && (info->size > max_size)) {
1985 debug("[truncated from %ldMiB]", info->size >> 20);
1986 info->size = max_size;
1987 }
wdenkbf9e3b32004-02-12 00:47:09 +00001988 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001989 sect_cnt = 0;
1990 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001991 for (i = 0; i < num_erase_regions; i++) {
1992 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001993 printf ("%d erase regions found, only %d used\n",
1994 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001995 break;
1996 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001997
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001998 tmp = le32_to_cpu(qry.erase_region_info[i]);
1999 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002000
2001 erase_region_count = (tmp & 0xffff) + 1;
2002 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00002003 erase_region_size =
2004 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00002005 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00002006 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00002007 for (j = 0; j < erase_region_count; j++) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002008 if (sector - base >= info->size)
2009 break;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002010 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002011 printf("ERROR: too many flash sectors\n");
2012 break;
2013 }
Becky Bruce09ce9922009-02-02 16:34:51 -06002014 info->start[sect_cnt] =
2015 (ulong)map_physmem(sector,
2016 info->portwidth,
2017 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00002018 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00002019
2020 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002021 * Only read protection status from
2022 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00002023 */
2024 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002025 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00002026 case CFI_CMDSET_INTEL_EXTENDED:
2027 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roesedf4e8132010-10-25 18:31:29 +02002028 /*
2029 * Set flash to read-id mode. Otherwise
2030 * reading protected status is not
2031 * guaranteed.
2032 */
2033 flash_write_cmd(info, sect_cnt, 0,
2034 FLASH_CMD_READ_ID);
wdenka1191902005-01-09 17:12:27 +00002035 info->protect[sect_cnt] =
2036 flash_isset (info, sect_cnt,
2037 FLASH_OFFSET_PROTECT,
2038 FLASH_STATUS_PROTECT);
2039 break;
2040 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002041 /* default: not protected */
2042 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00002043 }
2044
wdenk5653fc32004-02-08 22:55:38 +00002045 sect_cnt++;
2046 }
2047 }
2048
2049 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002050 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2051 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002052 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002053 (1 << qry.block_erase_timeout_max);
2054 tmp = (1 << qry.buf_write_timeout_typ) *
2055 (1 << qry.buf_write_timeout_max);
2056
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002057 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002058 info->buffer_write_tout = (tmp + 999) / 1000;
2059 tmp = (1 << qry.word_write_timeout_typ) *
2060 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002061 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002062 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00002063 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002064 if ((info->interface == FLASH_CFI_X8X16) &&
2065 (info->chipwidth == FLASH_CFI_BY8)) {
2066 /* XXX - Need to test on x8/x16 in parallel. */
2067 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00002068 }
Mike Frysinger22159872008-10-02 01:55:38 -04002069
2070 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00002071 }
2072
wdenkbf9e3b32004-02-12 00:47:09 +00002073 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00002074}
2075
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002076#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002077void flash_set_verbose(uint v)
2078{
2079 flash_verbose = v;
2080}
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002081#endif
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002082
Stefan Roese6f726f92010-10-25 18:31:48 +02002083static void cfi_flash_set_config_reg(u32 base, u16 val)
2084{
2085#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2086 /*
2087 * Only set this config register if really defined
2088 * to a valid value (0xffff is invalid)
2089 */
2090 if (val == 0xffff)
2091 return;
2092
2093 /*
2094 * Set configuration register. Data is "encrypted" in the 16 lower
2095 * address bits.
2096 */
2097 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2098 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2099
2100 /*
2101 * Finally issue reset-command to bring device back to
2102 * read-array mode
2103 */
2104 flash_write16(FLASH_CMD_RESET, (void *)base);
2105#endif
2106}
2107
wdenk5653fc32004-02-08 22:55:38 +00002108/*-----------------------------------------------------------------------
2109 */
Heiko Schocher6ee14162011-04-04 08:10:21 +02002110
2111void flash_protect_default(void)
2112{
Peter Tyser2c519832011-04-13 11:46:56 -05002113#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2114 int i;
2115 struct apl_s {
2116 ulong start;
2117 ulong size;
2118 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2119#endif
2120
Heiko Schocher6ee14162011-04-04 08:10:21 +02002121 /* Monitor protection ON by default */
2122#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2123 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2124 flash_protect(FLAG_PROTECT_SET,
2125 CONFIG_SYS_MONITOR_BASE,
2126 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2127 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2128#endif
2129
2130 /* Environment protection ON by default */
2131#ifdef CONFIG_ENV_IS_IN_FLASH
2132 flash_protect(FLAG_PROTECT_SET,
2133 CONFIG_ENV_ADDR,
2134 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2135 flash_get_info(CONFIG_ENV_ADDR));
2136#endif
2137
2138 /* Redundant environment protection ON by default */
2139#ifdef CONFIG_ENV_ADDR_REDUND
2140 flash_protect(FLAG_PROTECT_SET,
2141 CONFIG_ENV_ADDR_REDUND,
2142 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2143 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2144#endif
2145
2146#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2147 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2148 debug("autoprotecting from %08x to %08x\n",
2149 apl[i].start, apl[i].start + apl[i].size - 1);
2150 flash_protect(FLAG_PROTECT_SET,
2151 apl[i].start,
2152 apl[i].start + apl[i].size - 1,
2153 flash_get_info(apl[i].start));
2154 }
2155#endif
2156}
2157
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002158unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00002159{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002160 unsigned long size = 0;
2161 int i;
wdenk5653fc32004-02-08 22:55:38 +00002162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002163#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002164 /* read environment from EEPROM */
2165 char s[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +02002166 getenv_f("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002167#endif
wdenk5653fc32004-02-08 22:55:38 +00002168
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002169 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002170 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002171 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002172
Stefan Roese6f726f92010-10-25 18:31:48 +02002173 /* Optionally write flash configuration register */
2174 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2175 cfi_flash_config_reg(i));
2176
Stefan Roeseb00e19c2010-08-30 10:11:51 +02002177 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002178 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002179 size += flash_info[i].size;
2180 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002181#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Peter Tysereddf52b2010-12-28 18:12:05 -06002182 printf ("## Unknown flash on Bank %d "
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002183 "- Size = 0x%08lx = %ld MB\n",
2184 i+1, flash_info[i].size,
John Schmoller0e3fa012010-09-29 13:49:05 -05002185 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002186#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002187 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002188#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002189 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2190 /*
2191 * Only the U-Boot image and it's environment
2192 * is protected, all other sectors are
2193 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002194 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002195 * and the environment variable "unlock" is
2196 * set to "yes".
2197 */
2198 if (flash_info[i].legacy_unlock) {
2199 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002200
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002201 /*
2202 * Disable legacy_unlock temporarily,
2203 * since flash_real_protect would
2204 * relock all other sectors again
2205 * otherwise.
2206 */
2207 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002208
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002209 /*
2210 * Legacy unlocking (e.g. Intel J3) ->
2211 * unlock only one sector. This will
2212 * unlock all sectors.
2213 */
2214 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002215
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002216 flash_info[i].legacy_unlock = 1;
2217
2218 /*
2219 * Manually mark other sectors as
2220 * unlocked (unprotected)
2221 */
2222 for (k = 1; k < flash_info[i].sector_count; k++)
2223 flash_info[i].protect[k] = 0;
2224 } else {
2225 /*
2226 * No legancy unlocking -> unlock all sectors
2227 */
2228 flash_protect (FLAG_PROTECT_CLEAR,
2229 flash_info[i].start[0],
2230 flash_info[i].start[0]
2231 + flash_info[i].size - 1,
2232 &flash_info[i]);
2233 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002234 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002235#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002236 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002237
Heiko Schocher6ee14162011-04-04 08:10:21 +02002238 flash_protect_default();
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002239#ifdef CONFIG_FLASH_CFI_MTD
2240 cfi_mtd_init();
2241#endif
2242
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002243 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002244}