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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
wdenk028ab6b2004-02-23 23:54:43 +000042
wdenk5653fc32004-02-08 22:55:38 +000043/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010044 * This file implements a Common Flash Interface (CFI) driver for
45 * U-Boot.
46 *
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000050 *
51 * References
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010056 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000059 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010061 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000062 */
63
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#ifndef CONFIG_SYS_FLASH_BANKS_LIST
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkbf9e3b32004-02-12 00:47:09 +000066#endif
67
wdenk5653fc32004-02-08 22:55:38 +000068#define FLASH_CMD_CFI 0x98
69#define FLASH_CMD_READ_ID 0x90
70#define FLASH_CMD_RESET 0xff
71#define FLASH_CMD_BLOCK_ERASE 0x20
72#define FLASH_CMD_ERASE_CONFIRM 0xD0
73#define FLASH_CMD_WRITE 0x40
74#define FLASH_CMD_PROTECT 0x60
75#define FLASH_CMD_PROTECT_SET 0x01
76#define FLASH_CMD_PROTECT_CLEAR 0xD0
77#define FLASH_CMD_CLEAR_STATUS 0x50
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040078#define FLASH_CMD_READ_STATUS 0x70
wdenkbf9e3b32004-02-12 00:47:09 +000079#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040080#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
wdenkbf9e3b32004-02-12 00:47:09 +000081#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk5653fc32004-02-08 22:55:38 +000082
83#define FLASH_STATUS_DONE 0x80
84#define FLASH_STATUS_ESS 0x40
85#define FLASH_STATUS_ECLBS 0x20
86#define FLASH_STATUS_PSLBS 0x10
87#define FLASH_STATUS_VPENS 0x08
88#define FLASH_STATUS_PSS 0x04
89#define FLASH_STATUS_DPS 0x02
90#define FLASH_STATUS_R 0x01
91#define FLASH_STATUS_PROTECT 0x01
92
93#define AMD_CMD_RESET 0xF0
94#define AMD_CMD_WRITE 0xA0
95#define AMD_CMD_ERASE_START 0x80
96#define AMD_CMD_ERASE_SECTOR 0x30
wdenk855a4962004-03-14 18:23:55 +000097#define AMD_CMD_UNLOCK_START 0xAA
98#define AMD_CMD_UNLOCK_ACK 0x55
Stefan Roese79b4cda2006-02-28 15:29:58 +010099#define AMD_CMD_WRITE_TO_BUFFER 0x25
100#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
wdenk5653fc32004-02-08 22:55:38 +0000101
102#define AMD_STATUS_TOGGLE 0x40
103#define AMD_STATUS_ERROR 0x20
Stefan Roese79b4cda2006-02-28 15:29:58 +0100104
Rafael Camposbc9019e2008-07-31 10:22:20 +0200105#define ATM_CMD_UNLOCK_SECT 0x70
106#define ATM_CMD_SOFTLOCK_START 0x80
107#define ATM_CMD_LOCK_SECT 0x40
108
Stefan Roese260421a2006-11-13 13:55:24 +0100109#define FLASH_OFFSET_MANUFACTURER_ID 0x00
110#define FLASH_OFFSET_DEVICE_ID 0x01
111#define FLASH_OFFSET_DEVICE_ID2 0x0E
112#define FLASH_OFFSET_DEVICE_ID3 0x0F
wdenk5653fc32004-02-08 22:55:38 +0000113#define FLASH_OFFSET_CFI 0x55
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100114#define FLASH_OFFSET_CFI_ALT 0x555
wdenk5653fc32004-02-08 22:55:38 +0000115#define FLASH_OFFSET_CFI_RESP 0x10
wdenkbf9e3b32004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100117/* extended query table primary address */
118#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
wdenk5653fc32004-02-08 22:55:38 +0000119#define FLASH_OFFSET_WTOUT 0x1F
wdenkbf9e3b32004-02-12 00:47:09 +0000120#define FLASH_OFFSET_WBTOUT 0x20
wdenk5653fc32004-02-08 22:55:38 +0000121#define FLASH_OFFSET_ETOUT 0x21
wdenkbf9e3b32004-02-12 00:47:09 +0000122#define FLASH_OFFSET_CETOUT 0x22
wdenk5653fc32004-02-08 22:55:38 +0000123#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenkbf9e3b32004-02-12 00:47:09 +0000124#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk5653fc32004-02-08 22:55:38 +0000125#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenkbf9e3b32004-02-12 00:47:09 +0000126#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk5653fc32004-02-08 22:55:38 +0000127#define FLASH_OFFSET_SIZE 0x27
wdenkbf9e3b32004-02-12 00:47:09 +0000128#define FLASH_OFFSET_INTERFACE 0x28
129#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk5653fc32004-02-08 22:55:38 +0000130#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131#define FLASH_OFFSET_ERASE_REGIONS 0x2D
132#define FLASH_OFFSET_PROTECT 0x02
wdenkbf9e3b32004-02-12 00:47:09 +0000133#define FLASH_OFFSET_USER_PROTECTION 0x85
134#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk5653fc32004-02-08 22:55:38 +0000135
Stefan Roese260421a2006-11-13 13:55:24 +0100136#define CFI_CMDSET_NONE 0
137#define CFI_CMDSET_INTEL_EXTENDED 1
138#define CFI_CMDSET_AMD_STANDARD 2
139#define CFI_CMDSET_INTEL_STANDARD 3
140#define CFI_CMDSET_AMD_EXTENDED 4
141#define CFI_CMDSET_MITSU_STANDARD 256
142#define CFI_CMDSET_MITSU_EXTENDED 257
143#define CFI_CMDSET_SST 258
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400144#define CFI_CMDSET_INTEL_PROG_REGIONS 512
wdenk5653fc32004-02-08 22:55:38 +0000145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
wdenkf7d15722004-12-18 22:35:43 +0000147# undef FLASH_CMD_RESET
Stefan Roese260421a2006-11-13 13:55:24 +0100148# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
wdenkf7d15722004-12-18 22:35:43 +0000149#endif
150
wdenk5653fc32004-02-08 22:55:38 +0000151typedef union {
152 unsigned char c;
153 unsigned short w;
154 unsigned long l;
155 unsigned long long ll;
156} cfiword_t;
157
Stefan Roese260421a2006-11-13 13:55:24 +0100158#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
wdenk5653fc32004-02-08 22:55:38 +0000159
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100160static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Piotr Ziecik6ea808e2008-11-17 15:49:32 +0100161static uint flash_verbose = 1;
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
164#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
165# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200166#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200168#endif
wdenk5653fc32004-02-08 22:55:38 +0000169
Wolfgang Denk2a112b22008-08-08 16:39:54 +0200170flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
171
Stefan Roese79b4cda2006-02-28 15:29:58 +0100172/*
173 * Check if chip width is defined. If not, start detecting with 8bit.
174 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
176#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +0100177#endif
178
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100179/* CFI standard query structure */
180struct cfi_qry {
181 u8 qry[3];
182 u16 p_id;
183 u16 p_adr;
184 u16 a_id;
185 u16 a_adr;
186 u8 vcc_min;
187 u8 vcc_max;
188 u8 vpp_min;
189 u8 vpp_max;
190 u8 word_write_timeout_typ;
191 u8 buf_write_timeout_typ;
192 u8 block_erase_timeout_typ;
193 u8 chip_erase_timeout_typ;
194 u8 word_write_timeout_max;
195 u8 buf_write_timeout_max;
196 u8 block_erase_timeout_max;
197 u8 chip_erase_timeout_max;
198 u8 dev_size;
199 u16 interface_desc;
200 u16 max_buf_write_size;
201 u8 num_erase_regions;
202 u32 erase_region_info[NUM_ERASE_REGIONS];
203} __attribute__((packed));
204
205struct cfi_pri_hdr {
206 u8 pri[3];
207 u8 major_version;
208 u8 minor_version;
209} __attribute__((packed));
210
Stefan Roese45aa5a72008-11-17 14:45:22 +0100211static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100212{
213 __raw_writeb(value, addr);
214}
215
Stefan Roese45aa5a72008-11-17 14:45:22 +0100216static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100217{
218 __raw_writew(value, addr);
219}
220
Stefan Roese45aa5a72008-11-17 14:45:22 +0100221static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100222{
223 __raw_writel(value, addr);
224}
225
Stefan Roese45aa5a72008-11-17 14:45:22 +0100226static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100227{
228 /* No architectures currently implement __raw_writeq() */
229 *(volatile u64 *)addr = value;
230}
231
Stefan Roese45aa5a72008-11-17 14:45:22 +0100232static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100233{
234 return __raw_readb(addr);
235}
236
Stefan Roese45aa5a72008-11-17 14:45:22 +0100237static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100238{
239 return __raw_readw(addr);
240}
241
Stefan Roese45aa5a72008-11-17 14:45:22 +0100242static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100243{
244 return __raw_readl(addr);
245}
246
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100247static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100248{
249 /* No architectures currently implement __raw_readq() */
250 return *(volatile u64 *)addr;
251}
252
Stefan Roese45aa5a72008-11-17 14:45:22 +0100253#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
254void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
255void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
256void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
257void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
258u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
259u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
260u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100261u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100262#else
263#define flash_write8 __flash_write8
264#define flash_write16 __flash_write16
265#define flash_write32 __flash_write32
266#define flash_write64 __flash_write64
267#define flash_read8 __flash_read8
268#define flash_read16 __flash_read16
269#define flash_read32 __flash_read32
270#define flash_read64 __flash_read64
271#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100272
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200273/*-----------------------------------------------------------------------
274 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200275#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200276static flash_info_t *flash_get_info(ulong base)
277{
278 int i;
279 flash_info_t * info = 0;
280
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200282 info = & flash_info[i];
283 if (info->size && info->start[0] <= base &&
284 base <= info->start[0] + info->size - 1)
285 break;
286 }
287
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200289}
wdenk5653fc32004-02-08 22:55:38 +0000290#endif
291
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
293{
294 if (sect != (info->sector_count - 1))
295 return info->start[sect + 1] - info->start[sect];
296 else
297 return info->start[0] + info->size - info->start[sect];
298}
299
wdenk5653fc32004-02-08 22:55:38 +0000300/*-----------------------------------------------------------------------
301 * create an address based on the offset and the port width
302 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100303static inline void *
304flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000305{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100306 unsigned int byte_offset = offset * info->portwidth;
307
308 return map_physmem(info->start[sect] + byte_offset,
309 flash_sector_size(info, sect) - byte_offset,
310 MAP_NOCACHE);
311}
312
313static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
314 unsigned int offset, void *addr)
315{
316 unsigned int byte_offset = offset * info->portwidth;
317
318 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
wdenk5653fc32004-02-08 22:55:38 +0000319}
wdenkbf9e3b32004-02-12 00:47:09 +0000320
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200321/*-----------------------------------------------------------------------
322 * make a proper sized command based on the port and chip widths
323 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200324static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200325{
326 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400327 int cword_offset;
328 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200329#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200330 u32 cmd_le = cpu_to_le32(cmd);
331#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400332 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200333 uchar *cp = (uchar *) cmdbuf;
334
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400335 for (i = info->portwidth; i > 0; i--){
336 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200337#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400338 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200339 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200340#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400341 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200342 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200343#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200344 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400345 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200346}
347
wdenkbf9e3b32004-02-12 00:47:09 +0000348#ifdef DEBUG
349/*-----------------------------------------------------------------------
350 * Debug support
351 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100352static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000353{
354 int i;
355 char *cp;
356
357 cp = (unsigned char *) &data;
358 for (i = 0; i < 8; i++)
359 sprintf (&str[i * 2], "%2.2x", *cp++);
360}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200361
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100362static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000363{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100364 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000365 int x, y;
366
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100367 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
368 debug("%02x : ", x);
369 for (y = 0; y < 16; y++)
370 debug("%2.2x ", p[x + y]);
371 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000372 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100373 unsigned char c = p[x + y];
374 if (c >= 0x20 && c <= 0x7e)
375 debug("%c", c);
376 else
377 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000378 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100379 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000380 }
381}
wdenkbf9e3b32004-02-12 00:47:09 +0000382#endif
383
384
wdenk5653fc32004-02-08 22:55:38 +0000385/*-----------------------------------------------------------------------
386 * read a character at a port width address
387 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100388static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000389{
390 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100391 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000392
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100393 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200394#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100395 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000396#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100397 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000398#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100399 flash_unmap (info, 0, offset, cp);
400 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000401}
402
403/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100404 * read a word at a port width address, assume 16bit bus
405 */
406static inline ushort flash_read_word (flash_info_t * info, uint offset)
407{
408 ushort *addr, retval;
409
410 addr = flash_map (info, 0, offset);
411 retval = flash_read16 (addr);
412 flash_unmap (info, 0, offset, addr);
413 return retval;
414}
415
416
417/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100418 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000419 * port size word. Swap for ppc format.
420 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100421static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
422 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000423{
wdenkbf9e3b32004-02-12 00:47:09 +0000424 uchar *addr;
425 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000426
wdenkbf9e3b32004-02-12 00:47:09 +0000427#ifdef DEBUG
428 int x;
429#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100430 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000431
432#ifdef DEBUG
433 debug ("long addr is at %p info->portwidth = %d\n", addr,
434 info->portwidth);
435 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100436 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000437 }
438#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200439#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100440 retval = ((flash_read8(addr) << 16) |
441 (flash_read8(addr + info->portwidth) << 24) |
442 (flash_read8(addr + 2 * info->portwidth)) |
443 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000444#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100445 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
446 (flash_read8(addr + info->portwidth - 1) << 16) |
447 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
448 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000449#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100450 flash_unmap(info, sect, offset, addr);
451
wdenkbf9e3b32004-02-12 00:47:09 +0000452 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000453}
454
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200455/*
456 * Write a proper sized command to the correct address
457 */
458static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
Sebastian Siewior7288f972008-07-15 13:35:23 +0200459 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200460{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100461
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100462 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200463 cfiword_t cword;
464
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100465 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200466 flash_make_cmd (info, cmd, &cword);
467 switch (info->portwidth) {
468 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100469 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200470 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100471 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200472 break;
473 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100474 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200475 cmd, cword.w,
476 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100477 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200478 break;
479 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100480 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200481 cmd, cword.l,
482 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100483 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200484 break;
485 case FLASH_CFI_64BIT:
486#ifdef DEBUG
487 {
488 char str[20];
489
490 print_longlong (str, cword.ll);
491
492 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100493 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200494 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
495 }
496#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100497 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200498 break;
499 }
500
501 /* Ensure all the instructions are fully finished */
502 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100503
504 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200505}
506
507static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
508{
509 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
510 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
511}
512
513/*-----------------------------------------------------------------------
514 */
515static int flash_isequal (flash_info_t * info, flash_sect_t sect,
516 uint offset, uchar cmd)
517{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100518 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200519 cfiword_t cword;
520 int retval;
521
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100522 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200523 flash_make_cmd (info, cmd, &cword);
524
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100525 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200526 switch (info->portwidth) {
527 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100528 debug ("is= %x %x\n", flash_read8(addr), cword.c);
529 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200530 break;
531 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100532 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
533 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200534 break;
535 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700536 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100537 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200538 break;
539 case FLASH_CFI_64BIT:
540#ifdef DEBUG
541 {
542 char str1[20];
543 char str2[20];
544
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100545 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200546 print_longlong (str2, cword.ll);
547 debug ("is= %s %s\n", str1, str2);
548 }
549#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100550 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200551 break;
552 default:
553 retval = 0;
554 break;
555 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100556 flash_unmap(info, sect, offset, addr);
557
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200558 return retval;
559}
560
561/*-----------------------------------------------------------------------
562 */
563static int flash_isset (flash_info_t * info, flash_sect_t sect,
564 uint offset, uchar cmd)
565{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100566 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200567 cfiword_t cword;
568 int retval;
569
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100570 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200571 flash_make_cmd (info, cmd, &cword);
572 switch (info->portwidth) {
573 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100574 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200575 break;
576 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100577 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200578 break;
579 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100580 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200581 break;
582 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100583 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200584 break;
585 default:
586 retval = 0;
587 break;
588 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100589 flash_unmap(info, sect, offset, addr);
590
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200591 return retval;
592}
593
594/*-----------------------------------------------------------------------
595 */
596static int flash_toggle (flash_info_t * info, flash_sect_t sect,
597 uint offset, uchar cmd)
598{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100599 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200600 cfiword_t cword;
601 int retval;
602
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100603 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200604 flash_make_cmd (info, cmd, &cword);
605 switch (info->portwidth) {
606 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200607 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200608 break;
609 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200610 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200611 break;
612 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200613 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200614 break;
615 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100616 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
617 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200618 break;
619 default:
620 retval = 0;
621 break;
622 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100623 flash_unmap(info, sect, offset, addr);
624
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200625 return retval;
626}
627
628/*
629 * flash_is_busy - check to see if the flash is busy
630 *
631 * This routine checks the status of the chip and returns true if the
632 * chip is busy.
633 */
634static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
635{
636 int retval;
637
638 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400639 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200640 case CFI_CMDSET_INTEL_STANDARD:
641 case CFI_CMDSET_INTEL_EXTENDED:
642 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
643 break;
644 case CFI_CMDSET_AMD_STANDARD:
645 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100646#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200647 case CFI_CMDSET_AMD_LEGACY:
648#endif
649 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
650 break;
651 default:
652 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100653 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200654 debug ("flash_is_busy: %d\n", retval);
655 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100656}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200657
658/*-----------------------------------------------------------------------
659 * wait for XSR.7 to be set. Time out with an error if it does not.
660 * This routine does not set the flash to read-array mode.
661 */
662static int flash_status_check (flash_info_t * info, flash_sect_t sector,
663 ulong tout, char *prompt)
664{
665 ulong start;
666
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200667#if CONFIG_SYS_HZ != 1000
668 tout *= CONFIG_SYS_HZ/1000;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200669#endif
670
671 /* Wait for command completion */
672 start = get_timer (0);
673 while (flash_is_busy (info, sector)) {
674 if (get_timer (start) > tout) {
675 printf ("Flash %s timeout at address %lx data %lx\n",
676 prompt, info->start[sector],
677 flash_read_long (info, sector, 0));
678 flash_write_cmd (info, sector, 0, info->cmd_reset);
679 return ERR_TIMOUT;
680 }
681 udelay (1); /* also triggers watchdog */
682 }
683 return ERR_OK;
684}
685
686/*-----------------------------------------------------------------------
687 * Wait for XSR.7 to be set, if it times out print an error, otherwise
688 * do a full status check.
689 *
690 * This routine sets the flash to read-array mode.
691 */
692static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
693 ulong tout, char *prompt)
694{
695 int retcode;
696
697 retcode = flash_status_check (info, sector, tout, prompt);
698 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400699 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200700 case CFI_CMDSET_INTEL_EXTENDED:
701 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500702 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200703 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
704 retcode = ERR_INVAL;
705 printf ("Flash %s error at address %lx\n", prompt,
706 info->start[sector]);
707 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
708 FLASH_STATUS_PSLBS)) {
709 puts ("Command Sequence Error.\n");
710 } else if (flash_isset (info, sector, 0,
711 FLASH_STATUS_ECLBS)) {
712 puts ("Block Erase Error.\n");
713 retcode = ERR_NOT_ERASED;
714 } else if (flash_isset (info, sector, 0,
715 FLASH_STATUS_PSLBS)) {
716 puts ("Locking Error\n");
717 }
718 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
719 puts ("Block locked.\n");
720 retcode = ERR_PROTECTED;
721 }
722 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
723 puts ("Vpp Low Error.\n");
724 }
725 flash_write_cmd (info, sector, 0, info->cmd_reset);
726 break;
727 default:
728 break;
729 }
730 return retcode;
731}
732
733/*-----------------------------------------------------------------------
734 */
735static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
736{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200737#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200738 unsigned short w;
739 unsigned int l;
740 unsigned long long ll;
741#endif
742
743 switch (info->portwidth) {
744 case FLASH_CFI_8BIT:
745 cword->c = c;
746 break;
747 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200748#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200749 w = c;
750 w <<= 8;
751 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100752#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200753 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100754#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200755 break;
756 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200757#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200758 l = c;
759 l <<= 24;
760 cword->l = (cword->l >> 8) | l;
761#else
762 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200763#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200764 break;
765 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200766#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200767 ll = c;
768 ll <<= 56;
769 cword->ll = (cword->ll >> 8) | ll;
770#else
771 cword->ll = (cword->ll << 8) | c;
772#endif
773 break;
wdenk5653fc32004-02-08 22:55:38 +0000774 }
wdenk5653fc32004-02-08 22:55:38 +0000775}
776
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100777/*
778 * Loop through the sector table starting from the previously found sector.
779 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000780 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200781static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000782{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100783 static flash_sect_t saved_sector = 0; /* previously found sector */
784 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000785
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100786 while ((info->start[sector] < addr)
787 && (sector < info->sector_count - 1))
788 sector++;
789 while ((info->start[sector] > addr) && (sector > 0))
790 /*
791 * also decrements the sector in case of an overshot
792 * in the first loop
793 */
794 sector--;
795
796 saved_sector = sector;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200797 return sector;
wdenk7680c142005-05-16 15:23:22 +0000798}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200799
800/*-----------------------------------------------------------------------
801 */
802static int flash_write_cfiword (flash_info_t * info, ulong dest,
803 cfiword_t cword)
804{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100805 void *dstaddr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200806 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100807 flash_sect_t sect = 0;
808 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200809
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100810 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200811
812 /* Check if Flash is (sufficiently) erased */
813 switch (info->portwidth) {
814 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100815 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200816 break;
817 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100818 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200819 break;
820 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100821 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200822 break;
823 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100824 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200825 break;
826 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100827 flag = 0;
828 break;
829 }
830 if (!flag) {
831 unmap_physmem(dstaddr, info->portwidth);
Stefan Roese0dc80e22007-12-27 07:50:54 +0100832 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200833 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200834
835 /* Disable interrupts which might cause a timeout here */
836 flag = disable_interrupts ();
837
838 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400839 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200840 case CFI_CMDSET_INTEL_EXTENDED:
841 case CFI_CMDSET_INTEL_STANDARD:
842 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
843 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
844 break;
845 case CFI_CMDSET_AMD_EXTENDED:
846 case CFI_CMDSET_AMD_STANDARD:
847#ifdef CONFIG_FLASH_CFI_LEGACY
848 case CFI_CMDSET_AMD_LEGACY:
Wolfgang Denk080bdb72005-10-05 01:51:29 +0200849#endif
Ed Swarthout0d01f662008-10-09 01:26:36 -0500850 sect = find_sector(info, dest);
851 flash_unlock_seq (info, sect);
852 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100853 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200854 break;
855 }
856
857 switch (info->portwidth) {
858 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100859 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200860 break;
861 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100862 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200863 break;
864 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100865 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200866 break;
867 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100868 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200869 break;
870 }
871
872 /* re-enable interrupts if necessary */
873 if (flag)
874 enable_interrupts ();
875
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100876 unmap_physmem(dstaddr, info->portwidth);
877
Jens Gehrleina7292872008-12-16 17:25:54 +0100878 if (!sect_found)
879 sect = find_sector (info, dest);
880
881 return flash_full_status_check (info, sect, info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200882}
883
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200884#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200885
886static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
887 int len)
888{
889 flash_sect_t sector;
890 int cnt;
891 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100892 void *src = cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100893 void *dst = map_physmem(dest, len, MAP_NOCACHE);
Stefan Roese0dc80e22007-12-27 07:50:54 +0100894 void *dst2 = dst;
895 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200896 uint offset = 0;
897 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400898 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100899
Stefan Roese0dc80e22007-12-27 07:50:54 +0100900 switch (info->portwidth) {
901 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200902 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100903 break;
904 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200905 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100906 break;
907 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200908 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100909 break;
910 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200911 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100912 break;
913 default:
914 retcode = ERR_INVAL;
915 goto out_unmap;
916 }
917
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200918 cnt = len >> shift;
919
Stefan Roese0dc80e22007-12-27 07:50:54 +0100920 while ((cnt-- > 0) && (flag == 0)) {
921 switch (info->portwidth) {
922 case FLASH_CFI_8BIT:
923 flag = ((flash_read8(dst2) & flash_read8(src)) ==
924 flash_read8(src));
925 src += 1, dst2 += 1;
926 break;
927 case FLASH_CFI_16BIT:
928 flag = ((flash_read16(dst2) & flash_read16(src)) ==
929 flash_read16(src));
930 src += 2, dst2 += 2;
931 break;
932 case FLASH_CFI_32BIT:
933 flag = ((flash_read32(dst2) & flash_read32(src)) ==
934 flash_read32(src));
935 src += 4, dst2 += 4;
936 break;
937 case FLASH_CFI_64BIT:
938 flag = ((flash_read64(dst2) & flash_read64(src)) ==
939 flash_read64(src));
940 src += 8, dst2 += 8;
941 break;
942 }
943 }
944 if (!flag) {
945 retcode = ERR_NOT_ERASED;
946 goto out_unmap;
947 }
948
949 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100950 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200951
952 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400953 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200954 case CFI_CMDSET_INTEL_STANDARD:
955 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400956 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
957 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200958 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400959 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
960 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200961 retcode = flash_status_check (info, sector,
962 info->buffer_write_tout,
963 "write to buffer");
964 if (retcode == ERR_OK) {
965 /* reduce the number of loops by the width of
966 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200967 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400968 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200969 while (cnt-- > 0) {
970 switch (info->portwidth) {
971 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100972 flash_write8(flash_read8(src), dst);
973 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200974 break;
975 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100976 flash_write16(flash_read16(src), dst);
977 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200978 break;
979 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100980 flash_write32(flash_read32(src), dst);
981 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200982 break;
983 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100984 flash_write64(flash_read64(src), dst);
985 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200986 break;
987 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100988 retcode = ERR_INVAL;
989 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200990 }
991 }
992 flash_write_cmd (info, sector, 0,
993 FLASH_CMD_WRITE_BUFFER_CONFIRM);
994 retcode = flash_full_status_check (
995 info, sector, info->buffer_write_tout,
996 "buffer write");
997 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100998
999 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001000
1001 case CFI_CMDSET_AMD_STANDARD:
1002 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001003 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +02001004
1005#ifdef CONFIG_FLASH_SPANSION_S29WS_N
1006 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1007#endif
1008 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1009 cnt = len >> shift;
1010 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001011
1012 switch (info->portwidth) {
1013 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001014 while (cnt-- > 0) {
1015 flash_write8(flash_read8(src), dst);
1016 src += 1, dst += 1;
1017 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001018 break;
1019 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001020 while (cnt-- > 0) {
1021 flash_write16(flash_read16(src), dst);
1022 src += 2, dst += 2;
1023 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001024 break;
1025 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001026 while (cnt-- > 0) {
1027 flash_write32(flash_read32(src), dst);
1028 src += 4, dst += 4;
1029 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001030 break;
1031 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001032 while (cnt-- > 0) {
1033 flash_write64(flash_read64(src), dst);
1034 src += 8, dst += 8;
1035 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001036 break;
1037 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001038 retcode = ERR_INVAL;
1039 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001040 }
1041
1042 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1043 retcode = flash_full_status_check (info, sector,
1044 info->buffer_write_tout,
1045 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001046 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001047
1048 default:
1049 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001050 retcode = ERR_INVAL;
1051 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001052 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001053
1054out_unmap:
1055 unmap_physmem(dst, len);
1056 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001057}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001058#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001059
wdenk7680c142005-05-16 15:23:22 +00001060
1061/*-----------------------------------------------------------------------
1062 */
wdenkbf9e3b32004-02-12 00:47:09 +00001063int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001064{
1065 int rcode = 0;
1066 int prot;
1067 flash_sect_t sect;
1068
wdenkbf9e3b32004-02-12 00:47:09 +00001069 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001070 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001071 return 1;
1072 }
1073 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001074 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001075 return 1;
1076 }
1077
1078 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001079 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001080 if (info->protect[sect]) {
1081 prot++;
1082 }
1083 }
1084 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001085 printf ("- Warning: %d protected sectors will not be erased!\n",
1086 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001087 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001088 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001089 }
1090
1091
wdenkbf9e3b32004-02-12 00:47:09 +00001092 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001093 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001094 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001095 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001096 case CFI_CMDSET_INTEL_STANDARD:
1097 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001098 flash_write_cmd (info, sect, 0,
1099 FLASH_CMD_CLEAR_STATUS);
1100 flash_write_cmd (info, sect, 0,
1101 FLASH_CMD_BLOCK_ERASE);
1102 flash_write_cmd (info, sect, 0,
1103 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001104 break;
1105 case CFI_CMDSET_AMD_STANDARD:
1106 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001107 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001108 flash_write_cmd (info, sect,
1109 info->addr_unlock1,
1110 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001111 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001112 flash_write_cmd (info, sect, 0,
1113 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001114 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001115#ifdef CONFIG_FLASH_CFI_LEGACY
1116 case CFI_CMDSET_AMD_LEGACY:
1117 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001118 flash_write_cmd (info, 0, info->addr_unlock1,
1119 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001120 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001121 flash_write_cmd (info, sect, 0,
1122 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001123 break;
1124#endif
wdenk5653fc32004-02-08 22:55:38 +00001125 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001126 debug ("Unkown flash vendor %d\n",
1127 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001128 break;
1129 }
1130
wdenkbf9e3b32004-02-12 00:47:09 +00001131 if (flash_full_status_check
1132 (info, sect, info->erase_blk_tout, "erase")) {
wdenk5653fc32004-02-08 22:55:38 +00001133 rcode = 1;
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001134 } else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001135 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001136 }
1137 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001138
1139 if (flash_verbose)
1140 puts (" done\n");
1141
wdenk5653fc32004-02-08 22:55:38 +00001142 return rcode;
1143}
1144
1145/*-----------------------------------------------------------------------
1146 */
wdenkbf9e3b32004-02-12 00:47:09 +00001147void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001148{
1149 int i;
1150
1151 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001152 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001153 return;
1154 }
1155
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001156 printf ("%s FLASH (%d x %d)",
1157 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001158 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001159 if (info->size < 1024*1024)
1160 printf (" Size: %ld kB in %d Sectors\n",
1161 info->size >> 10, info->sector_count);
1162 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001163 printf (" Size: %ld MB in %d Sectors\n",
1164 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001165 printf (" ");
1166 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001167 case CFI_CMDSET_INTEL_PROG_REGIONS:
1168 printf ("Intel Prog Regions");
1169 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001170 case CFI_CMDSET_INTEL_STANDARD:
1171 printf ("Intel Standard");
1172 break;
1173 case CFI_CMDSET_INTEL_EXTENDED:
1174 printf ("Intel Extended");
1175 break;
1176 case CFI_CMDSET_AMD_STANDARD:
1177 printf ("AMD Standard");
1178 break;
1179 case CFI_CMDSET_AMD_EXTENDED:
1180 printf ("AMD Extended");
1181 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001182#ifdef CONFIG_FLASH_CFI_LEGACY
1183 case CFI_CMDSET_AMD_LEGACY:
1184 printf ("AMD Legacy");
1185 break;
1186#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001187 default:
1188 printf ("Unknown (%d)", info->vendor);
1189 break;
1190 }
1191 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1192 info->manufacturer_id, info->device_id);
1193 if (info->device_id == 0x7E) {
1194 printf("%04X", info->device_id2);
1195 }
1196 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001197 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001198 info->write_tout);
1199 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001200 printf (" Buffer write timeout: %ld ms, "
1201 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001202 info->buffer_write_tout,
1203 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001204 }
wdenk5653fc32004-02-08 22:55:38 +00001205
Stefan Roese260421a2006-11-13 13:55:24 +01001206 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001207 for (i = 0; i < info->sector_count; ++i) {
Stefan Roese260421a2006-11-13 13:55:24 +01001208 if ((i % 5) == 0)
1209 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001210#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001211 int k;
1212 int size;
1213 int erased;
1214 volatile unsigned long *flash;
1215
1216 /*
1217 * Check if whole sector is erased
1218 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001219 size = flash_sector_size(info, i);
wdenk5653fc32004-02-08 22:55:38 +00001220 erased = 1;
wdenkbf9e3b32004-02-12 00:47:09 +00001221 flash = (volatile unsigned long *) info->start[i];
1222 size = size >> 2; /* divide by 4 for longword access */
1223 for (k = 0; k < size; k++) {
1224 if (*flash++ != 0xffffffff) {
1225 erased = 0;
1226 break;
1227 }
1228 }
wdenk5653fc32004-02-08 22:55:38 +00001229
wdenk5653fc32004-02-08 22:55:38 +00001230 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001231 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001232 info->start[i],
Stefan Roese260421a2006-11-13 13:55:24 +01001233 erased ? 'E' : ' ',
1234 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001235#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001236 printf (" %08lX %s ",
1237 info->start[i],
1238 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001239#endif
1240 }
wdenk4b9206e2004-03-23 22:14:11 +00001241 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001242 return;
1243}
1244
1245/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001246 * This is used in a few places in write_buf() to show programming
1247 * progress. Making it a function is nasty because it needs to do side
1248 * effect updates to digit and dots. Repeated code is nasty too, so
1249 * we define it once here.
1250 */
Stefan Roesef0105722008-03-19 07:09:26 +01001251#ifdef CONFIG_FLASH_SHOW_PROGRESS
1252#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001253 if (flash_verbose) { \
1254 dots -= dots_sub; \
1255 if ((scale > 0) && (dots <= 0)) { \
1256 if ((digit % 5) == 0) \
1257 printf ("%d", digit / 5); \
1258 else \
1259 putc ('.'); \
1260 digit--; \
1261 dots += scale; \
1262 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001263 }
Stefan Roesef0105722008-03-19 07:09:26 +01001264#else
1265#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1266#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001267
1268/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001269 * Copy memory to flash, returns:
1270 * 0 - OK
1271 * 1 - write timeout
1272 * 2 - Flash not erased
1273 */
wdenkbf9e3b32004-02-12 00:47:09 +00001274int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001275{
1276 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001277 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001278 int aln;
1279 cfiword_t cword;
1280 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001281#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001282 int buffered_size;
1283#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001284#ifdef CONFIG_FLASH_SHOW_PROGRESS
1285 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1286 int scale = 0;
1287 int dots = 0;
1288
1289 /*
1290 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1291 */
1292 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1293 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1294 CONFIG_FLASH_SHOW_PROGRESS);
1295 }
1296#endif
1297
wdenkbf9e3b32004-02-12 00:47:09 +00001298 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001299 wp = (addr & ~(info->portwidth - 1));
1300
1301 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001302 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001303 cword.l = 0;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001304 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1305 for (i = 0; i < aln; ++i)
1306 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001307
wdenkbf9e3b32004-02-12 00:47:09 +00001308 for (; (i < info->portwidth) && (cnt > 0); i++) {
1309 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001310 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001311 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001312 for (; (cnt == 0) && (i < info->portwidth); ++i)
1313 flash_add_byte (info, &cword, flash_read8(p + i));
1314
1315 rc = flash_write_cfiword (info, wp, cword);
1316 unmap_physmem(p, info->portwidth);
1317 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001318 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001319
1320 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001321 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001322 }
1323
wdenkbf9e3b32004-02-12 00:47:09 +00001324 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001325#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001326 buffered_size = (info->portwidth / info->chipwidth);
1327 buffered_size *= info->buffer_size;
1328 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001329 /* prohibit buffer write when buffer_size is 1 */
1330 if (info->buffer_size == 1) {
1331 cword.l = 0;
1332 for (i = 0; i < info->portwidth; i++)
1333 flash_add_byte (info, &cword, *src++);
1334 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1335 return rc;
1336 wp += info->portwidth;
1337 cnt -= info->portwidth;
1338 continue;
1339 }
1340
1341 /* write buffer until next buffered_size aligned boundary */
1342 i = buffered_size - (wp % buffered_size);
1343 if (i > cnt)
1344 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001345 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001346 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001347 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001348 wp += i;
1349 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001350 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001351 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001352 }
1353#else
wdenkbf9e3b32004-02-12 00:47:09 +00001354 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001355 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001356 for (i = 0; i < info->portwidth; i++) {
1357 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001358 }
wdenkbf9e3b32004-02-12 00:47:09 +00001359 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001360 return rc;
1361 wp += info->portwidth;
1362 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001363 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001364 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001365#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001366
wdenk5653fc32004-02-08 22:55:38 +00001367 if (cnt == 0) {
1368 return (0);
1369 }
1370
1371 /*
1372 * handle unaligned tail bytes
1373 */
1374 cword.l = 0;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001375 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1376 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001377 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001378 --cnt;
1379 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001380 for (; i < info->portwidth; ++i)
1381 flash_add_byte (info, &cword, flash_read8(p + i));
1382 unmap_physmem(p, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001383
wdenkbf9e3b32004-02-12 00:47:09 +00001384 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001385}
1386
1387/*-----------------------------------------------------------------------
1388 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001389#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001390
wdenkbf9e3b32004-02-12 00:47:09 +00001391int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001392{
1393 int retcode = 0;
1394
Rafael Camposbc9019e2008-07-31 10:22:20 +02001395 switch (info->vendor) {
1396 case CFI_CMDSET_INTEL_PROG_REGIONS:
1397 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001398 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001399 flash_write_cmd (info, sector, 0,
1400 FLASH_CMD_CLEAR_STATUS);
1401 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1402 if (prot)
1403 flash_write_cmd (info, sector, 0,
1404 FLASH_CMD_PROTECT_SET);
1405 else
1406 flash_write_cmd (info, sector, 0,
1407 FLASH_CMD_PROTECT_CLEAR);
1408 break;
1409 case CFI_CMDSET_AMD_EXTENDED:
1410 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001411 /* U-Boot only checks the first byte */
1412 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1413 if (prot) {
1414 flash_unlock_seq (info, 0);
1415 flash_write_cmd (info, 0,
1416 info->addr_unlock1,
1417 ATM_CMD_SOFTLOCK_START);
1418 flash_unlock_seq (info, 0);
1419 flash_write_cmd (info, sector, 0,
1420 ATM_CMD_LOCK_SECT);
1421 } else {
1422 flash_write_cmd (info, 0,
1423 info->addr_unlock1,
1424 AMD_CMD_UNLOCK_START);
1425 if (info->device_id == ATM_ID_BV6416)
1426 flash_write_cmd (info, sector,
1427 0, ATM_CMD_UNLOCK_SECT);
1428 }
1429 }
1430 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001431#ifdef CONFIG_FLASH_CFI_LEGACY
1432 case CFI_CMDSET_AMD_LEGACY:
1433 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1434 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1435 if (prot)
1436 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1437 else
1438 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1439#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001440 };
wdenk5653fc32004-02-08 22:55:38 +00001441
wdenkbf9e3b32004-02-12 00:47:09 +00001442 if ((retcode =
1443 flash_full_status_check (info, sector, info->erase_blk_tout,
1444 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001445
1446 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001447
1448 /*
1449 * On some of Intel's flash chips (marked via legacy_unlock)
1450 * unprotect unprotects all locking.
1451 */
1452 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001453 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001454
1455 for (i = 0; i < info->sector_count; i++) {
1456 if (info->protect[i])
1457 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001458 }
1459 }
1460 }
wdenk5653fc32004-02-08 22:55:38 +00001461 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001462}
1463
wdenk5653fc32004-02-08 22:55:38 +00001464/*-----------------------------------------------------------------------
1465 * flash_read_user_serial - read the OneTimeProgramming cells
1466 */
wdenkbf9e3b32004-02-12 00:47:09 +00001467void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1468 int len)
wdenk5653fc32004-02-08 22:55:38 +00001469{
wdenkbf9e3b32004-02-12 00:47:09 +00001470 uchar *src;
1471 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001472
1473 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001474 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001475 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1476 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001477 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001478 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001479}
wdenkbf9e3b32004-02-12 00:47:09 +00001480
wdenk5653fc32004-02-08 22:55:38 +00001481/*
1482 * flash_read_factory_serial - read the device Id from the protection area
1483 */
wdenkbf9e3b32004-02-12 00:47:09 +00001484void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1485 int len)
wdenk5653fc32004-02-08 22:55:38 +00001486{
wdenkbf9e3b32004-02-12 00:47:09 +00001487 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001488
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001489 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001490 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1491 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001492 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001493 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001494}
1495
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001496#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001497
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001498/*-----------------------------------------------------------------------
1499 * Reverse the order of the erase regions in the CFI QRY structure.
1500 * This is needed for chips that are either a) correctly detected as
1501 * top-boot, or b) buggy.
1502 */
1503static void cfi_reverse_geometry(struct cfi_qry *qry)
1504{
1505 unsigned int i, j;
1506 u32 tmp;
1507
1508 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1509 tmp = qry->erase_region_info[i];
1510 qry->erase_region_info[i] = qry->erase_region_info[j];
1511 qry->erase_region_info[j] = tmp;
1512 }
1513}
wdenk5653fc32004-02-08 22:55:38 +00001514
1515/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001516 * read jedec ids from device and set corresponding fields in info struct
1517 *
1518 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1519 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001520 */
1521static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1522{
1523 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1524 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1525 udelay(1000); /* some flash are slow to respond */
1526 info->manufacturer_id = flash_read_uchar (info,
1527 FLASH_OFFSET_MANUFACTURER_ID);
1528 info->device_id = flash_read_uchar (info,
1529 FLASH_OFFSET_DEVICE_ID);
1530 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1531}
1532
1533static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1534{
1535 info->cmd_reset = FLASH_CMD_RESET;
1536
1537 cmdset_intel_read_jedec_ids(info);
1538 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1539
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001540#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001541 /* read legacy lock/unlock bit from intel flash */
1542 if (info->ext_addr) {
1543 info->legacy_unlock = flash_read_uchar (info,
1544 info->ext_addr + 5) & 0x08;
1545 }
1546#endif
1547
1548 return 0;
1549}
1550
1551static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1552{
1553 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1554 flash_unlock_seq(info, 0);
1555 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1556 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001557
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001558 info->manufacturer_id = flash_read_uchar (info,
1559 FLASH_OFFSET_MANUFACTURER_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001560
1561 switch (info->chipwidth){
1562 case FLASH_CFI_8BIT:
1563 info->device_id = flash_read_uchar (info,
1564 FLASH_OFFSET_DEVICE_ID);
1565 if (info->device_id == 0x7E) {
1566 /* AMD 3-byte (expanded) device ids */
1567 info->device_id2 = flash_read_uchar (info,
1568 FLASH_OFFSET_DEVICE_ID2);
1569 info->device_id2 <<= 8;
1570 info->device_id2 |= flash_read_uchar (info,
1571 FLASH_OFFSET_DEVICE_ID3);
1572 }
1573 break;
1574 case FLASH_CFI_16BIT:
1575 info->device_id = flash_read_word (info,
1576 FLASH_OFFSET_DEVICE_ID);
1577 break;
1578 default:
1579 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001580 }
1581 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1582}
1583
1584static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1585{
1586 info->cmd_reset = AMD_CMD_RESET;
1587
1588 cmdset_amd_read_jedec_ids(info);
1589 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1590
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001591 return 0;
1592}
1593
1594#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001595static void flash_read_jedec_ids (flash_info_t * info)
1596{
1597 info->manufacturer_id = 0;
1598 info->device_id = 0;
1599 info->device_id2 = 0;
1600
1601 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001602 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001603 case CFI_CMDSET_INTEL_STANDARD:
1604 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001605 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001606 break;
1607 case CFI_CMDSET_AMD_STANDARD:
1608 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001609 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001610 break;
1611 default:
1612 break;
1613 }
1614}
1615
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001616/*-----------------------------------------------------------------------
1617 * Call board code to request info about non-CFI flash.
1618 * board_flash_get_legacy needs to fill in at least:
1619 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1620 */
1621static int flash_detect_legacy(ulong base, int banknum)
1622{
1623 flash_info_t *info = &flash_info[banknum];
1624
1625 if (board_flash_get_legacy(base, banknum, info)) {
1626 /* board code may have filled info completely. If not, we
1627 use JEDEC ID probing. */
1628 if (!info->vendor) {
1629 int modes[] = {
1630 CFI_CMDSET_AMD_STANDARD,
1631 CFI_CMDSET_INTEL_STANDARD
1632 };
1633 int i;
1634
1635 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1636 info->vendor = modes[i];
1637 info->start[0] = base;
1638 if (info->portwidth == FLASH_CFI_8BIT
1639 && info->interface == FLASH_CFI_X8X16) {
1640 info->addr_unlock1 = 0x2AAA;
1641 info->addr_unlock2 = 0x5555;
1642 } else {
1643 info->addr_unlock1 = 0x5555;
1644 info->addr_unlock2 = 0x2AAA;
1645 }
1646 flash_read_jedec_ids(info);
1647 debug("JEDEC PROBE: ID %x %x %x\n",
1648 info->manufacturer_id,
1649 info->device_id,
1650 info->device_id2);
1651 if (jedec_flash_match(info, base))
1652 break;
1653 }
1654 }
1655
1656 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001657 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001658 case CFI_CMDSET_INTEL_STANDARD:
1659 case CFI_CMDSET_INTEL_EXTENDED:
1660 info->cmd_reset = FLASH_CMD_RESET;
1661 break;
1662 case CFI_CMDSET_AMD_STANDARD:
1663 case CFI_CMDSET_AMD_EXTENDED:
1664 case CFI_CMDSET_AMD_LEGACY:
1665 info->cmd_reset = AMD_CMD_RESET;
1666 break;
1667 }
1668 info->flash_id = FLASH_MAN_CFI;
1669 return 1;
1670 }
1671 return 0; /* use CFI */
1672}
1673#else
1674static inline int flash_detect_legacy(ulong base, int banknum)
1675{
1676 return 0; /* use CFI */
1677}
1678#endif
1679
Stefan Roese260421a2006-11-13 13:55:24 +01001680/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001681 * detect if flash is compatible with the Common Flash Interface (CFI)
1682 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001683 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001684static void flash_read_cfi (flash_info_t *info, void *buf,
1685 unsigned int start, size_t len)
1686{
1687 u8 *p = buf;
1688 unsigned int i;
1689
1690 for (i = 0; i < len; i++)
1691 p[i] = flash_read_uchar(info, start + i);
1692}
1693
1694static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001695{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001696 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001697
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001698 /* We do not yet know what kind of commandset to use, so we issue
1699 the reset command in both Intel and AMD variants, in the hope
1700 that AMD flash roms ignore the Intel command. */
1701 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1702 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1703
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001704 for (cfi_offset=0;
1705 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1706 cfi_offset++) {
1707 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1708 FLASH_CMD_CFI);
1709 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1710 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1711 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001712 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1713 sizeof(struct cfi_qry));
1714 info->interface = le16_to_cpu(qry->interface_desc);
1715
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001716 info->cfi_offset = flash_offset_cfi[cfi_offset];
1717 debug ("device interface is %d\n",
1718 info->interface);
1719 debug ("found port %d chip %d ",
1720 info->portwidth, info->chipwidth);
1721 debug ("port %d bits chip %d bits\n",
1722 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1723 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1724
1725 /* calculate command offsets as in the Linux driver */
1726 info->addr_unlock1 = 0x555;
1727 info->addr_unlock2 = 0x2aa;
1728
1729 /*
1730 * modify the unlock address if we are
1731 * in compatibility mode
1732 */
1733 if ( /* x8/x16 in x8 mode */
1734 ((info->chipwidth == FLASH_CFI_BY8) &&
1735 (info->interface == FLASH_CFI_X8X16)) ||
1736 /* x16/x32 in x16 mode */
1737 ((info->chipwidth == FLASH_CFI_BY16) &&
1738 (info->interface == FLASH_CFI_X16X32)))
1739 {
1740 info->addr_unlock1 = 0xaaa;
1741 info->addr_unlock2 = 0x555;
1742 }
1743
1744 info->name = "CFI conformant";
1745 return 1;
1746 }
1747 }
1748
1749 return 0;
1750}
1751
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001752static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001753{
wdenkbf9e3b32004-02-12 00:47:09 +00001754 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001755
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001756 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001757 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1758 for (info->chipwidth = FLASH_CFI_BY8;
1759 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001760 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001761 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001762 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001763 }
wdenkbf9e3b32004-02-12 00:47:09 +00001764 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001765 return 0;
1766}
wdenkbf9e3b32004-02-12 00:47:09 +00001767
wdenk5653fc32004-02-08 22:55:38 +00001768/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001769 * Manufacturer-specific quirks. Add workarounds for geometry
1770 * reversal, etc. here.
1771 */
1772static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1773{
1774 /* check if flash geometry needs reversal */
1775 if (qry->num_erase_regions > 1) {
1776 /* reverse geometry if top boot part */
1777 if (info->cfi_version < 0x3131) {
1778 /* CFI < 1.1, try to guess from device id */
1779 if ((info->device_id & 0x80) != 0)
1780 cfi_reverse_geometry(qry);
1781 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1782 /* CFI >= 1.1, deduct from top/bottom flag */
1783 /* note: ext_addr is valid since cfi_version > 0 */
1784 cfi_reverse_geometry(qry);
1785 }
1786 }
1787}
1788
1789static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1790{
1791 int reverse_geometry = 0;
1792
1793 /* Check the "top boot" bit in the PRI */
1794 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1795 reverse_geometry = 1;
1796
1797 /* AT49BV6416(T) list the erase regions in the wrong order.
1798 * However, the device ID is identical with the non-broken
1799 * AT49BV642D since u-boot only reads the low byte (they
1800 * differ in the high byte.) So leave out this fixup for now.
1801 */
1802#if 0
1803 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1804 reverse_geometry = !reverse_geometry;
1805#endif
1806
1807 if (reverse_geometry)
1808 cfi_reverse_geometry(qry);
1809}
1810
Richard Retanubune8eac432009-01-14 08:44:26 -05001811static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1812{
1813 /* check if flash geometry needs reversal */
1814 if (qry->num_erase_regions > 1) {
1815 /* reverse geometry if top boot part */
1816 if (info->cfi_version < 0x3131) {
1817 /* CFI < 1.1, guess by device id (only M29W320ET now) */
1818 if (info->device_id == 0x2256) {
1819 cfi_reverse_geometry(qry);
1820 }
1821 }
1822 }
1823}
1824
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001825/*
wdenk5653fc32004-02-08 22:55:38 +00001826 * The following code cannot be run from FLASH!
1827 *
1828 */
Marian Balakowicze6f2e902005-10-11 19:09:42 +02001829ulong flash_get_size (ulong base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001830{
wdenkbf9e3b32004-02-12 00:47:09 +00001831 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001832 int i, j;
1833 flash_sect_t sect_cnt;
1834 unsigned long sector;
1835 unsigned long tmp;
1836 int size_ratio;
1837 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001838 int erase_region_size;
1839 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001840 struct cfi_qry qry;
Stefan Roese260421a2006-11-13 13:55:24 +01001841
Kumar Galaf9796902008-05-15 15:13:08 -05001842 memset(&qry, 0, sizeof(qry));
1843
Stefan Roese260421a2006-11-13 13:55:24 +01001844 info->ext_addr = 0;
1845 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001846#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001847 info->legacy_unlock = 0;
1848#endif
wdenk5653fc32004-02-08 22:55:38 +00001849
1850 info->start[0] = base;
1851
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001852 if (flash_detect_cfi (info, &qry)) {
1853 info->vendor = le16_to_cpu(qry.p_id);
1854 info->ext_addr = le16_to_cpu(qry.p_adr);
1855 num_erase_regions = qry.num_erase_regions;
1856
Stefan Roese260421a2006-11-13 13:55:24 +01001857 if (info->ext_addr) {
1858 info->cfi_version = (ushort) flash_read_uchar (info,
1859 info->ext_addr + 3) << 8;
1860 info->cfi_version |= (ushort) flash_read_uchar (info,
1861 info->ext_addr + 4);
1862 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001863
wdenkbf9e3b32004-02-12 00:47:09 +00001864#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001865 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001866#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001867
wdenkbf9e3b32004-02-12 00:47:09 +00001868 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001869 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001870 case CFI_CMDSET_INTEL_STANDARD:
1871 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001872 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001873 break;
1874 case CFI_CMDSET_AMD_STANDARD:
1875 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001876 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001877 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001878 default:
1879 printf("CFI: Unknown command set 0x%x\n",
1880 info->vendor);
1881 /*
1882 * Unfortunately, this means we don't know how
1883 * to get the chip back to Read mode. Might
1884 * as well try an Intel-style reset...
1885 */
1886 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1887 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001888 }
wdenkcd37d9e2004-02-10 00:03:41 +00001889
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001890 /* Do manufacturer-specific fixups */
1891 switch (info->manufacturer_id) {
1892 case 0x0001:
1893 flash_fixup_amd(info, &qry);
1894 break;
1895 case 0x001f:
1896 flash_fixup_atmel(info, &qry);
1897 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001898 case 0x0020:
1899 flash_fixup_stm(info, &qry);
1900 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001901 }
1902
wdenkbf9e3b32004-02-12 00:47:09 +00001903 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001904 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1905 debug ("device id is 0x%x\n", info->device_id);
1906 debug ("device id2 is 0x%x\n", info->device_id2);
1907 debug ("cfi version is 0x%04x\n", info->cfi_version);
1908
wdenk5653fc32004-02-08 22:55:38 +00001909 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001910 /* if the chip is x8/x16 reduce the ratio by half */
1911 if ((info->interface == FLASH_CFI_X8X16)
1912 && (info->chipwidth == FLASH_CFI_BY8)) {
1913 size_ratio >>= 1;
1914 }
wdenkbf9e3b32004-02-12 00:47:09 +00001915 debug ("size_ratio %d port %d bits chip %d bits\n",
1916 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1917 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1918 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001919 sect_cnt = 0;
1920 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001921 for (i = 0; i < num_erase_regions; i++) {
1922 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001923 printf ("%d erase regions found, only %d used\n",
1924 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001925 break;
1926 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001927
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001928 tmp = le32_to_cpu(qry.erase_region_info[i]);
1929 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001930
1931 erase_region_count = (tmp & 0xffff) + 1;
1932 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001933 erase_region_size =
1934 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001935 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001936 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001937 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001938 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001939 printf("ERROR: too many flash sectors\n");
1940 break;
1941 }
wdenk5653fc32004-02-08 22:55:38 +00001942 info->start[sect_cnt] = sector;
1943 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001944
1945 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001946 * Only read protection status from
1947 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001948 */
1949 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001950 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001951 case CFI_CMDSET_INTEL_EXTENDED:
1952 case CFI_CMDSET_INTEL_STANDARD:
1953 info->protect[sect_cnt] =
1954 flash_isset (info, sect_cnt,
1955 FLASH_OFFSET_PROTECT,
1956 FLASH_STATUS_PROTECT);
1957 break;
1958 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001959 /* default: not protected */
1960 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00001961 }
1962
wdenk5653fc32004-02-08 22:55:38 +00001963 sect_cnt++;
1964 }
1965 }
1966
1967 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001968 info->size = 1 << qry.dev_size;
wdenk5653fc32004-02-08 22:55:38 +00001969 /* multiply the size by the number of chips */
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001970 info->size *= size_ratio;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001971 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1972 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001973 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001974 (1 << qry.block_erase_timeout_max);
1975 tmp = (1 << qry.buf_write_timeout_typ) *
1976 (1 << qry.buf_write_timeout_max);
1977
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001978 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001979 info->buffer_write_tout = (tmp + 999) / 1000;
1980 tmp = (1 << qry.word_write_timeout_typ) *
1981 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001982 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001983 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00001984 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001985 if ((info->interface == FLASH_CFI_X8X16) &&
1986 (info->chipwidth == FLASH_CFI_BY8)) {
1987 /* XXX - Need to test on x8/x16 in parallel. */
1988 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00001989 }
Mike Frysinger22159872008-10-02 01:55:38 -04001990
1991 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00001992 }
1993
wdenkbf9e3b32004-02-12 00:47:09 +00001994 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00001995}
1996
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001997void flash_set_verbose(uint v)
1998{
1999 flash_verbose = v;
2000}
2001
wdenk5653fc32004-02-08 22:55:38 +00002002/*-----------------------------------------------------------------------
2003 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002004unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00002005{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002006 unsigned long size = 0;
2007 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002008#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002009 struct apl_s {
2010 ulong start;
2011 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002012 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002013#endif
wdenk5653fc32004-02-08 22:55:38 +00002014
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002015#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002016 char *s = getenv("unlock");
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002017#endif
wdenk5653fc32004-02-08 22:55:38 +00002018
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002019#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002020
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002021 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002022 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002023 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002024
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002025 if (!flash_detect_legacy (BANK_BASE(i), i))
2026 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002027 size += flash_info[i].size;
2028 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002029#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002030 printf ("## Unknown FLASH on Bank %d "
2031 "- Size = 0x%08lx = %ld MB\n",
2032 i+1, flash_info[i].size,
2033 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002034#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002035 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002036#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002037 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2038 /*
2039 * Only the U-Boot image and it's environment
2040 * is protected, all other sectors are
2041 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002042 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002043 * and the environment variable "unlock" is
2044 * set to "yes".
2045 */
2046 if (flash_info[i].legacy_unlock) {
2047 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002048
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002049 /*
2050 * Disable legacy_unlock temporarily,
2051 * since flash_real_protect would
2052 * relock all other sectors again
2053 * otherwise.
2054 */
2055 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002056
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002057 /*
2058 * Legacy unlocking (e.g. Intel J3) ->
2059 * unlock only one sector. This will
2060 * unlock all sectors.
2061 */
2062 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002063
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002064 flash_info[i].legacy_unlock = 1;
2065
2066 /*
2067 * Manually mark other sectors as
2068 * unlocked (unprotected)
2069 */
2070 for (k = 1; k < flash_info[i].sector_count; k++)
2071 flash_info[i].protect[k] = 0;
2072 } else {
2073 /*
2074 * No legancy unlocking -> unlock all sectors
2075 */
2076 flash_protect (FLAG_PROTECT_CLEAR,
2077 flash_info[i].start[0],
2078 flash_info[i].start[0]
2079 + flash_info[i].size - 1,
2080 &flash_info[i]);
2081 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002082 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002083#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002084 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002085
2086 /* Monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002087#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002088 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002089 CONFIG_SYS_MONITOR_BASE,
2090 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2091 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002092#endif
2093
2094 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002095#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002096 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002097 CONFIG_ENV_ADDR,
2098 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2099 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002100#endif
2101
2102 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002103#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002104 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002105 CONFIG_ENV_ADDR_REDUND,
2106 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
2107 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002108#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002109
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002110#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002111 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2112 debug("autoprotecting from %08x to %08x\n",
2113 apl[i].start, apl[i].start + apl[i].size - 1);
2114 flash_protect (FLAG_PROTECT_SET,
2115 apl[i].start,
2116 apl[i].start + apl[i].size - 1,
2117 flash_get_info(apl[i].start));
2118 }
2119#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002120
2121#ifdef CONFIG_FLASH_CFI_MTD
2122 cfi_mtd_init();
2123#endif
2124
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002125 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002126}