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Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap393cb362011-12-06 23:34:12 +00004 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyape21185b2011-05-24 20:02:56 +00005 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyape21185b2011-05-24 20:02:56 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/* High Level Configuration Options */
Chander Kashyape21185b2011-05-24 20:02:56 +000013#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
14#define CONFIG_S5P 1 /* S5P Family */
Akshay Saraswat9b97b722014-05-13 10:30:15 +053015#define CONFIG_EXYNOS4 /* EXYNOS4 Family */
Chander Kashyap393cb362011-12-06 23:34:12 +000016#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyape21185b2011-05-24 20:02:56 +000017#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
18
19#include <asm/arch/cpu.h> /* get chip and board defs */
20
21#define CONFIG_ARCH_CPU_INIT
22#define CONFIG_DISPLAY_CPUINFO
23#define CONFIG_DISPLAY_BOARDINFO
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +053024#define CONFIG_BOARD_EARLY_INIT_F
Chander Kashyape21185b2011-05-24 20:02:56 +000025
Chander Kashyapb3c5a492011-09-20 21:25:01 +000026/* Mach Type */
27#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
28
Chander Kashyape21185b2011-05-24 20:02:56 +000029#define CONFIG_SYS_SDRAM_BASE 0x40000000
30#define CONFIG_SYS_TEXT_BASE 0x43E00000
31
32/* input clock of PLL: SMDKV310 has 24MHz input clock */
33#define CONFIG_SYS_CLK_FREQ 24000000
34
35#define CONFIG_SETUP_MEMORY_TAGS
36#define CONFIG_CMDLINE_TAG
37#define CONFIG_INITRD_TAG
38#define CONFIG_CMDLINE_EDITING
39
40/* Handling Sleep Mode*/
41#define S5P_CHECK_SLEEP 0x00000BAD
42#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053043#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyape21185b2011-05-24 20:02:56 +000044
45/* Size of malloc() pool */
46#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
47
48/* select serial console configuration */
Chander Kashyape21185b2011-05-24 20:02:56 +000049#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
50#define CONFIG_BAUDRATE 115200
Chander Kashyap393cb362011-12-06 23:34:12 +000051#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
Chander Kashyape21185b2011-05-24 20:02:56 +000052
53/* SD/MMC configuration */
Jaehoon Chung7d2d58b2012-04-23 02:36:29 +000054#define CONFIG_GENERIC_MMC
55#define CONFIG_MMC
56#define CONFIG_SDHCI
57#define CONFIG_S5P_SDHCI
Chander Kashyape21185b2011-05-24 20:02:56 +000058
59/* PWM */
60#define CONFIG_PWM 1
61
62/* allow to overwrite serial and ethaddr */
63#define CONFIG_ENV_OVERWRITE
64
65/* Command definition*/
66#include <config_cmd_default.h>
67
68#define CONFIG_CMD_PING
69#define CONFIG_CMD_ELF
70#define CONFIG_CMD_DHCP
71#define CONFIG_CMD_MMC
72#define CONFIG_CMD_NET
73#define CONFIG_CMD_FAT
74
75#define CONFIG_BOOTDELAY 3
76#define CONFIG_ZERO_BOOTDELAY_CHECK
Chander Kashyap5187d8d2011-09-20 21:25:03 +000077
78/* MMC SPL */
79#define CONFIG_SPL
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053080#define CONFIG_SKIP_LOWLEVEL_INIT
Chander Kashyap9b3ab1c2011-09-20 21:25:04 +000081#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyape21185b2011-05-24 20:02:56 +000082
Inderpal Singh8a000612013-04-04 23:09:21 +000083#define CONFIG_SPL_TEXT_BASE 0x02021410
84
Chander Kashyape21185b2011-05-24 20:02:56 +000085#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
86
87/* Miscellaneous configurable options */
88#define CONFIG_SYS_LONGHELP /* undef to save memory */
89#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Chander Kashyape21185b2011-05-24 20:02:56 +000090#define CONFIG_SYS_PROMPT "SMDKV310 # "
91#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
92#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
93#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
94#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
95/* Boot Argument Buffer Size */
96#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
97/* memtest works on */
98#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
99#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
100#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
101
Chander Kashyape21185b2011-05-24 20:02:56 +0000102/* SMDKV310 has 4 bank of DRAM */
103#define CONFIG_NR_DRAM_BANKS 4
104#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
105#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
106#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
107#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
108#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
109#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
110#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
111#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
112#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
113
114/* FLASH and environment organization */
115#define CONFIG_SYS_NO_FLASH 1
116#undef CONFIG_CMD_IMLS
117#define CONFIG_IDENT_STRING " for SMDKC210/V310"
118
Chander Kashyape21185b2011-05-24 20:02:56 +0000119#define CONFIG_CLK_1000_400_200
120
121/* MIU (Memory Interleaving Unit) */
122#define CONFIG_MIU_2BIT_INTERLEAVED
123
124#define CONFIG_ENV_IS_IN_MMC 1
125#define CONFIG_SYS_MMC_ENV_DEV 0
126#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
127#define RESERVE_BLOCK_SIZE (512)
128#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
129#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
130#define CONFIG_DOS_PARTITION 1
131
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +0530132#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
133#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
134
135#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyape21185b2011-05-24 20:02:56 +0000136
137/* U-boot copy size from boot Media to DRAM.*/
138#define COPY_BL2_SIZE 0x80000
139#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
140#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
141
142/* Ethernet Controllor Driver */
143#ifdef CONFIG_CMD_NET
Chander Kashyape21185b2011-05-24 20:02:56 +0000144#define CONFIG_SMC911X
145#define CONFIG_SMC911X_BASE 0x5000000
146#define CONFIG_SMC911X_16_BIT
147#define CONFIG_ENV_SROM_BANK 1
148#endif /*CONFIG_CMD_NET*/
Thomas Abraham07407d92011-06-03 22:52:17 +0000149
150/* Enable devicetree support */
151#define CONFIG_OF_LIBFDT
Chander Kashyape21185b2011-05-24 20:02:56 +0000152#endif /* __CONFIG_H */