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Tom Rini83d290c2018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
Dinh Nguyen77754402012-10-04 06:46:02 +00002#
3# (C) Copyright 2000-2003
4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5#
Ley Foon Tand89e9792017-04-26 02:44:48 +08006# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
Siew Chin Lim1bc20892021-03-01 20:04:11 +08007# Copyright (C) 2017-2020 Intel Corporation <www.intel.com>
Dinh Nguyen77754402012-10-04 06:46:02 +00008
Ley Foon Tand89e9792017-04-26 02:44:48 +08009obj-y += board.o
10obj-y += clock_manager.o
Ley Foon Tand89e9792017-04-26 02:44:48 +080011obj-y += misc.o
Dinh Nguyene5ad7d92015-12-02 13:31:32 -060012
Ley Foon Tand89e9792017-04-26 02:44:48 +080013ifdef CONFIG_TARGET_SOCFPGA_GEN5
14obj-y += clock_manager_gen5.o
15obj-y += misc_gen5.o
16obj-y += reset_manager_gen5.o
17obj-y += scan_manager.o
18obj-y += system_manager_gen5.o
Ley Foon Tan73aede52018-05-24 00:17:29 +080019obj-y += timer.o
Ley Foon Tand89e9792017-04-26 02:44:48 +080020obj-y += wrap_pll_config.o
Tien Fong Chee6867e192017-07-26 13:05:38 +080021obj-y += fpga_manager.o
Ley Foon Tand89e9792017-04-26 02:44:48 +080022endif
Ley Foon Tan827e6a72017-04-26 02:44:38 +080023
Ley Foon Tand89e9792017-04-26 02:44:48 +080024ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
25obj-y += clock_manager_arria10.o
26obj-y += misc_arria10.o
27obj-y += pinmux_arria10.o
28obj-y += reset_manager_arria10.o
29endif
Marek Vasutca62d2e2015-08-02 21:12:09 +020030
Ley Foon Tan508791a2018-05-18 22:05:22 +080031ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
32obj-y += clock_manager_s10.o
Chee Hong Angac0c1fd2020-12-24 18:20:58 +080033obj-y += lowlevel_init_soc64.o
Ley Foon Tana280e9d2018-05-24 00:17:25 +080034obj-y += mailbox_s10.o
Ley Foon Tand5591302018-05-24 00:17:24 +080035obj-y += misc_s10.o
Ley Foon Tan914a84e2018-05-24 00:17:26 +080036obj-y += mmu-arm64_s10.o
Ley Foon Tan3607a802018-05-18 22:05:23 +080037obj-y += reset_manager_s10.o
Siew Chin Limbab26532021-03-24 13:11:36 +080038obj-y += system_manager_soc64.o
Ley Foon Tan73aede52018-05-24 00:17:29 +080039obj-y += timer_s10.o
Siew Chin Lime2ffb1d2021-03-24 13:11:38 +080040obj-y += wrap_handoff_soc64.o
Siew Chin Limd623e522021-03-24 13:11:35 +080041obj-y += wrap_pll_config_soc64.o
Ley Foon Tan508791a2018-05-18 22:05:22 +080042endif
Ley Foon Tan4765ddb2018-05-24 00:17:28 +080043
Ley Foon Tanb4a20cb2019-11-27 15:55:23 +080044ifdef CONFIG_TARGET_SOCFPGA_AGILEX
45obj-y += clock_manager_agilex.o
Chee Hong Angac0c1fd2020-12-24 18:20:58 +080046obj-y += lowlevel_init_soc64.o
Ley Foon Tana76b7112019-11-27 15:55:32 +080047obj-y += mailbox_s10.o
48obj-y += misc_s10.o
49obj-y += mmu-arm64_s10.o
50obj-y += reset_manager_s10.o
Siew Chin Lim1bc20892021-03-01 20:04:11 +080051obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o
Siew Chin Limbab26532021-03-24 13:11:36 +080052obj-y += system_manager_soc64.o
Ley Foon Tana76b7112019-11-27 15:55:32 +080053obj-y += timer_s10.o
Siew Chin Lim1025b532021-03-01 20:04:12 +080054obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o
Siew Chin Lime2ffb1d2021-03-24 13:11:38 +080055obj-y += wrap_handoff_soc64.o
Siew Chin Limd623e522021-03-24 13:11:35 +080056obj-y += wrap_pll_config_soc64.o
Ley Foon Tanb4a20cb2019-11-27 15:55:23 +080057endif
58
Ley Foon Tand89e9792017-04-26 02:44:48 +080059ifdef CONFIG_SPL_BUILD
Ley Foon Tand89e9792017-04-26 02:44:48 +080060ifdef CONFIG_TARGET_SOCFPGA_GEN5
Ley Foon Tanc859f2a2018-05-24 00:17:27 +080061obj-y += spl_gen5.o
Ley Foon Tand89e9792017-04-26 02:44:48 +080062obj-y += freeze_controller.o
63obj-y += wrap_iocsr_config.o
64obj-y += wrap_pinmux_config.o
65obj-y += wrap_sdram_config.o
66endif
Ley Foon Tanc859f2a2018-05-24 00:17:27 +080067ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
68obj-y += spl_a10.o
69endif
Ley Foon Tan4765ddb2018-05-24 00:17:28 +080070ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
Ley Foon Tan8b7962a2019-11-27 15:55:15 +080071obj-y += firewall.o
Ley Foon Tan4765ddb2018-05-24 00:17:28 +080072obj-y += spl_s10.o
Siew Chin Limf86ed752021-03-15 15:59:16 +080073obj-y += spl_soc64.o
Ley Foon Tan4765ddb2018-05-24 00:17:28 +080074endif
Ley Foon Tan594cacf2019-11-27 15:55:29 +080075ifdef CONFIG_TARGET_SOCFPGA_AGILEX
Ley Foon Tana76b7112019-11-27 15:55:32 +080076obj-y += firewall.o
Ley Foon Tan594cacf2019-11-27 15:55:29 +080077obj-y += spl_agilex.o
Siew Chin Limf86ed752021-03-15 15:59:16 +080078obj-y += spl_soc64.o
Ley Foon Tan594cacf2019-11-27 15:55:29 +080079endif
Chee Hong Ang0eebfab2020-12-24 18:21:00 +080080else
Siew Chin Lim2e54a1d2020-12-24 18:21:02 +080081obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o
Chee Hong Ang0eebfab2020-12-24 18:21:00 +080082obj-$(CONFIG_SPL_ATF) += smc_api.o
Ley Foon Tand89e9792017-04-26 02:44:48 +080083endif
84
85ifdef CONFIG_TARGET_SOCFPGA_GEN5
Marek Vasutca62d2e2015-08-02 21:12:09 +020086# QTS-generated config file wrappers
Marek Vasutca62d2e2015-08-02 21:12:09 +020087CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
88CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
89CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
90CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)
Ley Foon Tand89e9792017-04-26 02:44:48 +080091endif