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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / e48eeb9ea3aed67e4bda94c65a7f13e8672a3501 / . / arch / sandbox / dts / test.dts
blob: 7dde95d4b1e858fd12c881afb1617033e12e33f0 [file] [log] [blame]
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]1/dts-v1/;
2
3/ {
4 model = "sandbox";
5 compatible = "sandbox";
6 #address-cells = <1>;
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]7 #size-cells = <1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]8
Simon Glass00606d72014-07-23 06:55:03 -0600[diff] [blame]9 aliases {
10 console = &uart0;
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]11 eth0 = "/eth@10002000";
Bin Meng71d79712015-08-27 22:25:53 -0700[diff] [blame]12 eth3 = &eth_3;
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]13 eth5 = &eth_5;
Simon Glass9cc36a22015-01-25 08:27:05 -0700[diff] [blame]14 i2c0 = "/i2c@0";
Simon Glasse48eeb92017-04-23 20:02:07 -0600[diff] [blame^]15 mmc0 = "/mmc0";
16 mmc1 = "/mmc1";
Przemyslaw Marczakf64000c2015-05-13 13:38:34 +0200[diff] [blame]17 pci0 = &pci;
Nishanth Menon52159402015-09-17 15:42:41 -0500[diff] [blame]18 remoteproc1 = &rproc_1;
19 remoteproc2 = &rproc_2;
Simon Glass52d3bc52015-05-22 15:42:17 -0600[diff] [blame]20 rtc0 = &rtc_0;
21 rtc1 = &rtc_1;
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]22 spi0 = "/spi@0";
Przemyslaw Marczakf64000c2015-05-13 13:38:34 +0200[diff] [blame]23 testfdt6 = "/e-test";
Simon Glass9cc36a22015-01-25 08:27:05 -0700[diff] [blame]24 testbus3 = "/some-bus";
25 testfdt0 = "/some-bus/c-test@0";
26 testfdt1 = "/some-bus/c-test@1";
27 testfdt3 = "/b-test";
28 testfdt5 = "/some-bus/c-test@5";
29 testfdt8 = "/a-test";
Simon Glasse00cb222015-03-25 12:23:05 -0600[diff] [blame]30 usb0 = &usb_0;
31 usb1 = &usb_1;
32 usb2 = &usb_2;
Simon Glass00606d72014-07-23 06:55:03 -0600[diff] [blame]33 };
34
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]35 a-test {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]36 reg = <0 1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]37 compatible = "denx,u-boot-fdt-test";
Simon Glasseb9ef5f2014-07-23 06:54:57 -0600[diff] [blame]38 ping-expect = <0>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]39 ping-add = <0>;
Simon Glass00606d72014-07-23 06:55:03 -0600[diff] [blame]40 u-boot,dm-pre-reloc;
Simon Glass3669e0e2015-01-05 20:05:29 -0700[diff] [blame]41 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
42 <0>, <&gpio_a 12>;
43 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
44 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
45 <&gpio_b 9 0xc 3 2 1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]46 };
47
48 junk {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]49 reg = <1 1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]50 compatible = "not,compatible";
51 };
52
53 no-compatible {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]54 reg = <2 1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]55 };
56
57 b-test {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]58 reg = <3 1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]59 compatible = "denx,u-boot-fdt-test";
Simon Glasseb9ef5f2014-07-23 06:54:57 -0600[diff] [blame]60 ping-expect = <3>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]61 ping-add = <3>;
62 };
63
Jean-Jacques Hiblot86322f52017-04-24 11:51:28 +0200[diff] [blame]64 phy_provider0: gen_phy@0 {
65 compatible = "sandbox,phy";
66 #phy-cells = <1>;
67 };
68
69 phy_provider1: gen_phy@1 {
70 compatible = "sandbox,phy";
71 #phy-cells = <0>;
72 broken;
73 };
74
75 gen_phy_user: gen_phy_user {
76 compatible = "simple-bus";
77 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
78 phy-names = "phy1", "phy2", "phy3";
79 };
80
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]81 some-bus {
82 #address-cells = <1>;
83 #size-cells = <0>;
Simon Glass1ca7e202014-07-23 06:55:18 -0600[diff] [blame]84 compatible = "denx,u-boot-test-bus";
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]85 reg = <3 1>;
Simon Glasseb9ef5f2014-07-23 06:54:57 -0600[diff] [blame]86 ping-expect = <4>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]87 ping-add = <4>;
Simon Glass1ca7e202014-07-23 06:55:18 -0600[diff] [blame]88 c-test@5 {
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]89 compatible = "denx,u-boot-fdt-test";
90 reg = <5>;
Simon Glass1ca7e202014-07-23 06:55:18 -0600[diff] [blame]91 ping-expect = <5>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]92 ping-add = <5>;
93 };
Simon Glass1ca7e202014-07-23 06:55:18 -0600[diff] [blame]94 c-test@0 {
95 compatible = "denx,u-boot-fdt-test";
96 reg = <0>;
97 ping-expect = <6>;
98 ping-add = <6>;
99 };
100 c-test@1 {
101 compatible = "denx,u-boot-fdt-test";
102 reg = <1>;
103 ping-expect = <7>;
104 ping-add = <7>;
105 };
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]106 };
107
108 d-test {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]109 reg = <3 1>;
Simon Glass5a66a8f2014-07-23 06:55:12 -0600[diff] [blame]110 ping-expect = <6>;
111 ping-add = <6>;
112 compatible = "google,another-fdt-test";
113 };
114
115 e-test {
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]116 reg = <3 1>;
Simon Glasseb9ef5f2014-07-23 06:54:57 -0600[diff] [blame]117 ping-expect = <6>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]118 ping-add = <6>;
119 compatible = "google,another-fdt-test";
120 };
121
Simon Glass9cc36a22015-01-25 08:27:05 -0700[diff] [blame]122 f-test {
123 compatible = "denx,u-boot-fdt-test";
124 };
125
126 g-test {
127 compatible = "denx,u-boot-fdt-test";
128 };
129
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]130 clk_fixed: clk-fixed {
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 clock-frequency = <1234>;
134 };
135
136 clk_sandbox: clk-sbox {
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]137 compatible = "sandbox,clk";
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]138 #clock-cells = <1>;
139 };
140
141 clk-test {
142 compatible = "sandbox,clk-test";
143 clocks = <&clk_fixed>,
144 <&clk_sandbox 1>,
145 <&clk_sandbox 0>;
146 clock-names = "fixed", "i2c", "spi";
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]147 };
148
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]149 eth@10002000 {
150 compatible = "sandbox,eth";
151 reg = <0x10002000 0x1000>;
152 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>;
153 };
154
155 eth_5: eth@10003000 {
156 compatible = "sandbox,eth";
157 reg = <0x10003000 0x1000>;
158 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>;
159 };
160
Bin Meng71d79712015-08-27 22:25:53 -0700[diff] [blame]161 eth_3: sbe5 {
162 compatible = "sandbox,eth";
163 reg = <0x10005000 0x1000>;
164 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x33>;
165 };
166
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]167 eth@10004000 {
168 compatible = "sandbox,eth";
169 reg = <0x10004000 0x1000>;
170 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
171 };
172
Simon Glass0ae0cb72014-10-13 23:42:11 -0600[diff] [blame]173 gpio_a: base-gpios {
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]174 compatible = "sandbox,gpio";
Simon Glass3669e0e2015-01-05 20:05:29 -0700[diff] [blame]175 gpio-controller;
176 #gpio-cells = <1>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]177 gpio-bank-name = "a";
178 num-gpios = <20>;
179 };
180
Simon Glass3669e0e2015-01-05 20:05:29 -0700[diff] [blame]181 gpio_b: extra-gpios {
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]182 compatible = "sandbox,gpio";
Simon Glass3669e0e2015-01-05 20:05:29 -0700[diff] [blame]183 gpio-controller;
184 #gpio-cells = <5>;
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]185 gpio-bank-name = "b";
186 num-gpios = <10>;
187 };
Simon Glass0ae0cb72014-10-13 23:42:11 -0600[diff] [blame]188
Simon Glassecc2ed52014-12-10 08:55:55 -0700[diff] [blame]189 i2c@0 {
190 #address-cells = <1>;
191 #size-cells = <0>;
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]192 reg = <0 1>;
Simon Glassecc2ed52014-12-10 08:55:55 -0700[diff] [blame]193 compatible = "sandbox,i2c";
194 clock-frequency = <100000>;
195 eeprom@2c {
196 reg = <0x2c>;
197 compatible = "i2c-eeprom";
198 emul {
199 compatible = "sandbox,i2c-eeprom";
200 sandbox,filename = "i2c.bin";
201 sandbox,size = <256>;
202 };
203 };
Przemyslaw Marczak9038cd52015-05-13 13:38:35 +0200[diff] [blame]204
Simon Glass52d3bc52015-05-22 15:42:17 -0600[diff] [blame]205 rtc_0: rtc@43 {
206 reg = <0x43>;
207 compatible = "sandbox-rtc";
208 emul {
209 compatible = "sandbox,i2c-rtc";
210 };
211 };
212
213 rtc_1: rtc@61 {
214 reg = <0x61>;
215 compatible = "sandbox-rtc";
216 emul {
217 compatible = "sandbox,i2c-rtc";
218 };
219 };
220
Przemyslaw Marczak9038cd52015-05-13 13:38:35 +0200[diff] [blame]221 sandbox_pmic: sandbox_pmic {
222 reg = <0x40>;
223 };
Simon Glassecc2ed52014-12-10 08:55:55 -0700[diff] [blame]224 };
225
Przemyslaw Marczak08d63002015-10-27 13:08:06 +0100[diff] [blame]226 adc@0 {
227 compatible = "sandbox,adc";
228 vdd-supply = <&buck2>;
229 vss-microvolts = <0>;
230 };
231
Simon Glass3c97c4f2016-01-18 19:52:26 -0700[diff] [blame]232 lcd {
233 u-boot,dm-pre-reloc;
234 compatible = "sandbox,lcd-sdl";
235 xres = <1366>;
236 yres = <768>;
237 };
238
Simon Glass3c43fba2015-07-06 12:54:34 -0600[diff] [blame]239 leds {
240 compatible = "gpio-leds";
241
242 iracibble {
243 gpios = <&gpio_a 1 0>;
244 label = "sandbox:red";
245 };
246
247 martinet {
248 gpios = <&gpio_a 2 0>;
249 label = "sandbox:green";
250 };
251 };
252
Stephen Warren8961b522016-05-16 17:41:37 -0600[diff] [blame]253 mbox: mbox {
254 compatible = "sandbox,mbox";
255 #mbox-cells = <1>;
256 };
257
258 mbox-test {
259 compatible = "sandbox,mbox-test";
260 mboxes = <&mbox 100>, <&mbox 1>;
261 mbox-names = "other", "test";
262 };
263
Simon Glasse48eeb92017-04-23 20:02:07 -0600[diff] [blame^]264 mmc2 {
265 compatible = "sandbox,mmc";
266 };
267
268 mmc1 {
269 compatible = "sandbox,mmc";
270 };
271
272 mmc0 {
Simon Glass8e6cc462015-07-06 12:54:32 -0600[diff] [blame]273 compatible = "sandbox,mmc";
274 };
275
Simon Glassd3b7ff12015-03-05 12:25:34 -0700[diff] [blame]276 pci: pci-controller {
277 compatible = "sandbox,pci";
278 device_type = "pci";
279 #address-cells = <3>;
280 #size-cells = <2>;
281 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
282 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
283 pci@1f,0 {
284 compatible = "pci-generic";
285 reg = <0xf800 0 0 0 0>;
286 emul@1f,0 {
287 compatible = "sandbox,swap-case";
288 };
289 };
290 };
291
Stephen Warren61f5ddc2016-07-13 13:45:31 -0600[diff] [blame]292 pwrdom: power-domain {
293 compatible = "sandbox,power-domain";
294 #power-domain-cells = <1>;
295 };
296
297 power-domain-test {
298 compatible = "sandbox,power-domain-test";
299 power-domains = <&pwrdom 2>;
300 };
301
Simon Glass43b41562017-04-16 21:01:11 -0600[diff] [blame]302 pwm {
303 compatible = "sandbox,pwm";
304 };
305
306 pwm2 {
307 compatible = "sandbox,pwm";
308 };
309
Simon Glass64ce0ca2015-07-06 12:54:31 -0600[diff] [blame]310 ram {
311 compatible = "sandbox,ram";
312 };
313
Simon Glass5010d982015-07-06 12:54:29 -0600[diff] [blame]314 reset@0 {
315 compatible = "sandbox,warm-reset";
316 };
317
318 reset@1 {
319 compatible = "sandbox,reset";
320 };
321
Stephen Warren4581b712016-06-17 09:43:59 -0600[diff] [blame]322 resetc: reset-ctl {
323 compatible = "sandbox,reset-ctl";
324 #reset-cells = <1>;
325 };
326
327 reset-ctl-test {
328 compatible = "sandbox,reset-ctl-test";
329 resets = <&resetc 100>, <&resetc 2>;
330 reset-names = "other", "test";
331 };
332
Nishanth Menon52159402015-09-17 15:42:41 -0500[diff] [blame]333 rproc_1: rproc@1 {
334 compatible = "sandbox,test-processor";
335 remoteproc-name = "remoteproc-test-dev1";
336 };
337
338 rproc_2: rproc@2 {
339 compatible = "sandbox,test-processor";
340 internal-memory-mapped;
341 remoteproc-name = "remoteproc-test-dev2";
342 };
343
Simon Glass0ae0cb72014-10-13 23:42:11 -0600[diff] [blame]344 spi@0 {
345 #address-cells = <1>;
346 #size-cells = <0>;
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]347 reg = <0 1>;
Simon Glass0ae0cb72014-10-13 23:42:11 -0600[diff] [blame]348 compatible = "sandbox,spi";
349 cs-gpios = <0>, <&gpio_a 0>;
350 spi.bin@0 {
351 reg = <0>;
352 compatible = "spansion,m25p16", "spi-flash";
353 spi-max-frequency = <40000000>;
354 sandbox,filename = "spi.bin";
355 };
356 };
357
Simon Glass04035fd2015-07-06 12:54:35 -0600[diff] [blame]358 syscon@0 {
359 compatible = "sandbox,syscon0";
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]360 reg = <0x10 4>;
Simon Glass04035fd2015-07-06 12:54:35 -0600[diff] [blame]361 };
362
363 syscon@1 {
364 compatible = "sandbox,syscon1";
Simon Glass0503e822015-07-06 12:54:36 -0600[diff] [blame]365 reg = <0x20 5
366 0x28 6
367 0x30 7
368 0x38 8>;
Simon Glass04035fd2015-07-06 12:54:35 -0600[diff] [blame]369 };
370
Thomas Choue7cc8d12015-12-11 16:27:34 +0800[diff] [blame]371 timer {
372 compatible = "sandbox,timer";
373 clock-frequency = <1000000>;
374 };
375
Simon Glass171e9912015-05-22 15:42:15 -0600[diff] [blame]376 uart0: serial {
377 compatible = "sandbox,serial";
378 u-boot,dm-pre-reloc;
Joe Hershbergerbfacad72015-03-22 17:09:15 -0500[diff] [blame]379 };
380
Simon Glasse00cb222015-03-25 12:23:05 -0600[diff] [blame]381 usb_0: usb@0 {
382 compatible = "sandbox,usb";
383 status = "disabled";
384 hub {
385 compatible = "sandbox,usb-hub";
386 #address-cells = <1>;
387 #size-cells = <0>;
388 flash-stick {
389 reg = <0>;
390 compatible = "sandbox,usb-flash";
391 };
392 };
393 };
394
395 usb_1: usb@1 {
396 compatible = "sandbox,usb";
397 hub {
398 compatible = "usb-hub";
399 usb,device-class = <9>;
400 hub-emul {
401 compatible = "sandbox,usb-hub";
402 #address-cells = <1>;
403 #size-cells = <0>;
Simon Glass431cbd62015-11-08 23:48:01 -0700[diff] [blame]404 flash-stick@0 {
Simon Glasse00cb222015-03-25 12:23:05 -0600[diff] [blame]405 reg = <0>;
406 compatible = "sandbox,usb-flash";
407 sandbox,filepath = "testflash.bin";
408 };
409
Simon Glass431cbd62015-11-08 23:48:01 -0700[diff] [blame]410 flash-stick@1 {
411 reg = <1>;
412 compatible = "sandbox,usb-flash";
413 sandbox,filepath = "testflash1.bin";
414 };
415
416 flash-stick@2 {
417 reg = <2>;
418 compatible = "sandbox,usb-flash";
419 sandbox,filepath = "testflash2.bin";
420 };
421
Simon Glassbff1a712015-11-08 23:48:08 -0700[diff] [blame]422 keyb@3 {
423 reg = <3>;
424 compatible = "sandbox,usb-keyb";
425 };
426
Simon Glasse00cb222015-03-25 12:23:05 -0600[diff] [blame]427 };
428 };
429 };
430
431 usb_2: usb@2 {
432 compatible = "sandbox,usb";
433 status = "disabled";
434 };
435
Mateusz Kulikowskid33776e2016-03-31 23:12:28 +0200[diff] [blame]436 spmi: spmi@0 {
437 compatible = "sandbox,spmi";
438 #address-cells = <0x1>;
439 #size-cells = <0x1>;
440 pm8916@0 {
441 compatible = "qcom,spmi-pmic";
442 reg = <0x0 0x1>;
443 #address-cells = <0x1>;
444 #size-cells = <0x1>;
445
446 spmi_gpios: gpios@c000 {
447 compatible = "qcom,pm8916-gpio";
448 reg = <0xc000 0x400>;
449 gpio-controller;
450 gpio-count = <4>;
451 #gpio-cells = <2>;
452 gpio-bank-name="spmi";
453 };
454 };
455 };
maxims@google.com0753bc22017-04-17 12:00:21 -0700[diff] [blame]456
457 wdt0: wdt@0 {
458 compatible = "sandbox,wdt";
459 };
Simon Glass2e7d35d2014-02-26 15:59:21 -0700[diff] [blame]460};
Przemyslaw Marczak9038cd52015-05-13 13:38:35 +0200[diff] [blame]461
462#include "sandbox_pmic.dtsi"