blob: 39a2a3273d919cd548d790ef96a4c3b10a93ddd5 [file] [log] [blame]
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Patrick Delaunaybc061342018-07-09 15:17:21 +02008 select SPL_DRIVERS_MISC_SUPPORT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tanbfc6bae2018-06-14 18:45:19 +080017 select SPL_DM_RESET
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010018 select SPL_SERIAL_SUPPORT
19 select SPL_SYSCON
Patrick Delaunay006ea182019-02-27 17:01:14 +010020 imply SPL_DISPLAY_PRINT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010021 imply SPL_LIBDISK_SUPPORT
22
23config SYS_SOC
24 default "stm32mp"
25
Patrick Delaunayef84ddd2019-04-18 17:32:36 +020026config SYS_MALLOC_LEN
27 default 0x2000000
28
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010029config TARGET_STM32MP1
30 bool "Support stm32mp1xx"
Patrick Delaunayabf26782019-02-12 11:44:39 +010031 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
Lokesh Vutlaacf15002018-04-26 18:21:26 +053032 select CPU_V7A
Patrick Delaunayabf26782019-02-12 11:44:39 +010033 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
Patrick Delaunay41c79772018-04-16 10:13:24 +020034 select CPU_V7_HAS_VIRT
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010035 select PINCTRL_STM32
Patrick Delaunayd090cba2018-07-09 15:17:20 +020036 select STM32_RCC
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010037 select STM32_RESET
Andre Przywara7842b6a2018-04-12 04:24:46 +030038 select SYS_ARCH_TIMER
Patrick Delaunayabf26782019-02-12 11:44:39 +010039 imply SYSRESET_PSCI if STM32MP1_TRUSTED
40 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010041 help
42 target STMicroelectronics SOC STM32MP1 family
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010043 STM32MP157, STM32MP153 or STM32MP151
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010044 STMicroelectronics MPU with core ARMv7
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010045 dual core A7 for STM32MP157/3, monocore for STM32MP151
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010046
Patrick Delaunayabf26782019-02-12 11:44:39 +010047config STM32MP1_TRUSTED
48 bool "Support trusted boot with TF-A"
49 default y if !SPL
50 select ARM_SMCCC
51 help
52 Say Y here to enable boot with TF-A
53 Trusted boot chain is :
54 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
55 TF-A monitor provides proprietary smc to manage secure devices
56
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010057config SYS_TEXT_BASE
58 prompt "U-Boot base address"
59 default 0xC0100000
60 help
61 configure the U-Boot base address
62 when DDR driver is used:
63 DDR + 1MB (0xC0100000)
64
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010065config NR_DRAM_BANKS
66 default 1
67
Patrick Delaunay11dfd1a2018-03-20 10:54:54 +010068config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
69 hex "Partition on MMC2 to use to load U-Boot from"
70 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
71 default 1
72 help
73 Partition on the second MMC to load U-Boot from when the MMC is being
74 used in raw mode
75
Patrick Delaunay320d2662018-05-17 14:50:46 +020076if DEBUG_UART
77
78config DEBUG_UART_BOARD_INIT
79 default y
80
81# debug on UART4 by default
82config DEBUG_UART_BASE
83 default 0x40010000
84
85# clock source is HSI on reset
86config DEBUG_UART_CLOCK
87 default 64000000
88endif
89
Patrick Delaunay45ccdb62019-02-27 17:01:15 +010090source "board/st/stm32mp1/Kconfig"
91
Patrick Delaunay2514c2d2018-03-12 10:46:10 +010092endif