blob: fd1c48049a9bde51d3c8df18e9a2ab2951da8ee9 [file] [log] [blame]
Alexaf2cbfd2017-02-06 19:17:34 -08001source "drivers/net/phy/Kconfig"
Calvin Johnsona802d1e2018-03-08 15:30:35 +05302source "drivers/net/pfe_eth/Kconfig"
Alexaf2cbfd2017-02-06 19:17:34 -08003
Joe Hershberger05c3e682015-03-22 17:09:10 -05004config DM_ETH
5 bool "Enable Driver Model for Ethernet drivers"
6 depends on DM
7 help
8 Enable driver model for Ethernet.
9
Joe Hershbergerc25f4062018-07-02 14:47:48 -050010 The eth_*() interface will be implemented by the UCLASS_ETH class
11 This is currently implemented in net/eth-uclass.c
Joe Hershberger05c3e682015-03-22 17:09:10 -050012 Look in include/net.h for details.
Joe Hershberger3ea143a2015-03-22 17:09:13 -050013
Alex Kiernanf02b8d12018-04-01 09:22:34 +000014config DRIVER_TI_CPSW
15 bool "TI Common Platform Ethernet Switch"
16 select PHYLIB
17 help
18 This driver supports the TI three port switch gigabit ethernet
19 subsystem found in the TI SoCs.
20
Joe Hershberger3ea143a2015-03-22 17:09:13 -050021menuconfig NETDEVICES
22 bool "Network device support"
23 depends on NET
Joe Hershbergeref0f2f52015-06-22 16:15:30 -050024 default y if DM_ETH
Joe Hershberger3ea143a2015-03-22 17:09:13 -050025 help
26 You must select Y to enable any network device support
27 Generally if you have any networking support this is a given
28
29 If unsure, say Y
30
31if NETDEVICES
32
Philipp Tomsich449ea2c2017-03-26 18:50:23 +020033config PHY_GIGE
34 bool "Enable GbE PHY status parsing and configuration"
35 help
36 Enables support for parsing the status output and for
37 configuring GbE PHYs (affects the inner workings of some
38 commands and miiphyutil.c).
39
Marek Vasute40095f2016-05-24 23:29:09 +020040config AG7XXX
41 bool "Atheros AG7xxx Ethernet MAC support"
42 depends on DM_ETH && ARCH_ATH79
43 select PHYLIB
44 help
45 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
46 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
47
48
Thomas Chou96fa1e42015-10-22 15:29:11 +080049config ALTERA_TSE
50 bool "Altera Triple-Speed Ethernet MAC support"
51 depends on DM_ETH
52 select PHYLIB
53 help
54 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
55 Please find details on the "Triple-Speed Ethernet MegaCore Function
56 Resource Center" of Altera.
57
Suji Velupillaic89782d2017-07-10 14:05:41 -070058config BCM_SF2_ETH
59 bool "Broadcom SF2 (Starfighter2) Ethernet support"
60 select PHYLIB
61 help
62 This is an abstract framework which provides a generic interface
63 to MAC and DMA management for multiple Broadcom SoCs such as
64 Cygnus, NSP and bcm28155_ap platforms.
65
66config BCM_SF2_ETH_DEFAULT_PORT
67 int "Broadcom SF2 (Starfighter2) Ethernet default port number"
68 depends on BCM_SF2_ETH
69 default 0
70 help
71 Default port number for the Starfighter2 ethernet driver.
72
73config BCM_SF2_ETH_GMAC
74 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
75 depends on BCM_SF2_ETH
76 help
77 This flag enables the ethernet support for Broadcom platforms with
78 GMAC such as Cygnus. This driver is based on the framework provided
79 by the BCM_SF2_ETH driver.
80 Say Y to any bcmcygnus based platforms.
81
Stephen Warrenba4dfef2016-10-21 14:46:47 -060082config DWC_ETH_QOS
83 bool "Synopsys DWC Ethernet QOS device support"
84 depends on DM_ETH
85 select PHYLIB
86 help
87 This driver supports the Synopsys Designware Ethernet QOS (Quality
88 Of Service) IP block. The IP supports many options for bus type,
89 clocking/reset structure, and feature list. This driver currently
90 supports the specific configuration used in NVIDIA's Tegra186 chip,
91 but should be extensible to other combinations quite easily.
92
Simon Glassc294ac52015-08-19 09:33:41 -060093config E1000
94 bool "Intel PRO/1000 Gigabit Ethernet support"
95 help
96 This driver supports Intel(R) PRO/1000 gigabit ethernet family of
97 adapters. For more information on how to identify your adapter, go
98 to the Adapter & Driver ID Guide at:
99
100 <http://support.intel.com/support/network/adapter/pro100/21397.htm>
101
102config E1000_SPI_GENERIC
103 bool "Allow access to the Intel 8257x SPI bus"
104 depends on E1000
105 help
106 Allow generic access to the SPI bus on the Intel 8257x, for
107 example with the "sspi" command.
108
109config E1000_SPI
110 bool "Enable SPI bus utility code"
111 depends on E1000
112 help
113 Utility code for direct access to the SPI bus on Intel 8257x.
114 This does not do anything useful unless you set at least one
115 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
116
117config CMD_E1000
118 bool "Enable the e1000 command"
119 depends on E1000
120 help
121 This enables the 'e1000' management command for E1000 devices. When
122 used on devices with SPI support you can reprogram the EEPROM from
123 U-Boot.
124
Joe Hershberger3ea143a2015-03-22 17:09:13 -0500125config ETH_SANDBOX
126 depends on DM_ETH && SANDBOX
127 default y
128 bool "Sandbox: Mocked Ethernet driver"
129 help
130 This driver simply responds with fake ARP replies and ping
131 replies that are used to verify network stack functionality
132
133 This driver is particularly useful in the test/dm/eth.c tests
134
Joe Hershbergera346ca72015-03-22 17:09:21 -0500135config ETH_SANDBOX_RAW
136 depends on DM_ETH && SANDBOX
137 default y
138 bool "Sandbox: Bridge to Linux Raw Sockets"
139 help
140 This driver is a bridge from the bottom of the network stack
141 in U-Boot to the RAW AF_PACKET API in Linux. This allows real
142 network traffic to be tested from within sandbox. See
143 board/sandbox/README.sandbox for more details.
144
Simon Glassef48f6d2015-04-05 16:07:34 -0600145config ETH_DESIGNWARE
146 bool "Synopsys Designware Ethernet MAC"
Thomas Chou25af71c2015-12-07 20:53:29 +0800147 select PHYLIB
Simon Glassef48f6d2015-04-05 16:07:34 -0600148 help
149 This MAC is present in SoCs from various vendors. It supports
150 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
151 provide the PHY (physical media interface).
152
Marek Vasut215a0652018-08-13 19:32:14 +0200153config ETH_DESIGNWARE_SOCFPGA
154 bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
155 depends on DM_ETH && ETH_DESIGNWARE
156 help
157 The Altera SoCFPGA requires additional configuration of the
158 Altera system manager to correctly interface with the PHY.
159 This code handles those SoC specifics.
160
Max Filippovf0727122016-08-05 18:26:15 +0300161config ETHOC
162 bool "OpenCores 10/100 Mbps Ethernet MAC"
163 help
164 This MAC is present in OpenRISC and Xtensa XTFPGA boards.
165
Peng Fanfbada482018-03-28 20:54:14 +0800166config FEC_MXC_SHARE_MDIO
167 bool "Share the MDIO bus for FEC controller"
168 depends on FEC_MXC
169
170config FEC_MXC_MDIO_BASE
171 hex "MDIO base address for the FEC controller"
172 depends on FEC_MXC_SHARE_MDIO
173 help
174 This specifies the MDIO registers base address. It is used when
175 two FEC controllers share MDIO bus.
176
Jagan Teki97d29ca2016-10-08 18:00:12 +0530177config FEC_MXC
178 bool "FEC Ethernet controller"
Anatolij Gustschin58ec4d32018-10-18 16:15:11 +0200179 depends on MX5 || MX6 || MX7 || IMX8
Jagan Teki97d29ca2016-10-08 18:00:12 +0530180 help
181 This driver supports the 10/100 Fast Ethernet controller for
182 NXP i.MX processors.
183
Tom Rini8dc1b172017-05-26 11:18:53 -0400184config FTMAC100
185 bool "Ftmac100 Ethernet Support"
186 help
187 This MAC is present in Andestech SoCs.
188
Cédric Le Goaterf95de0b2018-10-29 07:06:31 +0100189config FTGMAC100
190 bool "Ftgmac100 Ethernet Support"
191 depends on DM_ETH
192 select PHYLIB
193 help
194 This driver supports the Faraday's FTGMAC100 Gigabit SoC
195 Ethernet controller that can be found on Aspeed SoCs (which
196 include NCSI).
197
198 It is fully compliant with IEEE 802.3 specification for
199 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000
200 Mbps Ethernet and includes Reduced Media Independent
201 Interface (RMII) and Reduced Gigabit Media Independent
202 Interface (RGMII) interfaces. It adopts an AHB bus interface
203 and integrates a link list DMA engine with direct M-Bus
204 accesses for transmitting and receiving packets. It has
205 independent TX/RX fifos, supports half and full duplex (1000
206 Mbps mode only supports full duplex), flow control for full
207 duplex and backpressure for half duplex.
208
209 The FTGMAC100 also implements IP, TCP, UDP checksum offloads
210 and supports IEEE 802.1Q VLAN tag insertion and removal. It
211 offers high-priority transmit queue for QoS and CoS
212 applications.
213
214
Chris Packhamed52ea52018-05-03 23:00:35 +1200215config MVGBE
216 bool "Marvell Orion5x/Kirkwood network interface support"
217 depends on KIRKWOOD || ORION5X
Chris Packhamfb731072018-07-09 21:34:00 +1200218 select PHYLIB if DM_ETH
Chris Packhamed52ea52018-05-03 23:00:35 +1200219 help
220 This driver supports the network interface units in the
221 Marvell Orion5x and Kirkwood SoCs
222
Chris Packham7654f622017-08-21 20:17:03 +1200223config MVNETA
Miquel Raynale7ab2cc2017-12-28 15:43:09 +0100224 bool "Marvell Armada XP/385/3700 network interface support"
225 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700
Chris Packham7654f622017-08-21 20:17:03 +1200226 select PHYLIB
227 help
228 This driver supports the network interface units in the
Miquel Raynale7ab2cc2017-12-28 15:43:09 +0100229 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
Chris Packham7654f622017-08-21 20:17:03 +1200230
Stefan Roese99d4c6d2016-02-10 07:22:10 +0100231config MVPP2
Stefan Roesee7935c42017-02-15 11:42:59 +0100232 bool "Marvell Armada 375/7K/8K network interface support"
233 depends on ARMADA_375 || ARMADA_8K
Stefan Roese99d4c6d2016-02-10 07:22:10 +0100234 select PHYLIB
235 help
236 This driver supports the network interface units in the
Stefan Roesee7935c42017-02-15 11:42:59 +0100237 Marvell ARMADA 375, 7K and 8K SoCs.
Stefan Roese99d4c6d2016-02-10 07:22:10 +0100238
Wenyou Yangebcb40a2016-11-02 10:06:55 +0800239config MACB
240 bool "Cadence MACB/GEM Ethernet Interface"
241 depends on DM_ETH
242 select PHYLIB
243 help
244 The Cadence MACB ethernet interface is found on many Atmel
245 AT91 and SAMA5 parts. This driver also supports the Cadence
246 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
247 Say Y to include support for the MACB/GEM chip.
248
Wilson Lee4bf56912017-08-22 20:25:07 -0700249config MACB_ZYNQ
250 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
251 depends on MACB
252 help
253 The Cadence MACB ethernet interface was used on Zynq platform.
254 Say Y to enable support for the MACB/GEM in Zynq chip.
255
Stefan Roesec895ef42018-10-26 14:53:27 +0200256config MT7628_ETH
257 bool "MediaTek MT7628 Ethernet Interface"
258 depends on ARCH_MT7620
259 help
260 The MediaTek MT7628 ethernet interface is used on MT7628 and
261 MT7688 based boards.
262
Bin Mengb68fe152015-08-27 22:25:58 -0700263config PCH_GBE
264 bool "Intel Platform Controller Hub EG20T GMAC driver"
265 depends on DM_ETH && DM_PCI
266 select PHYLIB
267 help
268 This MAC is present in Intel Platform Controller Hub EG20T. It
269 supports 10/100/1000 Mbps operation.
270
Mylène Josserand751b0be2017-04-02 12:59:08 +0200271config RGMII
272 bool "Enable RGMII"
273 help
274 Enable the support of the Reduced Gigabit Media-Independent
275 Interface (RGMII).
276
Adam Fordd7869b22018-07-20 23:03:57 -0500277config MII
278 bool "Enable MII"
279 help
280 Enable support of the Media-Independent Interface (MII)
281
Bin Meng86e9dc82016-03-21 06:47:41 -0700282config RTL8139
283 bool "Realtek 8139 series Ethernet controller driver"
284 help
285 This driver supports Realtek 8139 series fast ethernet family of
286 PCI chipsets/adapters.
287
Bin Meng0764f242016-03-21 06:47:42 -0700288config RTL8169
289 bool "Realtek 8169 series Ethernet controller driver"
290 help
291 This driver supports Realtek 8169 series gigabit ethernet family of
292 PCI/PCIe chipsets/adapters.
293
Adam Ford8daec2d2017-09-05 15:20:44 -0500294config SMC911X
295 bool "SMSC LAN911x and LAN921x controller driver"
296
297if SMC911X
298
299config SMC911X_BASE
300 hex "SMC911X Base Address"
301 help
302 Define this to hold the physical address
303 of the device (I/O space)
304
305choice
306 prompt "SMC911X bus width"
307 default SMC911X_16_BIT
308
309config SMC911X_32_BIT
310 bool "Enable 32-bit interface"
311
312config SMC911X_16_BIT
313 bool "Enable 16-bit interface"
314 help
315 Define this if data bus is 16 bits. If your processor
316 automatically converts one 32 bit word to two 16 bit
317 words you may also try CONFIG_SMC911X_32_BIT.
318
319endchoice
320endif #SMC911X
321
Mylène Josserand4d43d062017-04-02 12:59:03 +0200322config SUN7I_GMAC
323 bool "Enable Allwinner GMAC Ethernet support"
324 help
325 Enable the support for Sun7i GMAC Ethernet controller
326
Stefan Mavrodievaba39242017-11-03 08:56:51 +0200327config SUN7I_GMAC_FORCE_TXERR
328 bool "Force PA17 as gmac function"
329 depends on SUN7I_GMAC
330 help
331 Some ethernet phys needs TXERR control. Since the GMAC
332 doesn't have such signal, setting PA17 as GMAC function
333 makes the pin output low, which enables data transmission.
334
Mylène Josserandabc3e4d2017-04-02 12:59:07 +0200335config SUN4I_EMAC
336 bool "Allwinner Sun4i Ethernet MAC support"
337 depends on DM_ETH
Artturi Alm6270a3f2017-11-08 05:08:58 +0200338 select PHYLIB
Mylène Josserandabc3e4d2017-04-02 12:59:07 +0200339 help
340 This driver supports the Allwinner based SUN4I Ethernet MAC.
341
Amit Singh Tomara29710c2016-07-06 17:59:44 +0530342config SUN8I_EMAC
343 bool "Allwinner Sun8i Ethernet MAC support"
344 depends on DM_ETH
345 select PHYLIB
Philipp Tomsich449ea2c2017-03-26 18:50:23 +0200346 select PHY_GIGE
Amit Singh Tomara29710c2016-07-06 17:59:44 +0530347 help
348 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC.
349 It can be found in H3/A64/A83T based SoCs and compatible with both
Tom Rini7131d2d2017-02-20 09:38:03 -0500350 External and Internal PHYs.
Amit Singh Tomara29710c2016-07-06 17:59:44 +0530351
Nobuhiro Iwamatsudcd18ea2017-12-01 16:08:03 +0900352config SH_ETHER
353 bool "Renesas SH Ethernet MAC"
354 select PHYLIB
355 help
356 This driver supports the Ethernet for Renesas SH and ARM SoCs.
357
Adam Fordd7869b22018-07-20 23:03:57 -0500358config DRIVER_TI_EMAC
359 bool "TI Davinci EMAC"
360 help
361 Support for davinci emac
362
Michal Simek338a5f22015-12-09 16:54:42 +0100363config XILINX_AXIEMAC
364 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
365 select PHYLIB
366 select MII
367 bool "Xilinx AXI Ethernet"
368 help
369 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
370
Michal Simek3229c862015-12-11 09:41:49 +0100371config XILINX_EMACLITE
Zubair Lutfullah Kakakhel2f1f05f2016-07-27 12:25:09 +0100372 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
Michal Simek3229c862015-12-11 09:41:49 +0100373 select PHYLIB
374 select MII
375 bool "Xilinx Ethernetlite"
376 help
377 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
378
Michal Simek596e5782015-11-30 14:34:52 +0100379config ZYNQ_GEM
Michal Simekec48b6c2018-08-22 14:55:27 +0200380 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL)
Michal Simek7bccc752015-12-11 09:14:31 +0100381 select PHYLIB
Michal Simek596e5782015-11-30 14:34:52 +0100382 bool "Xilinx Ethernet GEM"
383 help
Michal Simekc9428102015-12-09 16:53:52 +0100384 This MAC is present in Xilinx Zynq and ZynqMP SoCs.
Michal Simek596e5782015-11-30 14:34:52 +0100385
Purna Chandra Mandal23e75782016-01-28 15:30:21 +0530386config PIC32_ETH
387 bool "Microchip PIC32 Ethernet Support"
388 depends on DM_ETH && MACH_PIC32
389 select PHYLIB
390 help
391 This driver implements 10/100 Mbps Ethernet and MAC layer for
392 Microchip PIC32 microcontrollers.
393
Sjoerd Simons0125bcf2017-01-11 11:46:11 +0100394config GMAC_ROCKCHIP
395 bool "Rockchip Synopsys Designware Ethernet MAC"
396 depends on DM_ETH && ETH_DESIGNWARE
397 help
398 This driver provides Rockchip SoCs network support based on the
399 Synopsys Designware driver.
400
Marek Vasut8ae51b62017-05-13 15:54:28 +0200401config RENESAS_RAVB
402 bool "Renesas Ethernet AVB MAC"
403 depends on DM_ETH && RCAR_GEN3
404 select PHYLIB
405 help
406 This driver implements support for the Ethernet AVB block in
407 Renesas M3 and H3 SoCs.
408
Christophe Leroyfad51ac2017-07-06 10:33:23 +0200409config MPC8XX_FEC
410 bool "Fast Ethernet Controller on MPC8XX"
Christophe Leroyee1e6002018-03-16 17:20:41 +0100411 depends on MPC8xx
Christophe Leroyfad51ac2017-07-06 10:33:23 +0200412 select MII
413 help
414 This driver implements support for the Fast Ethernet Controller
415 on MPC8XX
416
Kunihiko Hayashia8927792018-05-24 19:24:37 +0900417config SNI_AVE
418 bool "Socionext AVE Ethernet support"
419 depends on DM_ETH && ARCH_UNIPHIER
420 select PHYLIB
421 select SYSCON
422 select REGMAP
423 help
424 This driver implements support for the Socionext AVE Ethernet
425 controller, as found on the Socionext UniPhier family.
426
Christophe Leroyfad51ac2017-07-06 10:33:23 +0200427config ETHER_ON_FEC1
428 bool "FEC1"
429 depends on MPC8XX_FEC
430 default y
431
432config FEC1_PHY
433 int "FEC1 PHY"
434 depends on ETHER_ON_FEC1
435 default -1
436 help
437 Define to the hardcoded PHY address which corresponds
438 to the given FEC; i. e.
439 #define CONFIG_FEC1_PHY 4
440 means that the PHY with address 4 is connected to FEC1
441
442 When set to -1, means to probe for first available.
443
444config PHY_NORXERR
445 bool "PHY_NORXERR"
446 depends on ETHER_ON_FEC1
447 default n
448 help
449 The PHY does not have a RXERR line (RMII only).
450 (so program the FEC to ignore it).
451
452config ETHER_ON_FEC2
453 bool "FEC2"
454 depends on MPC8XX_FEC && MPC885
455 default y
456
457config FEC2_PHY
458 int "FEC2 PHY"
459 depends on ETHER_ON_FEC2
460 default -1
461 help
462 Define to the hardcoded PHY address which corresponds
463 to the given FEC; i. e.
464 #define CONFIG_FEC1_PHY 4
465 means that the PHY with address 4 is connected to FEC1
466
467 When set to -1, means to probe for first available.
468
469config FEC2_PHY_NORXERR
470 bool "PHY_NORXERR"
471 depends on ETHER_ON_FEC2
472 default n
473 help
474 The PHY does not have a RXERR line (RMII only).
475 (so program the FEC to ignore it).
476
Ahmed Mansour541d5762017-12-15 16:01:01 -0500477config SYS_DPAA_QBMAN
478 bool "Device tree fixup for QBMan on freescale SOCs"
479 depends on (ARM || PPC) && !SPL_BUILD
480 default y if ARCH_B4860 || \
481 ARCH_B4420 || \
482 ARCH_P1023 || \
483 ARCH_P2041 || \
484 ARCH_T1023 || \
485 ARCH_T1024 || \
486 ARCH_T1040 || \
487 ARCH_T1042 || \
488 ARCH_T2080 || \
489 ARCH_T2081 || \
490 ARCH_T4240 || \
491 ARCH_T4160 || \
492 ARCH_P4080 || \
493 ARCH_P3041 || \
494 ARCH_P5040 || \
495 ARCH_P5020 || \
496 ARCH_LS1043A || \
497 ARCH_LS1046A
498 help
499 QBman fixups to allow deep sleep in DPAA 1 SOCs
500
Mario Six17151052018-03-28 14:38:18 +0200501config TSEC_ENET
502 select PHYLIB
503 bool "Enable Three-Speed Ethernet Controller"
504 help
505 This driver implements support for the (Enhanced) Three-Speed
506 Ethernet Controller found on Freescale SoCs.
507
Joe Hershberger3ea143a2015-03-22 17:09:13 -0500508endif # NETDEVICES