blob: 8589509e012eb737d0ec1ba9d5eccf329ad275b8 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Rick Chene8e39592017-12-26 13:55:48 +08002/*
3 * Startup Code for RISC-V Core
4 *
5 * Copyright (c) 2017 Microsemi Corporation.
6 * Copyright (c) 2017 Padmarao Begari <Padmarao.Begari@microsemi.com>
7 *
8 * Copyright (C) 2017 Andes Technology Corporation
9 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chene8e39592017-12-26 13:55:48 +080010 */
11
12#include <asm-offsets.h>
13#include <config.h>
14#include <common.h>
15#include <elf.h>
16#include <asm/encoding.h>
Bin Meng51ab4572018-12-12 06:12:45 -080017#include <generated/asm-offsets.h>
Rick Chene8e39592017-12-26 13:55:48 +080018
19#ifdef CONFIG_32BIT
Lukas Auerc55309c2018-11-22 11:26:24 +010020#define LREG lw
21#define SREG sw
22#define REGBYTES 4
Rick Chene8e39592017-12-26 13:55:48 +080023#define RELOC_TYPE R_RISCV_32
24#define SYM_INDEX 0x8
25#define SYM_SIZE 0x10
26#else
Lukas Auerc55309c2018-11-22 11:26:24 +010027#define LREG ld
28#define SREG sd
29#define REGBYTES 8
Rick Chene8e39592017-12-26 13:55:48 +080030#define RELOC_TYPE R_RISCV_64
31#define SYM_INDEX 0x20
32#define SYM_SIZE 0x18
33#endif
34
Lukas Auer8ac39e22019-03-17 19:28:40 +010035.section .data
36secondary_harts_relocation_error:
37 .ascii "Relocation of secondary harts has failed, error %d\n"
38
Lukas Auerc55309c2018-11-22 11:26:24 +010039.section .text
Rick Chene8e39592017-12-26 13:55:48 +080040.globl _start
41_start:
Lukas Auerfbfd92b2019-08-21 21:14:43 +020042#if CONFIG_IS_ENABLED(RISCV_MMODE)
Bin Meng4d2583d2019-07-10 23:43:13 -070043 csrr a0, CSR_MHARTID
Lukas Auere0432402019-03-17 19:28:39 +010044#endif
45
Sean Anderson924de322020-09-21 07:51:41 -040046 /*
47 * Save hart id and dtb pointer. The thread pointer register is not
48 * modified by C code. It is used by secondary_hart_loop.
49 */
Lukas Auer1446b262019-03-17 19:28:36 +010050 mv tp, a0
Lukas Auer5d8b2e72018-11-22 11:26:29 +010051 mv s1, a1
52
Sean Anderson85768132020-09-21 07:51:40 -040053 /*
54 * Set the global data pointer to a known value in case we get a very
55 * early trap. The global data pointer will be set its actual value only
56 * after it has been initialized.
57 */
58 mv gp, zero
59
Sean Anderson924de322020-09-21 07:51:41 -040060 /*
61 * Set the trap handler. This must happen after initializing gp because
62 * the handler may use it.
63 */
Lukas Auerc55309c2018-11-22 11:26:24 +010064 la t0, trap_entry
Anup Pateld2db2a82018-12-03 10:57:40 +053065 csrw MODE_PREFIX(tvec), t0
Lukas Auer31f90582018-11-22 11:26:28 +010066
Sean Anderson924de322020-09-21 07:51:41 -040067 /*
68 * Mask all interrupts. Interrupts are disabled globally (in m/sstatus)
69 * for U-Boot, but we will need to read m/sip to determine if we get an
70 * IPI
71 */
Anup Pateld2db2a82018-12-03 10:57:40 +053072 csrw MODE_PREFIX(ie), zero
Rick Chene8e39592017-12-26 13:55:48 +080073
Bin Meng191636e2020-04-16 08:09:30 -070074#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +010075 /* check if hart is within range */
76 /* tp: hart id */
77 li t0, CONFIG_NR_CPUS
78 bge tp, t0, hart_out_of_bounds_loop
Lukas Auer3dea63c2019-03-17 19:28:37 +010079
Lukas Auer3dea63c2019-03-17 19:28:37 +010080 /* set xSIE bit to receive IPIs */
Lukas Auerfbfd92b2019-08-21 21:14:43 +020081#if CONFIG_IS_ENABLED(RISCV_MMODE)
Lukas Auer3dea63c2019-03-17 19:28:37 +010082 li t0, MIE_MSIE
83#else
84 li t0, SIE_SSIE
85#endif
86 csrs MODE_PREFIX(ie), t0
87#endif
88
Rick Chene8e39592017-12-26 13:55:48 +080089/*
Rick Chene8e39592017-12-26 13:55:48 +080090 * Set stackpointer in internal/ex RAM to call board_init_f
91 */
92call_board_init_f:
Lukas Auerc55309c2018-11-22 11:26:24 +010093 li t0, -16
Lukas Auer8c59f202019-08-21 21:14:45 +020094#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
95 li t1, CONFIG_SPL_STACK
96#else
Lukas Auerc55309c2018-11-22 11:26:24 +010097 li t1, CONFIG_SYS_INIT_SP_ADDR
Lukas Auer8c59f202019-08-21 21:14:45 +020098#endif
Lukas Auerc55309c2018-11-22 11:26:24 +010099 and sp, t1, t0 /* force 16 byte alignment */
Rick Chene8e39592017-12-26 13:55:48 +0800100
Rick Chene8e39592017-12-26 13:55:48 +0800101call_board_init_f_0:
102 mv a0, sp
103 jal board_init_f_alloc_reserve
Lukas Auer3dea63c2019-03-17 19:28:37 +0100104
105 /*
Sean Anderson85768132020-09-21 07:51:40 -0400106 * Save global data pointer for later. We don't set it here because it
107 * is not initialized yet.
Lukas Auer3dea63c2019-03-17 19:28:37 +0100108 */
Sean Anderson85768132020-09-21 07:51:40 -0400109 mv s0, a0
Lukas Auer3dea63c2019-03-17 19:28:37 +0100110
111 /* setup stack */
Bin Meng191636e2020-04-16 08:09:30 -0700112#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100113 /* tp: hart id */
114 slli t0, tp, CONFIG_STACK_SIZE_SHIFT
115 sub sp, a0, t0
116#else
Rick Chene8e39592017-12-26 13:55:48 +0800117 mv sp, a0
Lukas Auer3dea63c2019-03-17 19:28:37 +0100118#endif
119
Rick Chenbdce3892019-04-30 13:49:33 +0800120#ifndef CONFIG_XIP
Lukas Auer3dea63c2019-03-17 19:28:37 +0100121 /*
122 * Pick hart to initialize global data and run U-Boot. The other harts
123 * wait for initialization to complete.
124 */
125 la t0, hart_lottery
Brad Kimfb33eaa2020-11-13 20:47:51 +0900126 li t1, 1
Lukas Auer3dea63c2019-03-17 19:28:37 +0100127 amoswap.w s2, t1, 0(t0)
128 bnez s2, wait_for_gd_init
Rick Chenbdce3892019-04-30 13:49:33 +0800129#else
Sean Anderson85768132020-09-21 07:51:40 -0400130 /*
131 * FIXME: gp is set before it is initialized. If an XIP U-Boot ever
132 * encounters a pending IPI on boot it is liable to jump to whatever
133 * memory happens to be in ipi_data.addr on boot. It may also run into
134 * problems if it encounters an exception too early (because printf/puts
135 * accesses gd).
136 */
137 mv gp, s0
Rick Chenbdce3892019-04-30 13:49:33 +0800138 bnez tp, secondary_hart_loop
139#endif
Lukas Auer5d8b2e72018-11-22 11:26:29 +0100140
Rick Chenf9281b82019-04-30 13:49:35 +0800141#ifdef CONFIG_OF_PRIOR_STAGE
Lukas Auer5d8b2e72018-11-22 11:26:29 +0100142 la t0, prior_stage_fdt_address
143 SREG s1, 0(t0)
Rick Chenf9281b82019-04-30 13:49:35 +0800144#endif
Lukas Auer5d8b2e72018-11-22 11:26:29 +0100145
Rick Chene8e39592017-12-26 13:55:48 +0800146 jal board_init_f_init_reserve
147
Atish Patrad4ea6492020-04-21 11:15:01 -0700148 SREG s1, GD_FIRMWARE_FDT_ADDR(gp)
Bin Meng51ab4572018-12-12 06:12:45 -0800149 /* save the boot hart id to global_data */
Lukas Auer1446b262019-03-17 19:28:36 +0100150 SREG tp, GD_BOOT_HART(gp)
Bin Meng51ab4572018-12-12 06:12:45 -0800151
Rick Chenbdce3892019-04-30 13:49:33 +0800152#ifndef CONFIG_XIP
Lukas Auer3dea63c2019-03-17 19:28:37 +0100153 la t0, available_harts_lock
Sean Anderson309995b2020-09-21 07:51:39 -0400154 amoswap.w.rl zero, zero, 0(t0)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100155
156wait_for_gd_init:
157 la t0, available_harts_lock
158 li t1, 1
Sean Anderson309995b2020-09-21 07:51:39 -04001591: amoswap.w.aq t1, t1, 0(t0)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100160 bnez t1, 1b
161
Sean Anderson85768132020-09-21 07:51:40 -0400162 /*
163 * Set the global data pointer only when gd_t has been initialized.
164 * This was already set by arch_setup_gd on the boot hart, but all other
165 * harts' global data pointers gets set here.
166 */
167 mv gp, s0
168
Lukas Auer3dea63c2019-03-17 19:28:37 +0100169 /* register available harts in the available_harts mask */
170 li t1, 1
171 sll t1, t1, tp
172 LREG t2, GD_AVAILABLE_HARTS(gp)
173 or t2, t2, t1
174 SREG t2, GD_AVAILABLE_HARTS(gp)
175
Sean Anderson309995b2020-09-21 07:51:39 -0400176 amoswap.w.rl zero, zero, 0(t0)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100177
178 /*
179 * Continue on hart lottery winner, others branch to
180 * secondary_hart_loop.
181 */
182 bnez s2, secondary_hart_loop
Rick Chenbdce3892019-04-30 13:49:33 +0800183#endif
Lukas Auer3dea63c2019-03-17 19:28:37 +0100184
Lukas Auer2503ccc2019-03-17 19:28:35 +0100185 /* Enable cache */
186 jal icache_enable
187 jal dcache_enable
188
189#ifdef CONFIG_DEBUG_UART
190 jal debug_uart_init
191#endif
192
Lukas Auerc55309c2018-11-22 11:26:24 +0100193 mv a0, zero /* a0 <-- boot_flags = 0 */
194 la t5, board_init_f
Lukas Auer8c59f202019-08-21 21:14:45 +0200195 jalr t5 /* jump to board_init_f() */
196
197#ifdef CONFIG_SPL_BUILD
198spl_clear_bss:
199 la t0, __bss_start
200 la t1, __bss_end
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200201 beq t0, t1, spl_stack_gd_setup
Lukas Auer8c59f202019-08-21 21:14:45 +0200202
203spl_clear_bss_loop:
204 SREG zero, 0(t0)
205 addi t0, t0, REGBYTES
Rick Chen444c4642019-11-14 13:52:27 +0800206 blt t0, t1, spl_clear_bss_loop
Lukas Auer8c59f202019-08-21 21:14:45 +0200207
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200208spl_stack_gd_setup:
209 jal spl_relocate_stack_gd
210
211 /* skip setup if we did not relocate */
212 beqz a0, spl_call_board_init_r
213 mv s0, a0
214
215 /* setup stack on main hart */
Bin Meng191636e2020-04-16 08:09:30 -0700216#if CONFIG_IS_ENABLED(SMP)
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200217 /* tp: hart id */
218 slli t0, tp, CONFIG_STACK_SIZE_SHIFT
219 sub sp, s0, t0
220#else
221 mv sp, s0
222#endif
223
Leo Yu-Chi Liange491e152020-06-29 16:27:28 +0800224#if CONFIG_IS_ENABLED(SMP)
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200225 /* set new stack and global data pointer on secondary harts */
226spl_secondary_hart_stack_gd_setup:
227 la a0, secondary_hart_relocate
228 mv a1, s0
229 mv a2, s0
Lukas Auer90ae2812019-12-08 23:28:51 +0100230 mv a3, zero
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200231 jal smp_call_function
232
233 /* hang if relocation of secondary harts has failed */
234 beqz a0, 1f
235 mv a1, a0
236 la a0, secondary_harts_relocation_error
237 jal printf
238 jal hang
Leo Yu-Chi Liange491e152020-06-29 16:27:28 +0800239#endif
Lukas Auerc7e1eff2019-08-21 21:14:46 +0200240
241 /* set new global data pointer on main hart */
2421: mv gp, s0
243
Lukas Auer8c59f202019-08-21 21:14:45 +0200244spl_call_board_init_r:
245 mv a0, zero
246 mv a1, zero
247 jal board_init_r
248#endif
Rick Chene8e39592017-12-26 13:55:48 +0800249
250/*
Simon Glass94133872019-12-28 10:44:45 -0700251 * void relocate_code(addr_sp, gd, addr_moni)
Rick Chene8e39592017-12-26 13:55:48 +0800252 *
253 * This "function" does not return, instead it continues in RAM
254 * after relocating the monitor code.
255 *
256 */
257.globl relocate_code
258relocate_code:
Lukas Auerc55309c2018-11-22 11:26:24 +0100259 mv s2, a0 /* save addr_sp */
260 mv s3, a1 /* save addr of gd */
261 mv s4, a2 /* save addr of destination */
Rick Chene8e39592017-12-26 13:55:48 +0800262
263/*
264 *Set up the stack
265 */
266stack_setup:
Bin Meng191636e2020-04-16 08:09:30 -0700267#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100268 /* tp: hart id */
269 slli t0, tp, CONFIG_STACK_SIZE_SHIFT
270 sub sp, s2, t0
271#else
Lukas Auerc55309c2018-11-22 11:26:24 +0100272 mv sp, s2
Lukas Auer3dea63c2019-03-17 19:28:37 +0100273#endif
274
Lukas Auerc55309c2018-11-22 11:26:24 +0100275 la t0, _start
276 sub t6, s4, t0 /* t6 <- relocation offset */
277 beq t0, s4, clear_bss /* skip relocation */
Rick Chene8e39592017-12-26 13:55:48 +0800278
Lukas Auerc55309c2018-11-22 11:26:24 +0100279 mv t1, s4 /* t1 <- scratch for copy_loop */
280 la t3, __bss_start
281 sub t3, t3, t0 /* t3 <- __bss_start_ofs */
282 add t2, t0, t3 /* t2 <- source end address */
Rick Chene8e39592017-12-26 13:55:48 +0800283
284copy_loop:
Lukas Auerc55309c2018-11-22 11:26:24 +0100285 LREG t5, 0(t0)
286 addi t0, t0, REGBYTES
287 SREG t5, 0(t1)
288 addi t1, t1, REGBYTES
289 blt t0, t2, copy_loop
Rick Chene8e39592017-12-26 13:55:48 +0800290
291/*
292 * Update dynamic relocations after board_init_f
293 */
294fix_rela_dyn:
Lukas Auerc55309c2018-11-22 11:26:24 +0100295 la t1, __rel_dyn_start
296 la t2, __rel_dyn_end
297 beq t1, t2, clear_bss
298 add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */
299 add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */
Rick Chene8e39592017-12-26 13:55:48 +0800300
301/*
302 * skip first reserved entry: address, type, addend
303 */
Marcus Comstedtf6cb4272019-08-11 14:45:29 +0200304 j 10f
Rick Chene8e39592017-12-26 13:55:48 +0800305
3066:
Lukas Auerc55309c2018-11-22 11:26:24 +0100307 LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
308 li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */
309 bne t5, t3, 8f /* skip non-RISCV_RELOC entries */
310 LREG t3, -(REGBYTES*3)(t1)
311 LREG t5, -(REGBYTES)(t1) /* t5 <-- addend */
312 add t5, t5, t6 /* t5 <-- location to fix up in RAM */
313 add t3, t3, t6 /* t3 <-- location to fix up in RAM */
314 SREG t5, 0(t3)
Marcus Comstedtf6cb4272019-08-11 14:45:29 +0200315 j 10f
Rick Chene8e39592017-12-26 13:55:48 +0800316
3178:
Lukas Auerc55309c2018-11-22 11:26:24 +0100318 la t4, __dyn_sym_start
319 add t4, t4, t6
Rick Chene8e39592017-12-26 13:55:48 +0800320
3219:
Lukas Auerc55309c2018-11-22 11:26:24 +0100322 LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
323 srli t0, t5, SYM_INDEX /* t0 <--- sym table index */
324 andi t5, t5, 0xFF /* t5 <--- relocation type */
325 li t3, RELOC_TYPE
326 bne t5, t3, 10f /* skip non-addned entries */
Rick Chene8e39592017-12-26 13:55:48 +0800327
Lukas Auerc55309c2018-11-22 11:26:24 +0100328 LREG t3, -(REGBYTES*3)(t1)
329 li t5, SYM_SIZE
330 mul t0, t0, t5
Lukas Auer5d8b2e72018-11-22 11:26:29 +0100331 add s5, t4, t0
Marcus Comstedtf6cb4272019-08-11 14:45:29 +0200332 LREG t0, -(REGBYTES)(t1) /* t0 <-- addend */
Lukas Auer5d8b2e72018-11-22 11:26:29 +0100333 LREG t5, REGBYTES(s5)
Marcus Comstedtf6cb4272019-08-11 14:45:29 +0200334 add t5, t5, t0
Lukas Auerc55309c2018-11-22 11:26:24 +0100335 add t5, t5, t6 /* t5 <-- location to fix up in RAM */
336 add t3, t3, t6 /* t3 <-- location to fix up in RAM */
337 SREG t5, 0(t3)
Rick Chene8e39592017-12-26 13:55:48 +080033810:
Lukas Auerc55309c2018-11-22 11:26:24 +0100339 addi t1, t1, (REGBYTES*3)
Marcus Comstedtf6cb4272019-08-11 14:45:29 +0200340 ble t1, t2, 6b
Rick Chene8e39592017-12-26 13:55:48 +0800341
342/*
343 * trap update
344*/
Lukas Auerc55309c2018-11-22 11:26:24 +0100345 la t0, trap_entry
346 add t0, t0, t6
Anup Pateld2db2a82018-12-03 10:57:40 +0530347 csrw MODE_PREFIX(tvec), t0
Rick Chene8e39592017-12-26 13:55:48 +0800348
349clear_bss:
Lukas Auerc55309c2018-11-22 11:26:24 +0100350 la t0, __bss_start /* t0 <- rel __bss_start in FLASH */
351 add t0, t0, t6 /* t0 <- rel __bss_start in RAM */
352 la t1, __bss_end /* t1 <- rel __bss_end in FLASH */
353 add t1, t1, t6 /* t1 <- rel __bss_end in RAM */
Lukas Auer3dea63c2019-03-17 19:28:37 +0100354 beq t0, t1, relocate_secondary_harts
Rick Chene8e39592017-12-26 13:55:48 +0800355
356clbss_l:
Lukas Auer31f90582018-11-22 11:26:28 +0100357 SREG zero, 0(t0) /* clear loop... */
Lukas Auerc55309c2018-11-22 11:26:24 +0100358 addi t0, t0, REGBYTES
Rick Chen444c4642019-11-14 13:52:27 +0800359 blt t0, t1, clbss_l
Rick Chene8e39592017-12-26 13:55:48 +0800360
Lukas Auer3dea63c2019-03-17 19:28:37 +0100361relocate_secondary_harts:
Bin Meng191636e2020-04-16 08:09:30 -0700362#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100363 /* send relocation IPI */
364 la t0, secondary_hart_relocate
365 add a0, t0, t6
366
367 /* store relocation offset */
368 mv s5, t6
369
370 mv a1, s2
371 mv a2, s3
Lukas Auer90ae2812019-12-08 23:28:51 +0100372 mv a3, zero
Lukas Auer3dea63c2019-03-17 19:28:37 +0100373 jal smp_call_function
374
Lukas Auer8ac39e22019-03-17 19:28:40 +0100375 /* hang if relocation of secondary harts has failed */
376 beqz a0, 1f
377 mv a1, a0
378 la a0, secondary_harts_relocation_error
379 jal printf
380 jal hang
381
Lukas Auer3dea63c2019-03-17 19:28:37 +0100382 /* restore relocation offset */
Lukas Auer8ac39e22019-03-17 19:28:40 +01003831: mv t6, s5
Lukas Auer3dea63c2019-03-17 19:28:37 +0100384#endif
385
Rick Chene8e39592017-12-26 13:55:48 +0800386/*
387 * We are done. Do not return, instead branch to second part of board
388 * initialization, now running from RAM.
389 */
390call_board_init_r:
Rick Chen52923c62018-11-07 09:34:06 +0800391 jal invalidate_icache_all
392 jal flush_dcache_all
Sean Anderson40433972020-01-27 16:39:44 -0500393 la t0, board_init_r /* offset of board_init_r() */
394 add t4, t0, t6 /* real address of board_init_r() */
Rick Chene8e39592017-12-26 13:55:48 +0800395/*
396 * setup parameters for board_init_r
397 */
Lukas Auerc55309c2018-11-22 11:26:24 +0100398 mv a0, s3 /* gd_t */
399 mv a1, s4 /* dest_addr */
Rick Chene8e39592017-12-26 13:55:48 +0800400
401/*
402 * jump to it ...
403 */
Lukas Auerc55309c2018-11-22 11:26:24 +0100404 jr t4 /* jump to board_init_r() */
Lukas Auer3dea63c2019-03-17 19:28:37 +0100405
Bin Meng191636e2020-04-16 08:09:30 -0700406#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100407hart_out_of_bounds_loop:
408 /* Harts in this loop are out of bounds, increase CONFIG_NR_CPUS. */
409 wfi
410 j hart_out_of_bounds_loop
Lukas Auer3dea63c2019-03-17 19:28:37 +0100411
Lukas Auer3dea63c2019-03-17 19:28:37 +0100412/* SMP relocation entry */
413secondary_hart_relocate:
414 /* a1: new sp */
415 /* a2: new gd */
416 /* tp: hart id */
417
418 /* setup stack */
419 slli t0, tp, CONFIG_STACK_SIZE_SHIFT
420 sub sp, a1, t0
421
422 /* update global data pointer */
423 mv gp, a2
424#endif
425
Sean Anderson924de322020-09-21 07:51:41 -0400426/*
427 * Interrupts are disabled globally, but they can still be read from m/sip. The
428 * wfi function will wake us up if we get an IPI, even if we do not trap.
429 */
Lukas Auer3dea63c2019-03-17 19:28:37 +0100430secondary_hart_loop:
431 wfi
432
Bin Meng191636e2020-04-16 08:09:30 -0700433#if CONFIG_IS_ENABLED(SMP)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100434 csrr t0, MODE_PREFIX(ip)
Lukas Auerfbfd92b2019-08-21 21:14:43 +0200435#if CONFIG_IS_ENABLED(RISCV_MMODE)
Lukas Auer3dea63c2019-03-17 19:28:37 +0100436 andi t0, t0, MIE_MSIE
437#else
438 andi t0, t0, SIE_SSIE
439#endif
440 beqz t0, secondary_hart_loop
441
442 mv a0, tp
443 jal handle_ipi
444#endif
445
446 j secondary_hart_loop