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Dirk Behmead9bc8e2009-01-28 21:39:58 +01001/*
Tom Rini673283f2011-11-18 12:48:09 +00002 * (C) Copyright 2004-2011
Dirk Behmead9bc8e2009-01-28 21:39:58 +01003 * Texas Instruments, <www.ti.com>
4 *
5 * Author :
6 * Manikandan Pillai <mani.pillai@ti.com>
7 *
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Dirk Behmead9bc8e2009-01-28 21:39:58 +010013 */
14#include <common.h>
Ben Warren736fead2009-07-20 22:01:11 -070015#include <netdev.h>
Dirk Behmead9bc8e2009-01-28 21:39:58 +010016#include <asm/io.h>
17#include <asm/arch/mem.h>
18#include <asm/arch/mux.h>
19#include <asm/arch/sys_proto.h>
Vaibhav Hiremathdcc4f382011-09-03 21:42:35 -040020#include <asm/arch/mmc_host_def.h>
Sanjeev Premi84c3b632011-09-08 10:51:01 -040021#include <asm/gpio.h>
Dirk Behmead9bc8e2009-01-28 21:39:58 +010022#include <i2c.h>
Paul Kocialkowskiaac54502014-11-08 20:55:47 +010023#include <twl4030.h>
Dirk Behmead9bc8e2009-01-28 21:39:58 +010024#include <asm/mach-types.h>
Tom Rini673283f2011-11-18 12:48:09 +000025#include <linux/mtd/nand.h>
Dirk Behmead9bc8e2009-01-28 21:39:58 +010026#include "evm.h"
27
Sriramakrishnanc0682582011-07-18 09:21:55 -040028#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
29#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
30
John Rigby29565322010-12-20 18:27:51 -070031DECLARE_GLOBAL_DATA_PTR;
32
Dirk Behmeb606ef42010-12-18 07:40:28 +010033static u32 omap3_evm_version;
Ajay Kumar Guptab5abf642010-06-10 11:20:49 +053034
Dirk Behmeb606ef42010-12-18 07:40:28 +010035u32 get_omap3_evm_rev(void)
Ajay Kumar Guptab5abf642010-06-10 11:20:49 +053036{
37 return omap3_evm_version;
38}
39
40static void omap3_evm_get_revision(void)
41{
Sanjeev Premi76ee9a22010-11-04 16:02:32 -040042#if defined(CONFIG_CMD_NET)
43 /*
44 * Board revision can be ascertained only by identifying
45 * the Ethernet chipset.
46 */
Ajay Kumar Guptab5abf642010-06-10 11:20:49 +053047 unsigned int smsc_id;
48
49 /* Ethernet PHY ID is stored at ID_REV register */
50 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
51 printf("Read back SMSC id 0x%x\n", smsc_id);
52
53 switch (smsc_id) {
54 /* SMSC9115 chipset */
55 case 0x01150000:
56 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
57 break;
58 /* SMSC 9220 chipset */
59 case 0x92200000:
60 default:
61 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
62 }
Sanjeev Premi76ee9a22010-11-04 16:02:32 -040063#else
64#if defined(CONFIG_STATIC_BOARD_REV)
65 /*
66 * Look for static defintion of the board revision
67 */
68 omap3_evm_version = CONFIG_STATIC_BOARD_REV;
69#else
70 /*
71 * Fallback to the default above.
72 */
73 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
74#endif
75#endif /* CONFIG_CMD_NET */
Ajay Kumar Guptab5abf642010-06-10 11:20:49 +053076}
77
Sanjeev Premi63f42402010-11-04 16:02:29 -040078#ifdef CONFIG_USB_OMAP3
Tom Rix58911512009-04-01 22:02:20 -050079/*
Ajay Kumar Gupta944a4892010-06-10 11:20:50 +053080 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
81 */
82u8 omap3_evm_need_extvbus(void)
83{
84 u8 retval = 0;
85
86 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
87 retval = 1;
88
89 return retval;
90}
Sanjeev Premi63f42402010-11-04 16:02:29 -040091#endif
Ajay Kumar Gupta944a4892010-06-10 11:20:50 +053092
93/*
Dirk Behmead9bc8e2009-01-28 21:39:58 +010094 * Routine: board_init
95 * Description: Early hardware init.
Tom Rix58911512009-04-01 22:02:20 -050096 */
Dirk Behmead9bc8e2009-01-28 21:39:58 +010097int board_init(void)
98{
Dirk Behmead9bc8e2009-01-28 21:39:58 +010099 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
100 /* board id for Linux */
101 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
102 /* boot param addr */
103 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
104
105 return 0;
106}
107
Tom Rini673283f2011-11-18 12:48:09 +0000108#ifdef CONFIG_SPL_BUILD
109/*
110 * Routine: get_board_mem_timings
111 * Description: If we use SPL then there is no x-loader nor config header
112 * so we have to setup the DDR timings ourself on the first bank. This
113 * provides the timing values back to the function that configures
114 * the memory.
115 */
Peter Barada8c4445d2012-11-13 07:40:28 +0000116void get_board_mem_timings(struct board_sdrc_timings *timings)
Tom Rini673283f2011-11-18 12:48:09 +0000117{
118 int pop_mfr, pop_id;
119
120 /*
121 * We need to identify what PoP memory is on the board so that
122 * we know what timings to use. To map the ID values please see
123 * nand_ids.c
124 */
125 identify_nand_chip(&pop_mfr, &pop_id);
126
127 if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
128 /* 256MB DDR */
Peter Barada8c4445d2012-11-13 07:40:28 +0000129 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
130 timings->ctrla = HYNIX_V_ACTIMA_200;
131 timings->ctrlb = HYNIX_V_ACTIMB_200;
Tom Rini673283f2011-11-18 12:48:09 +0000132 } else {
133 /* 128MB DDR */
Peter Barada8c4445d2012-11-13 07:40:28 +0000134 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
135 timings->ctrla = MICRON_V_ACTIMA_165;
136 timings->ctrlb = MICRON_V_ACTIMB_165;
Tom Rini673283f2011-11-18 12:48:09 +0000137 }
Peter Barada8c4445d2012-11-13 07:40:28 +0000138 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
139 timings->mr = MICRON_V_MR_165;
Tom Rini673283f2011-11-18 12:48:09 +0000140}
141#endif
142
Tom Rix58911512009-04-01 22:02:20 -0500143/*
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100144 * Routine: misc_init_r
145 * Description: Init ethernet (done here so udelay works)
Tom Rix58911512009-04-01 22:02:20 -0500146 */
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100147int misc_init_r(void)
148{
149
Heiko Schocher6789e842013-10-22 11:03:18 +0200150#ifdef CONFIG_SYS_I2C_OMAP34XX
151 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100152#endif
153
154#if defined(CONFIG_CMD_NET)
155 setup_net_chip();
156#endif
Sanjeev Premi76ee9a22010-11-04 16:02:32 -0400157 omap3_evm_get_revision();
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100158
Sanjeev Premi6921b312011-07-18 09:20:15 -0400159#if defined(CONFIG_CMD_NET)
160 reset_net_chip();
161#endif
Dirk Behmee6a6a702009-03-12 19:30:50 +0100162 dieid_num_r();
163
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100164 return 0;
165}
166
Tom Rix58911512009-04-01 22:02:20 -0500167/*
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100168 * Routine: set_muxconf_regs
169 * Description: Setting up the configuration Mux registers specific to the
170 * hardware. Many pins need to be moved from protect to primary
171 * mode.
Tom Rix58911512009-04-01 22:02:20 -0500172 */
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100173void set_muxconf_regs(void)
174{
175 MUX_EVM();
176}
177
Sanjeev Premi5626f332011-07-18 09:23:00 -0400178#ifdef CONFIG_CMD_NET
Tom Rix58911512009-04-01 22:02:20 -0500179/*
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100180 * Routine: setup_net_chip
181 * Description: Setting up the configuration GPMC registers specific to the
182 * Ethernet hardware.
Tom Rix58911512009-04-01 22:02:20 -0500183 */
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100184static void setup_net_chip(void)
185{
Dirk Behme97a099e2009-08-08 09:30:21 +0200186 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100187
188 /* Configure GPMC registers */
Dirk Behme89411352009-08-08 09:30:22 +0200189 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
190 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
191 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
192 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
193 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
194 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
195 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100196
197 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
198 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
199 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
200 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
201 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
202 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
203 &ctrl_base->gpmc_nadv_ale);
Sanjeev Premi6921b312011-07-18 09:20:15 -0400204}
205
206/**
207 * Reset the ethernet chip.
208 */
209static void reset_net_chip(void)
210{
Sriramakrishnanc0682582011-07-18 09:21:55 -0400211 int ret;
212 int rst_gpio;
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100213
Sriramakrishnanc0682582011-07-18 09:21:55 -0400214 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
215 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
216 } else {
217 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
218 }
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100219
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400220 ret = gpio_request(rst_gpio, "");
Sriramakrishnanc0682582011-07-18 09:21:55 -0400221 if (ret < 0) {
222 printf("Unable to get GPIO %d\n", rst_gpio);
223 return ;
224 }
225
226 /* Configure as output */
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400227 gpio_direction_output(rst_gpio, 0);
Sriramakrishnanc0682582011-07-18 09:21:55 -0400228
229 /* Send a pulse on the GPIO pin */
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400230 gpio_set_value(rst_gpio, 1);
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100231 udelay(1);
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400232 gpio_set_value(rst_gpio, 0);
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100233 udelay(1);
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400234 gpio_set_value(rst_gpio, 1);
Dirk Behmead9bc8e2009-01-28 21:39:58 +0100235}
Ben Warren736fead2009-07-20 22:01:11 -0700236
237int board_eth_init(bd_t *bis)
238{
239 int rc = 0;
240#ifdef CONFIG_SMC911X
Sanjeev Premi5e463a22011-09-02 05:57:16 +0000241#define STR_ENV_ETHADDR "ethaddr"
242
243 struct eth_device *dev;
244 uchar eth_addr[6];
245
Ben Warren736fead2009-07-20 22:01:11 -0700246 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
Sanjeev Premi5e463a22011-09-02 05:57:16 +0000247
248 if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
249 dev = eth_get_dev_by_index(0);
250 if (dev) {
251 eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
252 } else {
253 printf("omap3evm: Couldn't get eth device\n");
254 rc = -1;
255 }
256 }
Ben Warren736fead2009-07-20 22:01:11 -0700257#endif
258 return rc;
259}
Sanjeev Premi5626f332011-07-18 09:23:00 -0400260#endif /* CONFIG_CMD_NET */
Vaibhav Hiremathdcc4f382011-09-03 21:42:35 -0400261
Tom Rini673283f2011-11-18 12:48:09 +0000262#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
Vaibhav Hiremathdcc4f382011-09-03 21:42:35 -0400263int board_mmc_init(bd_t *bis)
264{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000265 return omap_mmc_init(0, 0, 0, -1, -1);
Vaibhav Hiremathdcc4f382011-09-03 21:42:35 -0400266}
267#endif
Paul Kocialkowskiaac54502014-11-08 20:55:47 +0100268
269#if defined(CONFIG_GENERIC_MMC)
270void board_mmc_power_init(void)
271{
272 twl4030_power_mmc_init(0);
273}
274#endif