blob: d840c59d457e1f0c2e3a0dcc0b6470896840154f [file] [log] [blame]
Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
11 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
12 select TPL_NEEDS_SEPARATE_STACK if TPL
13 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -060014 select SPL_SERIAL
15 select TPL_SERIAL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020016 select DEBUG_UART_BOARD_INIT
17 imply ROCKCHIP_COMMON_BOARD
18 imply SPL_ROCKCHIP_COMMON_BOARD
19 help
20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner041cdb52016-07-16 00:17:15 +020025config ROCKCHIP_RK3036
26 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053027 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080028 select SUPPORT_SPL
29 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +080030 imply USB_FUNCTION_ROCKUSB
31 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080032 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020033 help
34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
35 including NEON and GPU, Mali-400 graphics, several DDR3 options
36 and video codec support. Peripherals include Gigabit Ethernet,
37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
38
Kever Yangdaeed1d2017-11-28 16:04:16 +080039config ROCKCHIP_RK3128
40 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053041 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080042 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080043 help
44 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
45 including NEON and GPU, Mali-400 graphics, several DDR3 options
46 and video codec support. Peripherals include Gigabit Ethernet,
47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
48
Heiko Stübner0a2be692017-02-18 19:46:36 +010049config ROCKCHIP_RK3188
50 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053051 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080052 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010053 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010054 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020055 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020056 select SPL_REGMAP
57 select SPL_SYSCON
58 select SPL_RAM
Simon Glass9ca00682021-07-10 21:14:31 -060059 select SPL_DRIVERS_MISC
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020060 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080061 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020062 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080064 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010065 help
66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
68 video interfaces, several memory options and video codec support.
69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
70 UART, SPI, I2C and PWMs.
71
Kever Yang168eef72017-06-23 17:17:52 +080072config ROCKCHIP_RK322X
73 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053074 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080075 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080076 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080077 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080078 select SPL_DM
79 select SPL_OF_LIBFDT
80 select TPL
81 select TPL_DM
82 select TPL_OF_LIBFDT
83 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
84 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass9ca00682021-07-10 21:14:31 -060085 select SPL_DRIVERS_MISC
Kever Yangcca3b092019-07-22 20:02:07 +080086 imply ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -060087 imply SPL_SERIAL
Kever Yang0cd65e42019-07-22 19:59:20 +080088 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -060089 imply TPL_SERIAL
Kever Yang6ae28a32019-07-09 22:05:56 +080090 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080091 select TPL_LIBCOMMON_SUPPORT
92 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080093 help
94 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
95 including NEON and GPU, Mali-400 graphics, several DDR3 options
96 and video codec support. Peripherals include Gigabit Ethernet,
97 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
98
Simon Glass2444dae2015-08-30 16:55:38 -060099config ROCKCHIP_RK3288
100 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530101 select CPU_V7A
Jagan Tekieab5c502020-07-21 12:16:38 +0530102 select OF_BOARD_SETUP
Tom Rinia2ac2b92021-08-27 21:18:30 -0400103 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yanga381bcf2016-07-19 21:16:59 +0800104 select SUPPORT_SPL
105 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +0800106 select SUPPORT_TPL
Jagan Teki38070172020-01-23 19:42:19 +0530107 imply PRE_CONSOLE_BUFFER
Kever Yangde57a9f2019-07-22 20:02:15 +0800108 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +0800109 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800110 imply TPL_CLK
111 imply TPL_DM
Simon Glass9ca00682021-07-10 21:14:31 -0600112 imply TPL_DRIVERS_MISC
Kever Yangd18ca742019-07-02 11:43:05 +0800113 imply TPL_LIBCOMMON_SUPPORT
114 imply TPL_LIBGENERIC_SUPPORT
115 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +0800116 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +0800117 imply TPL_OF_CONTROL
118 imply TPL_OF_PLATDATA
119 imply TPL_RAM
120 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +0800121 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600122 imply TPL_SERIAL
Kever Yangd18ca742019-07-02 11:43:05 +0800123 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +0800124 imply USB_FUNCTION_ROCKUSB
125 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600126 help
127 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
128 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
129 video interfaces supporting HDMI and eDP, several DDR3 options
130 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100131 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600132
Andy Yanf1a22522019-11-14 11:21:12 +0800133config ROCKCHIP_RK3308
134 bool "Support Rockchip RK3308"
135 select ARM64
136 select DEBUG_UART_BOARD_INIT
137 select SUPPORT_SPL
138 select SUPPORT_TPL
139 select SPL
140 select SPL_ATF
141 select SPL_ATF_NO_PLATFORM_PARAM
142 select SPL_LOAD_FIT
143 imply ROCKCHIP_COMMON_BOARD
144 imply SPL_ROCKCHIP_COMMON_BOARD
145 imply SPL_CLK
146 imply SPL_REGMAP
147 imply SPL_SYSCON
148 imply SPL_RAM
Simon Glass2a736062021-08-08 12:20:12 -0600149 imply SPL_SERIAL
150 imply TPL_SERIAL
Andy Yanf1a22522019-11-14 11:21:12 +0800151 imply SPL_SEPARATE_BSS
152 help
153 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
154 Cortex-A35 and highly integrated audio interfaces.
155
Kever Yang85a3cfb2017-02-23 15:37:51 +0800156config ROCKCHIP_RK3328
157 bool "Support Rockchip RK3328"
158 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300159 select SUPPORT_SPL
160 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300161 select SUPPORT_TPL
162 select TPL
163 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
164 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800165 imply ROCKCHIP_COMMON_BOARD
YouMin Chenca93e322019-11-15 11:04:44 +0800166 imply ROCKCHIP_SDRAM_COMMON
Kever Yang9cc67042019-07-22 19:59:32 +0800167 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600168 imply SPL_SERIAL
169 imply TPL_SERIAL
Kever Yangc009aeb2019-06-09 00:27:15 +0300170 imply SPL_SEPARATE_BSS
171 select ENABLE_ARM_SOC_BOOT0_HOOK
172 select DEBUG_UART_BOARD_INIT
173 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800174 help
175 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
176 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
177 video interfaces supporting HDMI and eDP, several DDR3 options
178 and video codec support. Peripherals include Gigabit Ethernet,
179 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
180
Andreas Färber37a0c602017-05-15 17:51:18 +0800181config ROCKCHIP_RK3368
182 bool "Support Rockchip RK3368"
183 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200184 select SUPPORT_SPL
185 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200186 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
187 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800188 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800189 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200190 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600191 imply SPL_SERIAL
192 imply TPL_SERIAL
Kever Yang82560cb2019-07-09 22:05:58 +0800193 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800194 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200195 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
196 into a big and little cluster with 4 cores each) Cortex-A53 including
197 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
198 (for the little cluster), PowerVR G6110 based graphics, one video
199 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
200 video codec support.
201
202 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
203 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800204
Kever Yanga381bcf2016-07-19 21:16:59 +0800205config ROCKCHIP_RK3399
206 bool "Support Rockchip RK3399"
207 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800208 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800209 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800210 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530211 select SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530212 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530213 select SPL_LOAD_FIT
214 select SPL_CLK if SPL
215 select SPL_PINCTRL if SPL
216 select SPL_RAM if SPL
217 select SPL_REGMAP if SPL
218 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800219 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
220 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800221 select SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600222 select SPL_SERIAL
Simon Glass9ca00682021-07-10 21:14:31 -0600223 select SPL_DRIVERS_MISC
Jagan Teki2666bd42019-05-08 11:11:43 +0530224 select CLK
225 select FIT
226 select PINCTRL
227 select RAM
228 select REGMAP
229 select SYSCON
230 select DM_PMIC
231 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800232 select BOARD_LATE_INIT
Jagan Teki61853a72020-04-02 17:11:23 +0530233 imply PRE_CONSOLE_BUFFER
Kever Yang920b0132019-07-22 20:02:19 +0800234 imply ROCKCHIP_COMMON_BOARD
YouMin Chena922d0d2019-11-15 11:04:45 +0800235 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Baker46a86062020-06-16 00:30:47 +0100236 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangb7abef22019-07-22 19:59:42 +0800237 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600238 imply TPL_SERIAL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800239 imply TPL_LIBCOMMON_SUPPORT
240 imply TPL_LIBGENERIC_SUPPORT
241 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass9ca00682021-07-10 21:14:31 -0600242 imply TPL_DRIVERS_MISC
Kever Yang6bbf5e12018-11-09 11:18:15 +0800243 imply TPL_OF_CONTROL
244 imply TPL_DM
245 imply TPL_REGMAP
246 imply TPL_SYSCON
247 imply TPL_RAM
248 imply TPL_CLK
249 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800250 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekiefebc8e2020-01-09 14:22:19 +0530251 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
252 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yanga381bcf2016-07-19 21:16:59 +0800253 help
254 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
255 and quad-core Cortex-A53.
256 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
257 video interfaces supporting HDMI and eDP, several DDR3 options
258 and video codec support. Peripherals include Gigabit Ethernet,
259 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
260
Joseph Chen2a950e32021-06-02 15:58:25 +0800261config ROCKCHIP_RK3568
262 bool "Support Rockchip RK3568"
263 select ARM64
Nico Chengdaec31e2021-10-26 10:42:19 +0800264 select SUPPORT_SPL
265 select SPL
Joseph Chen2a950e32021-06-02 15:58:25 +0800266 select CLK
267 select PINCTRL
268 select RAM
269 select REGMAP
270 select SYSCON
271 select BOARD_LATE_INIT
272 imply ROCKCHIP_COMMON_BOARD
273 help
274 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
275 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
276 two video interfaces supporting HDMI and eDP, several DDR3 options
277 and video codec support. Peripherals include Gigabit Ethernet,
278 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
279
Andy Yan2c1e11d2017-06-01 18:00:55 +0800280config ROCKCHIP_RV1108
281 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530282 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800283 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800284 help
285 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
286 and a DSP.
287
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200288config ROCKCHIP_USB_UART
289 bool "Route uart output to usb pins"
290 help
291 Rockchip SoCs have the ability to route the signals of the debug
292 uart through the d+ and d- pins of a specific usb phy to enable
293 some form of closed-case debugging. With this option supported
294 SoCs will enable this routing as a debug measure.
295
Philipp Tomsichee14d292017-06-29 11:21:15 +0200296config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800297 bool "SPL returns to bootrom"
298 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100299 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800300 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200301 depends on SPL
302 help
303 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
304 SPL will return to the boot rom, which will then load the U-Boot
305 binary to keep going on.
306
307config TPL_ROCKCHIP_BACK_TO_BROM
308 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800309 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200310 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800311 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200312 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800313 help
314 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
315 SPL will return to the boot rom, which will then load the U-Boot
316 binary to keep going on.
317
Kever Yang54f17fa2019-07-22 20:02:01 +0800318config ROCKCHIP_COMMON_BOARD
319 bool "Rockchip common board file"
320 help
321 Rockchip SoCs have similar boot process, Common board file is mainly
322 in charge of common process of board_init() and board_late_init() for
323 U-Boot proper.
324
Kever Yang49105fb2019-07-22 19:59:12 +0800325config SPL_ROCKCHIP_COMMON_BOARD
326 bool "Rockchip SPL common board file"
327 depends on SPL
328 help
329 Rockchip SoCs have similar boot process, SPL is mainly in charge of
330 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
331 no TPL for the board.
332
Kever Yang18f85082019-07-09 22:05:55 +0800333config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbd4e41872019-12-20 18:05:22 -0800334 bool "Rockchip TPL common board file"
Kever Yang18f85082019-07-09 22:05:55 +0800335 depends on TPL
336 help
337 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
338 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
339 common board is a basic TPL board init which can be shared for most
Thomas Hebb32f2ca22019-11-13 18:18:03 -0800340 of SoCs to avoid copy-paste for different SoCs.
Kever Yang18f85082019-07-09 22:05:55 +0800341
Andy Yane3067792017-10-11 15:00:16 +0800342config ROCKCHIP_BOOT_MODE_REG
343 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800344 help
Kever Yang15f09a12019-03-28 11:01:23 +0800345 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800346 according to the value from this register.
347
Kever Yangfa1392a2017-04-20 17:03:46 +0800348config ROCKCHIP_SPL_RESERVE_IRAM
349 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800350 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800351 help
352 SPL may need reserve memory for firmware loaded by SPL, whose load
353 address is in IRAM and may overlay with SPL text area if not
354 reserved.
355
Heiko Stübner1d845942017-02-18 19:46:25 +0100356config ROCKCHIP_BROM_HELPER
357 bool
358
Philipp Tomsichb377d222017-10-10 16:21:10 +0200359config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
360 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
361 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
362 help
363 Some Rockchip BROM variants (e.g. on the RK3188) load the
364 first stage in segments and enter multiple times. E.g. on
365 the RK3188, the first 1KB of the first stage are loaded
366 first and entered; after returning to the BROM, the
367 remainder of the first stage is loaded, but the BROM
368 re-enters at the same address/to the same code as previously.
369
370 This enables support code in the BOOT0 hook for the SPL stage
371 to allow multiple entries.
372
373config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
374 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
375 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
376 help
377 Some Rockchip BROM variants (e.g. on the RK3188) load the
378 first stage in segments and enter multiple times. E.g. on
379 the RK3188, the first 1KB of the first stage are loaded
380 first and entered; after returning to the BROM, the
381 remainder of the first stage is loaded, but the BROM
382 re-enters at the same address/to the same code as previously.
383
384 This enables support code in the BOOT0 hook for the TPL stage
385 to allow multiple entries.
386
Simon Glass103c5f12021-08-08 12:20:09 -0600387config SPL_MMC
Philipp Tomsichee14d292017-06-29 11:21:15 +0200388 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400389
Simon Glass9b312e22020-07-19 13:55:57 -0600390config ROCKCHIP_SPI_IMAGE
391 bool "Build a SPI image for rockchip"
392 depends on HAS_ROM
393 help
394 Some Rockchip SoCs support booting from SPI flash. Enable this
395 option to produce a 4MB SPI-flash image (called u-boot.rom)
396 containing U-Boot. The image is built by binman. U-Boot sits near
397 the start of the image.
398
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +0200399source "arch/arm/mach-rockchip/px30/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +0800400source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800401source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100402source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800403source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200404source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanf1a22522019-11-14 11:21:12 +0800405source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800406source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800407source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800408source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen695693b2021-06-02 16:13:46 +0800409source "arch/arm/mach-rockchip/rk3568/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800410source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600411endif