Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | menu "mpc85xx CPU" |
| 2 | depends on MPC85xx |
| 3 | |
| 4 | config SYS_CPU |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 5 | default "mpc85xx" |
| 6 | |
Simon Glass | 230ecd7 | 2017-05-17 03:25:15 -0600 | [diff] [blame] | 7 | config CMD_ERRATA |
| 8 | bool "Enable the 'errata' command" |
| 9 | depends on MPC85xx |
| 10 | default y |
| 11 | help |
| 12 | This enables the 'errata' command which displays a list of errata |
| 13 | work-arounds which are enabled for the current board. |
| 14 | |
Pali Rohár | 786d9f1 | 2022-05-11 20:57:31 +0200 | [diff] [blame] | 15 | config FSL_PREPBL_ESDHC_BOOT_SECTOR |
| 16 | bool "Generate QorIQ pre-PBL eSDHC boot sector" |
| 17 | depends on MPC85xx |
Marek Behún | 1e1d12a | 2022-09-15 16:08:27 +0200 | [diff] [blame] | 18 | depends on SDCARD |
Pali Rohár | 786d9f1 | 2022-05-11 20:57:31 +0200 | [diff] [blame] | 19 | help |
| 20 | With this option final image would have prepended QorIQ pre-PBL eSDHC |
| 21 | boot sector suitable for SD card images. This boot sector instruct |
| 22 | BootROM to configure L2 SRAM and eSDHC then load image from SD card |
| 23 | into L2 SRAM and finally jump to image entry point. |
| 24 | |
| 25 | This is alternative to Freescale boot_format tool, but works only for |
| 26 | SD card images and only for L2 SRAM booting. U-Boot images generated |
| 27 | with this option should not passed to boot_format tool. |
| 28 | |
| 29 | For other configuration like booting from eSPI or configuring SDRAM |
| 30 | please use Freescale boot_format tool without this option. See file |
| 31 | doc/README.mpc85xx-sd-spi-boot |
| 32 | |
| 33 | config FSL_PREPBL_ESDHC_BOOT_SECTOR_START |
| 34 | int "QorIQ pre-PBL eSDHC boot sector start offset" |
| 35 | depends on FSL_PREPBL_ESDHC_BOOT_SECTOR |
| 36 | range 0 23 |
| 37 | default 0 |
| 38 | help |
| 39 | QorIQ pre-PBL eSDHC boot sector may be located on one of the first |
| 40 | 24 SD card sectors. Select SD card sector on which final U-Boot |
| 41 | image (with this boot sector) would be installed. |
| 42 | |
| 43 | By default first SD card sector (0) is used. But this may be changed |
| 44 | to allow installing U-Boot image on some partition (with fixed start |
| 45 | sector). |
| 46 | |
| 47 | Please note that any sector on SD card prior this boot sector must |
| 48 | not contain ASCII "BOOT" bytes at sector offset 0x40. |
| 49 | |
| 50 | config FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA |
| 51 | int "Relative data sector for QorIQ pre-PBL eSDHC boot sector" |
| 52 | depends on FSL_PREPBL_ESDHC_BOOT_SECTOR |
| 53 | default 1 |
| 54 | range 1 8388607 |
| 55 | help |
| 56 | Select data sector from the beginning of QorIQ pre-PBL eSDHC boot |
| 57 | sector on which would be stored raw U-Boot image. |
| 58 | |
| 59 | By default is it second sector (1) which is the first available free |
| 60 | sector (on the first sector is stored boot sector). It can be any |
| 61 | sector number which offset in bytes can be expressed by 32-bit number. |
| 62 | |
| 63 | In case this final U-Boot image (with this boot sector) is put on |
| 64 | the FAT32 partition into reserved boot area, this data sector needs |
| 65 | to be at least 2 (third sector) because FAT32 use second sector for |
| 66 | its data. |
| 67 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 68 | choice |
| 69 | prompt "Target select" |
Joe Hershberger | a26cd04 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 70 | optional |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 71 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 72 | config TARGET_SOCRATES |
| 73 | bool "Support socrates" |
York Sun | 25cb74b | 2016-11-15 13:57:15 -0800 | [diff] [blame] | 74 | select ARCH_MPC8544 |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 75 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 76 | config TARGET_P3041DS |
| 77 | bool "Support P3041DS" |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 78 | select PHYS_64BIT |
York Sun | 5e5fdd2 | 2016-11-18 11:20:40 -0800 | [diff] [blame] | 79 | select ARCH_P3041 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 80 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 81 | select FSL_NGPIXIS |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 82 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 83 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 84 | |
| 85 | config TARGET_P4080DS |
| 86 | bool "Support P4080DS" |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 87 | select PHYS_64BIT |
York Sun | e71372c | 2016-11-18 11:24:40 -0800 | [diff] [blame] | 88 | select ARCH_P4080 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 89 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 90 | select FSL_NGPIXIS |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 91 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 92 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 93 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 94 | config TARGET_P5040DS |
| 95 | bool "Support P5040DS" |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 96 | select PHYS_64BIT |
York Sun | 9539036 | 2016-11-18 11:39:36 -0800 | [diff] [blame] | 97 | select ARCH_P5040 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 98 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 99 | select FSL_NGPIXIS |
| 100 | select SYS_FSL_RAID_ENGINE |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 101 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 102 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 103 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 104 | config TARGET_MPC8548CDS |
| 105 | bool "Support MPC8548CDS" |
York Sun | 281ed4c | 2016-11-15 13:52:34 -0800 | [diff] [blame] | 106 | select ARCH_MPC8548 |
Rajesh Bhagat | c8c0170 | 2021-02-15 09:46:14 +0100 | [diff] [blame] | 107 | select FSL_VIA |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 108 | select SYS_CACHE_SHIFT_5 |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 109 | |
York Sun | 7601686 | 2016-11-16 13:30:06 -0800 | [diff] [blame] | 110 | config TARGET_P1010RDB_PA |
| 111 | bool "Support P1010RDB_PA" |
| 112 | select ARCH_P1010 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 113 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
York Sun | 7601686 | 2016-11-16 13:30:06 -0800 | [diff] [blame] | 114 | select SUPPORT_SPL |
| 115 | select SUPPORT_TPL |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 116 | select SYS_L2_SIZE_256KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 117 | imply CMD_EEPROM |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 118 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 119 | imply PANIC_HANG |
York Sun | 7601686 | 2016-11-16 13:30:06 -0800 | [diff] [blame] | 120 | |
| 121 | config TARGET_P1010RDB_PB |
| 122 | bool "Support P1010RDB_PB" |
York Sun | 7d5f9f8 | 2016-11-16 13:08:52 -0800 | [diff] [blame] | 123 | select ARCH_P1010 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 124 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Masahiro Yamada | 0262735 | 2014-10-20 17:45:56 +0900 | [diff] [blame] | 125 | select SUPPORT_SPL |
Masahiro Yamada | cf6bbe4 | 2014-10-20 17:45:57 +0900 | [diff] [blame] | 126 | select SUPPORT_TPL |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 127 | select SYS_L2_SIZE_256KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 128 | imply CMD_EEPROM |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 129 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 130 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 131 | |
York Sun | aa14620 | 2016-11-17 13:52:44 -0800 | [diff] [blame] | 132 | config TARGET_P1020RDB_PC |
| 133 | bool "Support P1020RDB-PC" |
| 134 | select SUPPORT_SPL |
| 135 | select SUPPORT_TPL |
York Sun | 484fff6 | 2016-11-18 10:02:14 -0800 | [diff] [blame] | 136 | select ARCH_P1020 |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 137 | select SYS_L2_SIZE_256KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 138 | imply CMD_EEPROM |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 139 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 140 | imply PANIC_HANG |
York Sun | aa14620 | 2016-11-17 13:52:44 -0800 | [diff] [blame] | 141 | |
York Sun | f404b66 | 2016-11-17 13:53:33 -0800 | [diff] [blame] | 142 | config TARGET_P1020RDB_PD |
| 143 | bool "Support P1020RDB-PD" |
| 144 | select SUPPORT_SPL |
| 145 | select SUPPORT_TPL |
York Sun | 484fff6 | 2016-11-18 10:02:14 -0800 | [diff] [blame] | 146 | select ARCH_P1020 |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 147 | select SYS_L2_SIZE_256KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 148 | imply CMD_EEPROM |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 149 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 150 | imply PANIC_HANG |
York Sun | f404b66 | 2016-11-17 13:53:33 -0800 | [diff] [blame] | 151 | |
York Sun | 8435aa7 | 2016-11-17 14:19:18 -0800 | [diff] [blame] | 152 | config TARGET_P2020RDB |
| 153 | bool "Support P2020RDB-PC" |
| 154 | select SUPPORT_SPL |
| 155 | select SUPPORT_TPL |
York Sun | 4593637 | 2016-11-18 11:08:43 -0800 | [diff] [blame] | 156 | select ARCH_P2020 |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 157 | select SYS_L2_SIZE_512KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 158 | imply CMD_EEPROM |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 159 | imply CMD_SATA |
Tuomas Tynkkynen | c88ecf4 | 2017-12-08 15:36:14 +0200 | [diff] [blame] | 160 | imply SATA_SIL |
York Sun | 8435aa7 | 2016-11-17 14:19:18 -0800 | [diff] [blame] | 161 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 162 | config TARGET_P2041RDB |
| 163 | bool "Support P2041RDB" |
York Sun | ce040c8 | 2016-11-18 11:15:21 -0800 | [diff] [blame] | 164 | select ARCH_P2041 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 165 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 166 | select FSL_CORENET |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 167 | select PHYS_64BIT |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 168 | select SYS_L3_SIZE_1024KB |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 169 | imply CMD_SATA |
Tuomas Tynkkynen | 9920d15 | 2017-12-08 15:36:17 +0200 | [diff] [blame] | 170 | imply FSL_SATA |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 171 | |
| 172 | config TARGET_QEMU_PPCE500 |
| 173 | bool "Support qemu-ppce500" |
York Sun | 1034340 | 2016-11-18 12:29:51 -0800 | [diff] [blame] | 174 | select ARCH_QEMU_E500 |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 175 | select PHYS_64BIT |
Tom Rini | 5a44618 | 2022-06-25 11:02:44 -0400 | [diff] [blame] | 176 | select SYS_RAMBOOT |
Simon Glass | 239d22c | 2021-12-16 20:59:36 -0700 | [diff] [blame] | 177 | imply OF_HAS_PRIOR_STAGE |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 178 | |
York Sun | 08c7529 | 2016-11-18 12:45:44 -0800 | [diff] [blame] | 179 | config TARGET_T1024RDB |
| 180 | bool "Support T1024RDB" |
York Sun | e5d5f5a | 2016-11-18 13:01:34 -0800 | [diff] [blame] | 181 | select ARCH_T1024 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 182 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Shengzhou Liu | 48c6f32 | 2014-11-24 17:11:56 +0800 | [diff] [blame] | 183 | select SUPPORT_SPL |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 184 | select PHYS_64BIT |
Rajesh Bhagat | 3241312 | 2019-02-01 05:22:01 +0000 | [diff] [blame] | 185 | select FSL_DDR_INTERACTIVE |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 186 | select SYS_L3_SIZE_256KB |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 187 | imply CMD_EEPROM |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 188 | imply PANIC_HANG |
Shengzhou Liu | 48c6f32 | 2014-11-24 17:11:56 +0800 | [diff] [blame] | 189 | |
York Sun | 95a809b | 2016-11-18 13:19:39 -0800 | [diff] [blame] | 190 | config TARGET_T1042RDB |
| 191 | bool "Support T1042RDB" |
York Sun | 5449c98 | 2016-11-18 13:36:39 -0800 | [diff] [blame] | 192 | select ARCH_T1042 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 193 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Masahiro Yamada | 0262735 | 2014-10-20 17:45:56 +0900 | [diff] [blame] | 194 | select SUPPORT_SPL |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 195 | select PHYS_64BIT |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 196 | select SYS_L3_SIZE_256KB |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 197 | |
York Sun | 319ed24 | 2016-11-21 11:04:34 -0800 | [diff] [blame] | 198 | config TARGET_T1042D4RDB |
| 199 | bool "Support T1042D4RDB" |
| 200 | select ARCH_T1042 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 201 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
York Sun | 319ed24 | 2016-11-21 11:04:34 -0800 | [diff] [blame] | 202 | select SUPPORT_SPL |
| 203 | select PHYS_64BIT |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 204 | select SYS_L3_SIZE_256KB |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 205 | imply PANIC_HANG |
York Sun | 319ed24 | 2016-11-21 11:04:34 -0800 | [diff] [blame] | 206 | |
York Sun | 55ed8ae | 2016-11-18 13:44:00 -0800 | [diff] [blame] | 207 | config TARGET_T1042RDB_PI |
| 208 | bool "Support T1042RDB_PI" |
| 209 | select ARCH_T1042 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 210 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
York Sun | 55ed8ae | 2016-11-18 13:44:00 -0800 | [diff] [blame] | 211 | select SUPPORT_SPL |
| 212 | select PHYS_64BIT |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 213 | select SYS_L3_SIZE_256KB |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 214 | imply PANIC_HANG |
York Sun | 55ed8ae | 2016-11-18 13:44:00 -0800 | [diff] [blame] | 215 | |
York Sun | 638d5be | 2016-11-21 12:46:58 -0800 | [diff] [blame] | 216 | config TARGET_T2080QDS |
| 217 | bool "Support T2080QDS" |
York Sun | 0f3d80e | 2016-11-21 12:54:19 -0800 | [diff] [blame] | 218 | select ARCH_T2080 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 219 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Masahiro Yamada | 0262735 | 2014-10-20 17:45:56 +0900 | [diff] [blame] | 220 | select SUPPORT_SPL |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 221 | select PHYS_64BIT |
Rajesh Bhagat | 3241312 | 2019-02-01 05:22:01 +0000 | [diff] [blame] | 222 | select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE |
| 223 | select FSL_DDR_INTERACTIVE |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 224 | select SYS_L3_SIZE_512KB |
Peng Ma | a2d4cb2 | 2019-12-23 09:28:12 +0000 | [diff] [blame] | 225 | imply CMD_SATA |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 226 | |
York Sun | 01671e6 | 2016-11-21 12:57:22 -0800 | [diff] [blame] | 227 | config TARGET_T2080RDB |
| 228 | bool "Support T2080RDB" |
York Sun | 0f3d80e | 2016-11-21 12:54:19 -0800 | [diff] [blame] | 229 | select ARCH_T2080 |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 230 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
Masahiro Yamada | 0262735 | 2014-10-20 17:45:56 +0900 | [diff] [blame] | 231 | select SUPPORT_SPL |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 232 | select PHYS_64BIT |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 233 | select SYS_L3_SIZE_512KB |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 234 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 235 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 236 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 237 | config TARGET_T4240RDB |
| 238 | bool "Support T4240RDB" |
York Sun | 26bc57d | 2016-11-21 13:35:41 -0800 | [diff] [blame] | 239 | select ARCH_T4240 |
Chunhe Lan | 373762c | 2015-03-20 17:08:54 +0800 | [diff] [blame] | 240 | select SUPPORT_SPL |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 241 | select PHYS_64BIT |
Rajesh Bhagat | 3241312 | 2019-02-01 05:22:01 +0000 | [diff] [blame] | 242 | select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 243 | select SYS_L3_SIZE_512KB |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 244 | imply CMD_SATA |
Masahiro Yamada | 7e3caa8 | 2017-12-04 12:37:00 +0900 | [diff] [blame] | 245 | imply PANIC_HANG |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 246 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 247 | config TARGET_KMP204X |
| 248 | bool "Support kmp204x" |
Pascal Linder | c0fed3a | 2019-06-18 13:27:47 +0200 | [diff] [blame] | 249 | select VENDOR_KM |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 250 | |
Niel Fourie | 37bfd9c | 2021-01-21 13:19:20 +0100 | [diff] [blame] | 251 | config TARGET_KMCENT2 |
| 252 | bool "Support kmcent2" |
| 253 | select VENDOR_KM |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 254 | select FSL_CORENET |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 255 | select SYS_DPAA_FMAN |
| 256 | select SYS_DPAA_PME |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 257 | select SYS_L3_SIZE_256KB |
Niel Fourie | 37bfd9c | 2021-01-21 13:19:20 +0100 | [diff] [blame] | 258 | |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 259 | endchoice |
| 260 | |
York Sun | b41f192 | 2016-11-18 11:56:57 -0800 | [diff] [blame] | 261 | config ARCH_B4420 |
| 262 | bool |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 263 | select E500MC |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 264 | select E6500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 265 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 266 | select FSL_LAW |
Tom Rini | 1e7750f | 2022-06-16 14:04:34 -0400 | [diff] [blame] | 267 | select HETROGENOUS_CLUSTERS |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 268 | select SYS_FSL_DDR_VER_47 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 269 | select SYS_FSL_ERRATUM_A004477 |
| 270 | select SYS_FSL_ERRATUM_A005871 |
| 271 | select SYS_FSL_ERRATUM_A006379 |
| 272 | select SYS_FSL_ERRATUM_A006384 |
| 273 | select SYS_FSL_ERRATUM_A006475 |
| 274 | select SYS_FSL_ERRATUM_A006593 |
| 275 | select SYS_FSL_ERRATUM_A007075 |
Tom Rini | 601483f | 2022-06-16 14:04:40 -0400 | [diff] [blame] | 276 | select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 277 | select SYS_FSL_ERRATUM_A007212 |
| 278 | select SYS_FSL_ERRATUM_A009942 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 279 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 280 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 281 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 282 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 283 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 284 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 285 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 286 | select SYS_FSL_USB1_PHY_ENABLE |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 287 | select SYS_PPC64 |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 288 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 289 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 290 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 291 | imply CMD_REGINFO |
York Sun | b41f192 | 2016-11-18 11:56:57 -0800 | [diff] [blame] | 292 | |
York Sun | 3006ebc | 2016-11-18 11:44:43 -0800 | [diff] [blame] | 293 | config ARCH_B4860 |
| 294 | bool |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 295 | select E500MC |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 296 | select E6500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 297 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 298 | select FSL_LAW |
Tom Rini | 1e7750f | 2022-06-16 14:04:34 -0400 | [diff] [blame] | 299 | select HETROGENOUS_CLUSTERS |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 300 | select SYS_FSL_DDR_VER_47 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 301 | select SYS_FSL_ERRATUM_A004477 |
| 302 | select SYS_FSL_ERRATUM_A005871 |
| 303 | select SYS_FSL_ERRATUM_A006379 |
| 304 | select SYS_FSL_ERRATUM_A006384 |
| 305 | select SYS_FSL_ERRATUM_A006475 |
| 306 | select SYS_FSL_ERRATUM_A006593 |
| 307 | select SYS_FSL_ERRATUM_A007075 |
Tom Rini | 601483f | 2022-06-16 14:04:40 -0400 | [diff] [blame] | 308 | select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 309 | select SYS_FSL_ERRATUM_A007212 |
Darwin Dingel | 06ad970 | 2016-10-25 09:48:01 +1300 | [diff] [blame] | 310 | select SYS_FSL_ERRATUM_A007907 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 311 | select SYS_FSL_ERRATUM_A009942 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 312 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 313 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 314 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 315 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 316 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 317 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 318 | select SYS_FSL_SRIO_LIODN |
| 319 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 320 | select SYS_FSL_USB1_PHY_ENABLE |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 321 | select SYS_PPC64 |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 322 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 323 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 324 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 325 | imply CMD_REGINFO |
York Sun | 3006ebc | 2016-11-18 11:44:43 -0800 | [diff] [blame] | 326 | |
York Sun | 115d60c | 2016-11-15 14:09:50 -0800 | [diff] [blame] | 327 | config ARCH_BSC9131 |
| 328 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 329 | select FSL_LAW |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 330 | select SYS_FSL_DDR_VER_44 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 331 | select SYS_FSL_ERRATUM_A004477 |
| 332 | select SYS_FSL_ERRATUM_A005125 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 333 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 334 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 335 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 336 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 337 | select SYS_FSL_SEC_COMPAT_4 |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 338 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 339 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 340 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 341 | imply CMD_REGINFO |
York Sun | 115d60c | 2016-11-15 14:09:50 -0800 | [diff] [blame] | 342 | |
| 343 | config ARCH_BSC9132 |
| 344 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 345 | select FSL_LAW |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 346 | select SYS_FSL_DDR_VER_46 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 347 | select SYS_FSL_ERRATUM_A004477 |
| 348 | select SYS_FSL_ERRATUM_A005125 |
| 349 | select SYS_FSL_ERRATUM_A005434 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 350 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 351 | select SYS_FSL_ERRATUM_I2C_A004447 |
| 352 | select SYS_FSL_ERRATUM_IFC_A002769 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 353 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 354 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 355 | select SYS_FSL_HAS_SEC |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 356 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 357 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 358 | select SYS_FSL_SEC_COMPAT_4 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 359 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 360 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 361 | imply CMD_EEPROM |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 362 | imply CMD_MTDPARTS |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 363 | imply CMD_NAND |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 364 | imply CMD_PCI |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 365 | imply CMD_REGINFO |
York Sun | 115d60c | 2016-11-15 14:09:50 -0800 | [diff] [blame] | 366 | |
York Sun | 4fd6474 | 2016-11-15 18:44:22 -0800 | [diff] [blame] | 367 | config ARCH_C29X |
| 368 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 369 | select FSL_LAW |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 370 | select SYS_FSL_DDR_VER_46 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 371 | select SYS_FSL_ERRATUM_A005125 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 372 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 373 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 374 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 375 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 376 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 377 | select SYS_FSL_SEC_COMPAT_6 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 378 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 379 | select FSL_IFC |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 380 | imply CMD_NAND |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 381 | imply CMD_PCI |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 382 | imply CMD_REGINFO |
York Sun | 4fd6474 | 2016-11-15 18:44:22 -0800 | [diff] [blame] | 383 | |
York Sun | 24ad75a | 2016-11-16 11:06:47 -0800 | [diff] [blame] | 384 | config ARCH_MPC8536 |
| 385 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 386 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 387 | select SYS_FSL_ERRATUM_A004508 |
| 388 | select SYS_FSL_ERRATUM_A005125 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 389 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 390 | select SYS_FSL_HAS_DDR2 |
| 391 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 392 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 393 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 394 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 395 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 396 | select FSL_ELBC |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 397 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 398 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 399 | imply CMD_REGINFO |
York Sun | 24ad75a | 2016-11-16 11:06:47 -0800 | [diff] [blame] | 400 | |
York Sun | 7f82521 | 2016-11-16 11:13:06 -0800 | [diff] [blame] | 401 | config ARCH_MPC8540 |
| 402 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 403 | select FSL_LAW |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 404 | select SYS_FSL_HAS_DDR1 |
York Sun | 7f82521 | 2016-11-16 11:13:06 -0800 | [diff] [blame] | 405 | |
York Sun | 25cb74b | 2016-11-15 13:57:15 -0800 | [diff] [blame] | 406 | config ARCH_MPC8544 |
| 407 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 408 | select BTB |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 409 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 410 | select SYS_CACHE_SHIFT_5 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 411 | select SYS_FSL_ERRATUM_A005125 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 412 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 413 | select SYS_FSL_HAS_DDR2 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 414 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 415 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 416 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 417 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 418 | select FSL_ELBC |
York Sun | 25cb74b | 2016-11-15 13:57:15 -0800 | [diff] [blame] | 419 | |
York Sun | 281ed4c | 2016-11-15 13:52:34 -0800 | [diff] [blame] | 420 | config ARCH_MPC8548 |
| 421 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 422 | select BTB |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 423 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 424 | select SYS_FSL_ERRATUM_A005125 |
| 425 | select SYS_FSL_ERRATUM_NMG_DDR120 |
| 426 | select SYS_FSL_ERRATUM_NMG_LBC103 |
| 427 | select SYS_FSL_ERRATUM_NMG_ETSEC129 |
| 428 | select SYS_FSL_ERRATUM_I2C_A004447 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 429 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 430 | select SYS_FSL_HAS_DDR2 |
| 431 | select SYS_FSL_HAS_DDR1 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 432 | select SYS_FSL_HAS_SEC |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 433 | select SYS_FSL_RMU |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 434 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 435 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 436 | select SYS_PPC_E500_USE_DEBUG_TLB |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 437 | imply CMD_REGINFO |
York Sun | 281ed4c | 2016-11-15 13:52:34 -0800 | [diff] [blame] | 438 | |
York Sun | 99d0a31 | 2016-11-16 11:26:45 -0800 | [diff] [blame] | 439 | config ARCH_MPC8560 |
| 440 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 441 | select FSL_LAW |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 442 | select SYS_FSL_HAS_DDR1 |
York Sun | 99d0a31 | 2016-11-16 11:26:45 -0800 | [diff] [blame] | 443 | |
York Sun | 7d5f9f8 | 2016-11-16 13:08:52 -0800 | [diff] [blame] | 444 | config ARCH_P1010 |
| 445 | bool |
Tom Rini | fdd0da4 | 2022-03-11 09:11:59 -0500 | [diff] [blame] | 446 | select A003399_NOR_WORKAROUND if SYS_FSL_ERRATUM_IFC_A003399 && !SPL |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 447 | select BTB |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 448 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 449 | select SYS_CACHE_SHIFT_5 |
Tom Rini | f76750d | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 450 | select SYS_HAS_SERDES |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 451 | select SYS_FSL_ERRATUM_A004477 |
| 452 | select SYS_FSL_ERRATUM_A004508 |
| 453 | select SYS_FSL_ERRATUM_A005125 |
Chris Packham | 4eaf7f5 | 2018-10-04 20:03:53 +1300 | [diff] [blame] | 454 | select SYS_FSL_ERRATUM_A005275 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 455 | select SYS_FSL_ERRATUM_A006261 |
| 456 | select SYS_FSL_ERRATUM_A007075 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 457 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 458 | select SYS_FSL_ERRATUM_I2C_A004447 |
| 459 | select SYS_FSL_ERRATUM_IFC_A002769 |
| 460 | select SYS_FSL_ERRATUM_P1010_A003549 |
| 461 | select SYS_FSL_ERRATUM_SEC_A003571 |
| 462 | select SYS_FSL_ERRATUM_IFC_A003399 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 463 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 464 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 465 | select SYS_FSL_HAS_SEC |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 466 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 467 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 468 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 469 | select SYS_FSL_USB1_PHY_ENABLE |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 470 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 471 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 472 | imply CMD_EEPROM |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 473 | imply CMD_MTDPARTS |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 474 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 475 | imply CMD_SATA |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 476 | imply CMD_PCI |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 477 | imply CMD_REGINFO |
Tuomas Tynkkynen | 9920d15 | 2017-12-08 15:36:17 +0200 | [diff] [blame] | 478 | imply FSL_SATA |
Simon Glass | d6b318d | 2021-12-18 11:27:50 -0700 | [diff] [blame] | 479 | imply TIMESTAMP |
York Sun | 7d5f9f8 | 2016-11-16 13:08:52 -0800 | [diff] [blame] | 480 | |
York Sun | 1cdd96f | 2016-11-16 15:54:15 -0800 | [diff] [blame] | 481 | config ARCH_P1011 |
| 482 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 483 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 484 | select SYS_FSL_ERRATUM_A004508 |
| 485 | select SYS_FSL_ERRATUM_A005125 |
| 486 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 487 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 488 | select FSL_PCIE_DISABLE_ASPM |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 489 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 490 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 491 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 492 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 493 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 494 | select FSL_ELBC |
York Sun | 1cdd96f | 2016-11-16 15:54:15 -0800 | [diff] [blame] | 495 | |
York Sun | 484fff6 | 2016-11-18 10:02:14 -0800 | [diff] [blame] | 496 | config ARCH_P1020 |
| 497 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 498 | select BTB |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 499 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 500 | select SYS_CACHE_SHIFT_5 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 501 | select SYS_FSL_ERRATUM_A004508 |
| 502 | select SYS_FSL_ERRATUM_A005125 |
| 503 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 504 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 505 | select FSL_PCIE_DISABLE_ASPM |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 506 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 507 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 508 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 509 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 510 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 511 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 512 | select FSL_ELBC |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 513 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 514 | imply CMD_SATA |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 515 | imply CMD_PCI |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 516 | imply CMD_REGINFO |
Tuomas Tynkkynen | c88ecf4 | 2017-12-08 15:36:14 +0200 | [diff] [blame] | 517 | imply SATA_SIL |
York Sun | 484fff6 | 2016-11-18 10:02:14 -0800 | [diff] [blame] | 518 | |
York Sun | a990799 | 2016-11-18 10:59:02 -0800 | [diff] [blame] | 519 | config ARCH_P1021 |
| 520 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 521 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 522 | select SYS_FSL_ERRATUM_A004508 |
| 523 | select SYS_FSL_ERRATUM_A005125 |
| 524 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 525 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 526 | select FSL_PCIE_DISABLE_ASPM |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 527 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 528 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 529 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 530 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 531 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 532 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 533 | select FSL_ELBC |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 534 | imply CMD_REGINFO |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 535 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 536 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 537 | imply CMD_REGINFO |
Tuomas Tynkkynen | c88ecf4 | 2017-12-08 15:36:14 +0200 | [diff] [blame] | 538 | imply SATA_SIL |
York Sun | a990799 | 2016-11-18 10:59:02 -0800 | [diff] [blame] | 539 | |
York Sun | 9bb1d6b | 2016-11-16 15:45:31 -0800 | [diff] [blame] | 540 | config ARCH_P1023 |
| 541 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 542 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 543 | select SYS_FSL_ERRATUM_A004508 |
| 544 | select SYS_FSL_ERRATUM_A005125 |
| 545 | select SYS_FSL_ERRATUM_I2C_A004447 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 546 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 547 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 548 | select SYS_FSL_HAS_SEC |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 549 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 550 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 551 | select SYS_FSL_SEC_COMPAT_4 |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 552 | select FSL_ELBC |
York Sun | 9bb1d6b | 2016-11-16 15:45:31 -0800 | [diff] [blame] | 553 | |
York Sun | 52b6f13 | 2016-11-18 11:00:57 -0800 | [diff] [blame] | 554 | config ARCH_P1024 |
| 555 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 556 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 557 | select SYS_FSL_ERRATUM_A004508 |
| 558 | select SYS_FSL_ERRATUM_A005125 |
| 559 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 560 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 561 | select FSL_PCIE_DISABLE_ASPM |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 562 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 563 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 564 | select SYS_FSL_HAS_SEC |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 565 | select SYS_FSL_RMU |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 566 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 567 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 568 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 569 | select FSL_ELBC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 570 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 571 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 572 | imply CMD_SATA |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 573 | imply CMD_PCI |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 574 | imply CMD_REGINFO |
Tuomas Tynkkynen | c88ecf4 | 2017-12-08 15:36:14 +0200 | [diff] [blame] | 575 | imply SATA_SIL |
York Sun | 52b6f13 | 2016-11-18 11:00:57 -0800 | [diff] [blame] | 576 | |
York Sun | 4167a67 | 2016-11-18 11:05:38 -0800 | [diff] [blame] | 577 | config ARCH_P1025 |
| 578 | bool |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 579 | select FSL_LAW |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 580 | select SYS_FSL_ERRATUM_A004508 |
| 581 | select SYS_FSL_ERRATUM_A005125 |
| 582 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 583 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 584 | select FSL_PCIE_DISABLE_ASPM |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 585 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 586 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 587 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 588 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 589 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 590 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 591 | select FSL_ELBC |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 592 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 593 | imply CMD_REGINFO |
York Sun | 4167a67 | 2016-11-18 11:05:38 -0800 | [diff] [blame] | 594 | |
York Sun | 4593637 | 2016-11-18 11:08:43 -0800 | [diff] [blame] | 595 | config ARCH_P2020 |
| 596 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 597 | select BTB |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 598 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 599 | select SYS_CACHE_SHIFT_5 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 600 | select SYS_FSL_ERRATUM_A004477 |
| 601 | select SYS_FSL_ERRATUM_A004508 |
| 602 | select SYS_FSL_ERRATUM_A005125 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 603 | select SYS_FSL_ERRATUM_ESDHC111 |
| 604 | select SYS_FSL_ERRATUM_ESDHC_A001 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 605 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 606 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 607 | select SYS_FSL_HAS_SEC |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 608 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 609 | select SYS_FSL_SEC_COMPAT_2 |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 610 | select SYS_PPC_E500_USE_DEBUG_TLB |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 611 | select FSL_ELBC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 612 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 613 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 614 | imply CMD_REGINFO |
Simon Glass | d6b318d | 2021-12-18 11:27:50 -0700 | [diff] [blame] | 615 | imply TIMESTAMP |
York Sun | 4593637 | 2016-11-18 11:08:43 -0800 | [diff] [blame] | 616 | |
York Sun | ce040c8 | 2016-11-18 11:15:21 -0800 | [diff] [blame] | 617 | config ARCH_P2041 |
| 618 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 619 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 620 | select E500MC |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 621 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 622 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 623 | select SYS_DPAA_FMAN |
| 624 | select SYS_DPAA_PME |
| 625 | select SYS_DPAA_RMAN |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 626 | select SYS_FSL_ERRATUM_A004510 |
| 627 | select SYS_FSL_ERRATUM_A004849 |
Chris Packham | 4eaf7f5 | 2018-10-04 20:03:53 +1300 | [diff] [blame] | 628 | select SYS_FSL_ERRATUM_A005275 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 629 | select SYS_FSL_ERRATUM_A006261 |
| 630 | select SYS_FSL_ERRATUM_CPU_A003999 |
| 631 | select SYS_FSL_ERRATUM_DDR_A003 |
| 632 | select SYS_FSL_ERRATUM_DDR_A003474 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 633 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 634 | select SYS_FSL_ERRATUM_I2C_A004447 |
| 635 | select SYS_FSL_ERRATUM_NMG_CPU_A011 |
| 636 | select SYS_FSL_ERRATUM_SRIO_A004034 |
| 637 | select SYS_FSL_ERRATUM_USB14 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 638 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 639 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 640 | select SYS_FSL_QORIQ_CHASSIS1 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 641 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 642 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 643 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 644 | select SYS_FSL_USB1_PHY_ENABLE |
| 645 | select SYS_FSL_USB2_PHY_ENABLE |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 646 | select FSL_ELBC |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 647 | imply CMD_NAND |
York Sun | ce040c8 | 2016-11-18 11:15:21 -0800 | [diff] [blame] | 648 | |
York Sun | 5e5fdd2 | 2016-11-18 11:20:40 -0800 | [diff] [blame] | 649 | config ARCH_P3041 |
| 650 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 651 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 652 | select E500MC |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 653 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 654 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 655 | select SYS_CACHE_SHIFT_6 |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 656 | select SYS_FSL_DDR_VER_44 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 657 | select SYS_FSL_ERRATUM_A004510 |
| 658 | select SYS_FSL_ERRATUM_A004849 |
Chris Packham | 4eaf7f5 | 2018-10-04 20:03:53 +1300 | [diff] [blame] | 659 | select SYS_FSL_ERRATUM_A005275 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 660 | select SYS_FSL_ERRATUM_A005812 |
| 661 | select SYS_FSL_ERRATUM_A006261 |
| 662 | select SYS_FSL_ERRATUM_CPU_A003999 |
| 663 | select SYS_FSL_ERRATUM_DDR_A003 |
| 664 | select SYS_FSL_ERRATUM_DDR_A003474 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 665 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 666 | select SYS_FSL_ERRATUM_I2C_A004447 |
| 667 | select SYS_FSL_ERRATUM_NMG_CPU_A011 |
| 668 | select SYS_FSL_ERRATUM_SRIO_A004034 |
| 669 | select SYS_FSL_ERRATUM_USB14 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 670 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 671 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 672 | select SYS_FSL_QORIQ_CHASSIS1 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 673 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 674 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 675 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 676 | select SYS_FSL_USB1_PHY_ENABLE |
| 677 | select SYS_FSL_USB2_PHY_ENABLE |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 678 | select FSL_ELBC |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 679 | imply CMD_NAND |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 680 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 681 | imply CMD_REGINFO |
Tuomas Tynkkynen | 9920d15 | 2017-12-08 15:36:17 +0200 | [diff] [blame] | 682 | imply FSL_SATA |
York Sun | 5e5fdd2 | 2016-11-18 11:20:40 -0800 | [diff] [blame] | 683 | |
York Sun | e71372c | 2016-11-18 11:24:40 -0800 | [diff] [blame] | 684 | config ARCH_P4080 |
| 685 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 686 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 687 | select E500MC |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 688 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 689 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 690 | select SYS_CACHE_SHIFT_6 |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 691 | select SYS_FSL_DDR_VER_44 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 692 | select SYS_FSL_ERRATUM_A004510 |
| 693 | select SYS_FSL_ERRATUM_A004580 |
| 694 | select SYS_FSL_ERRATUM_A004849 |
| 695 | select SYS_FSL_ERRATUM_A005812 |
| 696 | select SYS_FSL_ERRATUM_A007075 |
| 697 | select SYS_FSL_ERRATUM_CPC_A002 |
| 698 | select SYS_FSL_ERRATUM_CPC_A003 |
| 699 | select SYS_FSL_ERRATUM_CPU_A003999 |
| 700 | select SYS_FSL_ERRATUM_DDR_A003 |
| 701 | select SYS_FSL_ERRATUM_DDR_A003474 |
| 702 | select SYS_FSL_ERRATUM_ELBC_A001 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 703 | select SYS_FSL_ERRATUM_ESDHC111 |
| 704 | select SYS_FSL_ERRATUM_ESDHC13 |
| 705 | select SYS_FSL_ERRATUM_ESDHC135 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 706 | select SYS_FSL_ERRATUM_I2C_A004447 |
| 707 | select SYS_FSL_ERRATUM_NMG_CPU_A011 |
| 708 | select SYS_FSL_ERRATUM_SRIO_A004034 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 709 | select SYS_FSL_PCIE_COMPAT_P4080_PCIE |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 710 | select SYS_P4080_ERRATUM_CPU22 |
| 711 | select SYS_P4080_ERRATUM_PCIE_A003 |
| 712 | select SYS_P4080_ERRATUM_SERDES8 |
| 713 | select SYS_P4080_ERRATUM_SERDES9 |
| 714 | select SYS_P4080_ERRATUM_SERDES_A001 |
| 715 | select SYS_P4080_ERRATUM_SERDES_A005 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 716 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 717 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 718 | select SYS_FSL_QORIQ_CHASSIS1 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 719 | select SYS_FSL_RMU |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 720 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 721 | select SYS_FSL_SEC_COMPAT_4 |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 722 | select FSL_ELBC |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 723 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 724 | imply CMD_REGINFO |
Tuomas Tynkkynen | c88ecf4 | 2017-12-08 15:36:14 +0200 | [diff] [blame] | 725 | imply SATA_SIL |
York Sun | e71372c | 2016-11-18 11:24:40 -0800 | [diff] [blame] | 726 | |
York Sun | 9539036 | 2016-11-18 11:39:36 -0800 | [diff] [blame] | 727 | config ARCH_P5040 |
| 728 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 729 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 730 | select E500MC |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 731 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 732 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 733 | select SYS_CACHE_SHIFT_6 |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 734 | select SYS_FSL_DDR_VER_44 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 735 | select SYS_FSL_ERRATUM_A004510 |
| 736 | select SYS_FSL_ERRATUM_A004699 |
Chris Packham | 4eaf7f5 | 2018-10-04 20:03:53 +1300 | [diff] [blame] | 737 | select SYS_FSL_ERRATUM_A005275 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 738 | select SYS_FSL_ERRATUM_A005812 |
| 739 | select SYS_FSL_ERRATUM_A006261 |
| 740 | select SYS_FSL_ERRATUM_DDR_A003 |
| 741 | select SYS_FSL_ERRATUM_DDR_A003474 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 742 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 743 | select SYS_FSL_ERRATUM_USB14 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 744 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 745 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 746 | select SYS_FSL_QORIQ_CHASSIS1 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 747 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 748 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 749 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 750 | select SYS_FSL_USB1_PHY_ENABLE |
| 751 | select SYS_FSL_USB2_PHY_ENABLE |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 752 | select SYS_PPC64 |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 753 | select FSL_ELBC |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 754 | imply CMD_SATA |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 755 | imply CMD_REGINFO |
Tuomas Tynkkynen | 9920d15 | 2017-12-08 15:36:17 +0200 | [diff] [blame] | 756 | imply FSL_SATA |
York Sun | 9539036 | 2016-11-18 11:39:36 -0800 | [diff] [blame] | 757 | |
York Sun | 1034340 | 2016-11-18 12:29:51 -0800 | [diff] [blame] | 758 | config ARCH_QEMU_E500 |
| 759 | bool |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 760 | select SYS_CACHE_SHIFT_5 |
York Sun | 1034340 | 2016-11-18 12:29:51 -0800 | [diff] [blame] | 761 | |
York Sun | e5d5f5a | 2016-11-18 13:01:34 -0800 | [diff] [blame] | 762 | config ARCH_T1024 |
| 763 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 764 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 765 | select E500MC |
Tom Rini | f2428ac | 2022-03-24 17:18:01 -0400 | [diff] [blame] | 766 | select E5500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 767 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 768 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 769 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 770 | select SYS_DPAA_FMAN |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 771 | select SYS_FSL_DDR_VER_50 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 772 | select SYS_FSL_ERRATUM_A008378 |
Jaiprakash Singh | 164a5af | 2020-06-02 12:44:02 +0530 | [diff] [blame] | 773 | select SYS_FSL_ERRATUM_A008109 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 774 | select SYS_FSL_ERRATUM_A009663 |
| 775 | select SYS_FSL_ERRATUM_A009942 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 776 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 777 | select SYS_FSL_HAS_DDR3 |
| 778 | select SYS_FSL_HAS_DDR4 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 779 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 780 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 781 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 782 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 783 | select SYS_FSL_SEC_COMPAT_5 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 784 | select SYS_FSL_SINGLE_SOURCE_CLK |
| 785 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 786 | select SYS_FSL_USB_DUAL_PHY_ENABLE |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 787 | select FSL_IFC |
Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 788 | imply CMD_EEPROM |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 789 | imply CMD_NAND |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 790 | imply CMD_MTDPARTS |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 791 | imply CMD_REGINFO |
York Sun | e5d5f5a | 2016-11-18 13:01:34 -0800 | [diff] [blame] | 792 | |
York Sun | 5d73701 | 2016-11-18 13:11:12 -0800 | [diff] [blame] | 793 | config ARCH_T1040 |
| 794 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 795 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 796 | select E500MC |
Tom Rini | f2428ac | 2022-03-24 17:18:01 -0400 | [diff] [blame] | 797 | select E5500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 798 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 799 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 800 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 801 | select SYS_DPAA_FMAN |
| 802 | select SYS_DPAA_PME |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 803 | select SYS_FSL_DDR_VER_50 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 804 | select SYS_FSL_ERRATUM_A008044 |
| 805 | select SYS_FSL_ERRATUM_A008378 |
Joakim Tjernlund | 73af094 | 2019-11-20 17:07:34 +0100 | [diff] [blame] | 806 | select SYS_FSL_ERRATUM_A008109 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 807 | select SYS_FSL_ERRATUM_A009663 |
| 808 | select SYS_FSL_ERRATUM_A009942 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 809 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 810 | select SYS_FSL_HAS_DDR3 |
| 811 | select SYS_FSL_HAS_DDR4 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 812 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 813 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 814 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 815 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 816 | select SYS_FSL_SEC_COMPAT_5 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 817 | select SYS_FSL_SINGLE_SOURCE_CLK |
| 818 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 819 | select SYS_FSL_USB_DUAL_PHY_ENABLE |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 820 | select FSL_IFC |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 821 | imply CMD_MTDPARTS |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 822 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 823 | imply CMD_REGINFO |
York Sun | 5d73701 | 2016-11-18 13:11:12 -0800 | [diff] [blame] | 824 | |
York Sun | 5449c98 | 2016-11-18 13:36:39 -0800 | [diff] [blame] | 825 | config ARCH_T1042 |
| 826 | bool |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 827 | select BACKSIDE_L2_CACHE |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 828 | select E500MC |
Tom Rini | f2428ac | 2022-03-24 17:18:01 -0400 | [diff] [blame] | 829 | select E5500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 830 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 831 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 832 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 833 | select SYS_DPAA_FMAN |
| 834 | select SYS_DPAA_PME |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 835 | select SYS_FSL_DDR_VER_50 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 836 | select SYS_FSL_ERRATUM_A008044 |
| 837 | select SYS_FSL_ERRATUM_A008378 |
Joakim Tjernlund | 73af094 | 2019-11-20 17:07:34 +0100 | [diff] [blame] | 838 | select SYS_FSL_ERRATUM_A008109 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 839 | select SYS_FSL_ERRATUM_A009663 |
| 840 | select SYS_FSL_ERRATUM_A009942 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 841 | select SYS_FSL_ERRATUM_ESDHC111 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 842 | select SYS_FSL_HAS_DDR3 |
| 843 | select SYS_FSL_HAS_DDR4 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 844 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 845 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 846 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 847 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 848 | select SYS_FSL_SEC_COMPAT_5 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 849 | select SYS_FSL_SINGLE_SOURCE_CLK |
| 850 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 851 | select SYS_FSL_USB_DUAL_PHY_ENABLE |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 852 | select FSL_IFC |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 853 | imply CMD_MTDPARTS |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 854 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 855 | imply CMD_REGINFO |
York Sun | 5449c98 | 2016-11-18 13:36:39 -0800 | [diff] [blame] | 856 | |
York Sun | 0f3d80e | 2016-11-21 12:54:19 -0800 | [diff] [blame] | 857 | config ARCH_T2080 |
| 858 | bool |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 859 | select E500MC |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 860 | select E6500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 861 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 862 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 863 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 864 | select SYS_DPAA_DCE if !NOBQFMAN |
| 865 | select SYS_DPAA_FMAN if !NOBQFMAN |
| 866 | select SYS_DPAA_PME if !NOBQFMAN |
| 867 | select SYS_DPAA_RMAN if !NOBQFMAN |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 868 | select SYS_FSL_DDR_VER_47 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 869 | select SYS_FSL_ERRATUM_A006379 |
| 870 | select SYS_FSL_ERRATUM_A006593 |
Tom Rini | 601483f | 2022-06-16 14:04:40 -0400 | [diff] [blame] | 871 | select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 872 | select SYS_FSL_ERRATUM_A007212 |
Tony O'Brien | 09bfd96 | 2016-12-02 09:22:34 +1300 | [diff] [blame] | 873 | select SYS_FSL_ERRATUM_A007815 |
Darwin Dingel | 06ad970 | 2016-10-25 09:48:01 +1300 | [diff] [blame] | 874 | select SYS_FSL_ERRATUM_A007907 |
Jaiprakash Singh | 164a5af | 2020-06-02 12:44:02 +0530 | [diff] [blame] | 875 | select SYS_FSL_ERRATUM_A008109 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 876 | select SYS_FSL_ERRATUM_A009942 |
York Sun | c01e4a1 | 2016-12-28 08:43:42 -0800 | [diff] [blame] | 877 | select SYS_FSL_ERRATUM_ESDHC111 |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 878 | select FSL_PCIE_RESET |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 879 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 880 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 881 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 882 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 883 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 884 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 885 | select SYS_FSL_SRIO_LIODN |
| 886 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 887 | select SYS_FSL_USB_DUAL_PHY_ENABLE |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 888 | select SYS_PMAN if !NOBQFMAN |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 889 | select SYS_PPC64 |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 890 | select FSL_IFC |
Peng Ma | a2d4cb2 | 2019-12-23 09:28:12 +0000 | [diff] [blame] | 891 | imply CMD_SATA |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 892 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 893 | imply CMD_REGINFO |
Peng Ma | a2d4cb2 | 2019-12-23 09:28:12 +0000 | [diff] [blame] | 894 | imply FSL_SATA |
Tom Rini | d7d40f6 | 2021-08-17 17:59:41 -0400 | [diff] [blame] | 895 | imply ID_EEPROM |
York Sun | 0f3d80e | 2016-11-21 12:54:19 -0800 | [diff] [blame] | 896 | |
York Sun | 26bc57d | 2016-11-21 13:35:41 -0800 | [diff] [blame] | 897 | config ARCH_T4240 |
| 898 | bool |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 899 | select E500MC |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 900 | select E6500 |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 901 | select FSL_CORENET |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 902 | select FSL_LAW |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 903 | select SYS_CACHE_SHIFT_6 |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 904 | select SYS_DPAA_DCE if !NOBQFMAN |
| 905 | select SYS_DPAA_FMAN if !NOBQFMAN |
| 906 | select SYS_DPAA_PME if !NOBQFMAN |
| 907 | select SYS_DPAA_RMAN if !NOBQFMAN |
York Sun | 22120f1 | 2016-12-28 08:43:46 -0800 | [diff] [blame] | 908 | select SYS_FSL_DDR_VER_47 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 909 | select SYS_FSL_ERRATUM_A004468 |
| 910 | select SYS_FSL_ERRATUM_A005871 |
| 911 | select SYS_FSL_ERRATUM_A006261 |
| 912 | select SYS_FSL_ERRATUM_A006379 |
| 913 | select SYS_FSL_ERRATUM_A006593 |
Tom Rini | 601483f | 2022-06-16 14:04:40 -0400 | [diff] [blame] | 914 | select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 915 | select SYS_FSL_ERRATUM_A007798 |
Tony O'Brien | 09bfd96 | 2016-12-02 09:22:34 +1300 | [diff] [blame] | 916 | select SYS_FSL_ERRATUM_A007815 |
Darwin Dingel | 06ad970 | 2016-10-25 09:48:01 +1300 | [diff] [blame] | 917 | select SYS_FSL_ERRATUM_A007907 |
Jaiprakash Singh | 164a5af | 2020-06-02 12:44:02 +0530 | [diff] [blame] | 918 | select SYS_FSL_ERRATUM_A008109 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 919 | select SYS_FSL_ERRATUM_A009942 |
York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 920 | select SYS_FSL_HAS_DDR3 |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 921 | select SYS_FSL_HAS_SEC |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 922 | select SYS_FSL_QORIQ_CHASSIS2 |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 923 | select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 |
York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 924 | select SYS_FSL_SEC_BE |
York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 925 | select SYS_FSL_SEC_COMPAT_4 |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 926 | select SYS_FSL_SRIO_LIODN |
| 927 | select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN |
| 928 | select SYS_FSL_USB_DUAL_PHY_ENABLE |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 929 | select SYS_PMAN if !NOBQFMAN |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 930 | select SYS_PPC64 |
Prabhakar Kushwaha | d98b98d | 2017-02-02 15:01:13 +0530 | [diff] [blame] | 931 | select FSL_IFC |
Simon Glass | 3bf926c | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 932 | imply CMD_SATA |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 933 | imply CMD_NAND |
Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 934 | imply CMD_REGINFO |
Tuomas Tynkkynen | 9920d15 | 2017-12-08 15:36:17 +0200 | [diff] [blame] | 935 | imply FSL_SATA |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 936 | |
Jagdish Gediya | 96699f0 | 2018-09-03 21:35:10 +0530 | [diff] [blame] | 937 | config MPC85XX_HAVE_RESET_VECTOR |
| 938 | bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" |
| 939 | depends on MPC85xx |
| 940 | |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 941 | config BTB |
| 942 | bool "toggle branch predition" |
| 943 | |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 944 | config BOOKE |
| 945 | bool |
| 946 | default y |
| 947 | |
| 948 | config E500 |
| 949 | bool |
| 950 | default y |
| 951 | help |
| 952 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc |
| 953 | |
| 954 | config E500MC |
| 955 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 956 | select BTB |
Simon Glass | 6500ec7 | 2017-08-04 16:34:34 -0600 | [diff] [blame] | 957 | imply CMD_PCI |
York Sun | f8dee36 | 2016-12-28 08:43:27 -0800 | [diff] [blame] | 958 | help |
| 959 | Enble PowerPC E500MC core |
| 960 | |
Tom Rini | f2428ac | 2022-03-24 17:18:01 -0400 | [diff] [blame] | 961 | config E5500 |
| 962 | bool |
| 963 | |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 964 | config E6500 |
| 965 | bool |
Tom Rini | a3041d9 | 2022-02-23 12:28:15 -0500 | [diff] [blame] | 966 | select BTB |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 967 | help |
| 968 | Enable PowerPC E6500 core |
| 969 | |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 970 | config NOBQFMAN |
| 971 | bool |
| 972 | |
York Sun | 05cb79a | 2016-12-02 10:44:34 -0800 | [diff] [blame] | 973 | config FSL_LAW |
| 974 | bool |
| 975 | help |
| 976 | Use Freescale common code for Local Access Window |
York Sun | 26bc57d | 2016-11-21 13:35:41 -0800 | [diff] [blame] | 977 | |
Tom Rini | 1e7750f | 2022-06-16 14:04:34 -0400 | [diff] [blame] | 978 | config HETROGENOUS_CLUSTERS |
| 979 | bool |
| 980 | |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 981 | config MAX_CPUS |
| 982 | int "Maximum number of CPUs permitted for MPC85xx" |
| 983 | default 12 if ARCH_T4240 |
Tom Rini | ec6b37c | 2021-05-23 10:58:05 -0400 | [diff] [blame] | 984 | default 8 if ARCH_P4080 |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 985 | default 4 if ARCH_B4860 || \ |
| 986 | ARCH_P2041 || \ |
| 987 | ARCH_P3041 || \ |
| 988 | ARCH_P5040 || \ |
| 989 | ARCH_T1040 || \ |
| 990 | ARCH_T1042 || \ |
Tom Rini | 2322b95 | 2021-02-20 20:06:21 -0500 | [diff] [blame] | 991 | ARCH_T2080 |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 992 | default 2 if ARCH_B4420 || \ |
| 993 | ARCH_BSC9132 || \ |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 994 | ARCH_P1020 || \ |
| 995 | ARCH_P1021 || \ |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 996 | ARCH_P1023 || \ |
| 997 | ARCH_P1024 || \ |
| 998 | ARCH_P1025 || \ |
| 999 | ARCH_P2020 || \ |
York Sun | 3f82b56 | 2016-11-23 12:30:40 -0800 | [diff] [blame] | 1000 | ARCH_T1024 |
| 1001 | default 1 |
| 1002 | help |
| 1003 | Set this number to the maximum number of possible CPUs in the SoC. |
| 1004 | SoCs may have multiple clusters with each cluster may have multiple |
| 1005 | ports. If some ports are reserved but higher ports are used for |
| 1006 | cores, count the reserved ports. This will allocate enough memory |
| 1007 | in spin table to properly handle all cores. |
| 1008 | |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1009 | config SYS_CCSRBAR_DEFAULT |
| 1010 | hex "Default CCSRBAR address" |
| 1011 | default 0xff700000 if ARCH_BSC9131 || \ |
| 1012 | ARCH_BSC9132 || \ |
| 1013 | ARCH_C29X || \ |
| 1014 | ARCH_MPC8536 || \ |
| 1015 | ARCH_MPC8540 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1016 | ARCH_MPC8544 || \ |
| 1017 | ARCH_MPC8548 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1018 | ARCH_MPC8560 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1019 | ARCH_P1010 || \ |
| 1020 | ARCH_P1011 || \ |
| 1021 | ARCH_P1020 || \ |
| 1022 | ARCH_P1021 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1023 | ARCH_P1024 || \ |
| 1024 | ARCH_P1025 || \ |
| 1025 | ARCH_P2020 |
| 1026 | default 0xff600000 if ARCH_P1023 |
| 1027 | default 0xfe000000 if ARCH_B4420 || \ |
| 1028 | ARCH_B4860 || \ |
| 1029 | ARCH_P2041 || \ |
| 1030 | ARCH_P3041 || \ |
| 1031 | ARCH_P4080 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1032 | ARCH_P5040 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1033 | ARCH_T1024 || \ |
| 1034 | ARCH_T1040 || \ |
| 1035 | ARCH_T1042 || \ |
| 1036 | ARCH_T2080 || \ |
York Sun | 830fc1b | 2016-12-01 13:26:06 -0800 | [diff] [blame] | 1037 | ARCH_T4240 |
| 1038 | default 0xe0000000 if ARCH_QEMU_E500 |
| 1039 | help |
| 1040 | Default value of CCSRBAR comes from power-on-reset. It |
| 1041 | is fixed on each SoC. Some SoCs can have different value |
| 1042 | if changed by pre-boot regime. The value here must match |
| 1043 | the current value in SoC. If not sure, do not change. |
| 1044 | |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 1045 | config SYS_DPAA_PME |
| 1046 | bool |
| 1047 | |
| 1048 | config SYS_DPAA_DCE |
| 1049 | bool |
| 1050 | |
| 1051 | config SYS_DPAA_RMAN |
| 1052 | bool |
| 1053 | |
Tom Rini | fdd0da4 | 2022-03-11 09:11:59 -0500 | [diff] [blame] | 1054 | config A003399_NOR_WORKAROUND |
| 1055 | bool |
| 1056 | help |
| 1057 | Enables a workaround for IFC erratum A003399. It is only required |
| 1058 | during NOR boot. |
| 1059 | |
Tom Rini | 5f7c886 | 2022-03-11 09:12:00 -0500 | [diff] [blame] | 1060 | config A008044_WORKAROUND |
| 1061 | bool |
| 1062 | help |
| 1063 | Enables a workaround for T1040/T1042 erratum A008044. It is only |
| 1064 | required during NAND boot and valid for Rev 1.0 SoC revision |
| 1065 | |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1066 | config SYS_FSL_ERRATUM_A004468 |
| 1067 | bool |
| 1068 | |
| 1069 | config SYS_FSL_ERRATUM_A004477 |
| 1070 | bool |
| 1071 | |
| 1072 | config SYS_FSL_ERRATUM_A004508 |
| 1073 | bool |
| 1074 | |
| 1075 | config SYS_FSL_ERRATUM_A004580 |
| 1076 | bool |
| 1077 | |
| 1078 | config SYS_FSL_ERRATUM_A004699 |
| 1079 | bool |
| 1080 | |
| 1081 | config SYS_FSL_ERRATUM_A004849 |
| 1082 | bool |
| 1083 | |
| 1084 | config SYS_FSL_ERRATUM_A004510 |
| 1085 | bool |
| 1086 | |
| 1087 | config SYS_FSL_ERRATUM_A004510_SVR_REV |
| 1088 | hex |
| 1089 | depends on SYS_FSL_ERRATUM_A004510 |
| 1090 | default 0x20 if ARCH_P4080 |
| 1091 | default 0x10 |
| 1092 | |
| 1093 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 |
| 1094 | hex |
| 1095 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) |
| 1096 | default 0x11 |
| 1097 | |
| 1098 | config SYS_FSL_ERRATUM_A005125 |
| 1099 | bool |
| 1100 | |
| 1101 | config SYS_FSL_ERRATUM_A005434 |
| 1102 | bool |
| 1103 | |
| 1104 | config SYS_FSL_ERRATUM_A005812 |
| 1105 | bool |
| 1106 | |
| 1107 | config SYS_FSL_ERRATUM_A005871 |
| 1108 | bool |
| 1109 | |
Chris Packham | 4eaf7f5 | 2018-10-04 20:03:53 +1300 | [diff] [blame] | 1110 | config SYS_FSL_ERRATUM_A005275 |
| 1111 | bool |
| 1112 | |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1113 | config SYS_FSL_ERRATUM_A006261 |
| 1114 | bool |
| 1115 | |
| 1116 | config SYS_FSL_ERRATUM_A006379 |
| 1117 | bool |
| 1118 | |
| 1119 | config SYS_FSL_ERRATUM_A006384 |
| 1120 | bool |
| 1121 | |
| 1122 | config SYS_FSL_ERRATUM_A006475 |
| 1123 | bool |
| 1124 | |
| 1125 | config SYS_FSL_ERRATUM_A006593 |
| 1126 | bool |
| 1127 | |
| 1128 | config SYS_FSL_ERRATUM_A007075 |
| 1129 | bool |
| 1130 | |
| 1131 | config SYS_FSL_ERRATUM_A007186 |
| 1132 | bool |
| 1133 | |
| 1134 | config SYS_FSL_ERRATUM_A007212 |
| 1135 | bool |
| 1136 | |
Tony O'Brien | 09bfd96 | 2016-12-02 09:22:34 +1300 | [diff] [blame] | 1137 | config SYS_FSL_ERRATUM_A007815 |
| 1138 | bool |
| 1139 | |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1140 | config SYS_FSL_ERRATUM_A007798 |
| 1141 | bool |
| 1142 | |
Darwin Dingel | 06ad970 | 2016-10-25 09:48:01 +1300 | [diff] [blame] | 1143 | config SYS_FSL_ERRATUM_A007907 |
| 1144 | bool |
| 1145 | |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1146 | config SYS_FSL_ERRATUM_A008044 |
| 1147 | bool |
Tom Rini | 5f7c886 | 2022-03-11 09:12:00 -0500 | [diff] [blame] | 1148 | select A008044_WORKAROUND if MTD_RAW_NAND |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1149 | |
| 1150 | config SYS_FSL_ERRATUM_CPC_A002 |
| 1151 | bool |
| 1152 | |
| 1153 | config SYS_FSL_ERRATUM_CPC_A003 |
| 1154 | bool |
| 1155 | |
| 1156 | config SYS_FSL_ERRATUM_CPU_A003999 |
| 1157 | bool |
| 1158 | |
| 1159 | config SYS_FSL_ERRATUM_ELBC_A001 |
| 1160 | bool |
| 1161 | |
| 1162 | config SYS_FSL_ERRATUM_I2C_A004447 |
| 1163 | bool |
| 1164 | |
| 1165 | config SYS_FSL_A004447_SVR_REV |
| 1166 | hex |
| 1167 | depends on SYS_FSL_ERRATUM_I2C_A004447 |
| 1168 | default 0x00 if ARCH_MPC8548 |
| 1169 | default 0x10 if ARCH_P1010 |
| 1170 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 |
Tom Rini | a99dab1 | 2021-02-20 20:06:30 -0500 | [diff] [blame] | 1171 | default 0x20 if ARCH_P3041 || ARCH_P4080 |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1172 | |
| 1173 | config SYS_FSL_ERRATUM_IFC_A002769 |
| 1174 | bool |
| 1175 | |
| 1176 | config SYS_FSL_ERRATUM_IFC_A003399 |
| 1177 | bool |
| 1178 | |
| 1179 | config SYS_FSL_ERRATUM_NMG_CPU_A011 |
| 1180 | bool |
| 1181 | |
| 1182 | config SYS_FSL_ERRATUM_NMG_ETSEC129 |
| 1183 | bool |
| 1184 | |
| 1185 | config SYS_FSL_ERRATUM_NMG_LBC103 |
| 1186 | bool |
| 1187 | |
| 1188 | config SYS_FSL_ERRATUM_P1010_A003549 |
| 1189 | bool |
| 1190 | |
| 1191 | config SYS_FSL_ERRATUM_SATA_A001 |
| 1192 | bool |
| 1193 | |
| 1194 | config SYS_FSL_ERRATUM_SEC_A003571 |
| 1195 | bool |
| 1196 | |
| 1197 | config SYS_FSL_ERRATUM_SRIO_A004034 |
| 1198 | bool |
| 1199 | |
| 1200 | config SYS_FSL_ERRATUM_USB14 |
| 1201 | bool |
| 1202 | |
Tom Rini | f76750d | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 1203 | config SYS_HAS_SERDES |
| 1204 | bool |
| 1205 | |
York Sun | 63659ff | 2016-12-28 08:43:43 -0800 | [diff] [blame] | 1206 | config SYS_P4080_ERRATUM_CPU22 |
| 1207 | bool |
| 1208 | |
| 1209 | config SYS_P4080_ERRATUM_PCIE_A003 |
| 1210 | bool |
| 1211 | |
| 1212 | config SYS_P4080_ERRATUM_SERDES8 |
| 1213 | bool |
| 1214 | |
| 1215 | config SYS_P4080_ERRATUM_SERDES9 |
| 1216 | bool |
| 1217 | |
| 1218 | config SYS_P4080_ERRATUM_SERDES_A001 |
| 1219 | bool |
| 1220 | |
| 1221 | config SYS_P4080_ERRATUM_SERDES_A005 |
| 1222 | bool |
| 1223 | |
Hou Zhiqiang | c16dfd0 | 2019-05-22 22:46:03 +0800 | [diff] [blame] | 1224 | config FSL_PCIE_DISABLE_ASPM |
| 1225 | bool |
| 1226 | |
Hou Zhiqiang | 2b12f6c | 2019-05-23 11:52:44 +0800 | [diff] [blame] | 1227 | config FSL_PCIE_RESET |
| 1228 | bool |
| 1229 | |
Tom Rini | 2db82bf | 2022-11-16 13:10:34 -0500 | [diff] [blame^] | 1230 | config SYS_PMAN |
| 1231 | bool |
| 1232 | |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 1233 | config SYS_FSL_RAID_ENGINE |
| 1234 | bool |
| 1235 | |
| 1236 | config SYS_FSL_RMU |
| 1237 | bool |
| 1238 | |
York Sun | 7371774 | 2016-12-28 08:43:49 -0800 | [diff] [blame] | 1239 | config SYS_FSL_QORIQ_CHASSIS1 |
| 1240 | bool |
| 1241 | |
| 1242 | config SYS_FSL_QORIQ_CHASSIS2 |
| 1243 | bool |
| 1244 | |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1245 | config SYS_FSL_NUM_LAWS |
| 1246 | int "Number of local access windows" |
| 1247 | depends on FSL_LAW |
| 1248 | default 32 if ARCH_B4420 || \ |
| 1249 | ARCH_B4860 || \ |
| 1250 | ARCH_P2041 || \ |
| 1251 | ARCH_P3041 || \ |
| 1252 | ARCH_P4080 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1253 | ARCH_P5040 || \ |
| 1254 | ARCH_T2080 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1255 | ARCH_T4240 |
Tom Rini | 6c3d993 | 2021-05-14 21:34:22 -0400 | [diff] [blame] | 1256 | default 16 if ARCH_T1024 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1257 | ARCH_T1040 || \ |
| 1258 | ARCH_T1042 |
| 1259 | default 12 if ARCH_BSC9131 || \ |
| 1260 | ARCH_BSC9132 || \ |
| 1261 | ARCH_C29X || \ |
| 1262 | ARCH_MPC8536 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1263 | ARCH_P1010 || \ |
| 1264 | ARCH_P1011 || \ |
| 1265 | ARCH_P1020 || \ |
| 1266 | ARCH_P1021 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1267 | ARCH_P1023 || \ |
| 1268 | ARCH_P1024 || \ |
| 1269 | ARCH_P1025 || \ |
| 1270 | ARCH_P2020 |
| 1271 | default 10 if ARCH_MPC8544 || \ |
Tom Rini | 8069689 | 2021-05-14 21:34:23 -0400 | [diff] [blame] | 1272 | ARCH_MPC8548 |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1273 | default 8 if ARCH_MPC8540 || \ |
York Sun | 8303acb | 2016-12-01 14:05:02 -0800 | [diff] [blame] | 1274 | ARCH_MPC8560 |
| 1275 | help |
| 1276 | Number of local access windows. This is fixed per SoC. |
| 1277 | If not sure, do not change. |
| 1278 | |
Tom Rini | 7da6a9e | 2022-07-23 13:05:11 -0400 | [diff] [blame] | 1279 | config SYS_FSL_CORES_PER_CLUSTER |
| 1280 | int |
| 1281 | depends on SYS_FSL_QORIQ_CHASSIS2 |
| 1282 | default 4 if ARCH_B4860 || ARCH_T2080 || ARCH_T4240 |
| 1283 | default 2 if ARCH_B4420 |
| 1284 | default 1 if ARCH_T1024 || ARCH_T1040 || ARCH_T1042 |
| 1285 | |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 1286 | config SYS_FSL_THREADS_PER_CORE |
| 1287 | int |
Tom Rini | 7da6a9e | 2022-07-23 13:05:11 -0400 | [diff] [blame] | 1288 | depends on SYS_FSL_QORIQ_CHASSIS2 |
York Sun | 9ec1010 | 2016-12-28 08:43:48 -0800 | [diff] [blame] | 1289 | default 2 if E6500 |
| 1290 | default 1 |
| 1291 | |
York Sun | 26e79b6 | 2016-12-28 08:43:28 -0800 | [diff] [blame] | 1292 | config SYS_NUM_TLBCAMS |
| 1293 | int "Number of TLB CAM entries" |
| 1294 | default 64 if E500MC |
| 1295 | default 16 |
| 1296 | help |
| 1297 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, |
| 1298 | 16 for other E500 SoCs. |
| 1299 | |
Tom Rini | 1e7750f | 2022-06-16 14:04:34 -0400 | [diff] [blame] | 1300 | if HETROGENOUS_CLUSTERS |
| 1301 | |
| 1302 | config SYS_MAPLE |
| 1303 | def_bool y |
| 1304 | |
| 1305 | config SYS_CPRI |
| 1306 | def_bool y |
| 1307 | |
| 1308 | config PPC_CLUSTER_START |
| 1309 | int |
| 1310 | default 0 |
| 1311 | |
| 1312 | config DSP_CLUSTER_START |
| 1313 | int |
| 1314 | default 1 |
| 1315 | |
| 1316 | config SYS_CPRI_CLK |
| 1317 | int |
| 1318 | default 3 |
| 1319 | |
| 1320 | config SYS_ULB_CLK |
| 1321 | int |
| 1322 | default 4 |
| 1323 | |
| 1324 | config SYS_ETVPE_CLK |
| 1325 | int |
| 1326 | default 1 |
| 1327 | endif |
| 1328 | |
Tom Rini | 22a2283 | 2022-10-28 20:27:00 -0400 | [diff] [blame] | 1329 | config SYS_L2_SIZE_256KB |
| 1330 | bool |
| 1331 | |
| 1332 | config SYS_L2_SIZE_512KB |
| 1333 | bool |
| 1334 | |
| 1335 | config SYS_L2_SIZE |
| 1336 | int |
| 1337 | default 262144 if SYS_L2_SIZE_256KB |
| 1338 | default 524288 if SYS_L2_SIZE_512KB |
| 1339 | |
Tom Rini | b40d2b2 | 2022-03-18 08:38:32 -0400 | [diff] [blame] | 1340 | config BACKSIDE_L2_CACHE |
| 1341 | bool |
| 1342 | |
Tom Rini | b85d759 | 2022-10-28 20:27:01 -0400 | [diff] [blame] | 1343 | config SYS_L3_SIZE_256KB |
| 1344 | bool |
| 1345 | |
| 1346 | config SYS_L3_SIZE_512KB |
| 1347 | bool |
| 1348 | |
| 1349 | config SYS_L3_SIZE_1024KB |
| 1350 | bool |
| 1351 | |
| 1352 | config SYS_L3_SIZE |
| 1353 | int |
| 1354 | default 262144 if SYS_L3_SIZE_256KB |
| 1355 | default 524288 if SYS_L3_SIZE_512KB |
| 1356 | default 1048576 if SYS_L3_SIZE_512KB |
| 1357 | |
York Sun | 4851278 | 2016-12-28 08:43:50 -0800 | [diff] [blame] | 1358 | config SYS_PPC64 |
| 1359 | bool |
| 1360 | |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 1361 | config SYS_PPC_E500_USE_DEBUG_TLB |
| 1362 | bool |
| 1363 | |
Prabhakar Kushwaha | 0687897 | 2017-02-02 15:01:48 +0530 | [diff] [blame] | 1364 | config FSL_ELBC |
| 1365 | bool |
| 1366 | |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 1367 | config SYS_PPC_E500_DEBUG_TLB |
| 1368 | int "Temporary TLB entry for external debugger" |
| 1369 | depends on SYS_PPC_E500_USE_DEBUG_TLB |
| 1370 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 |
| 1371 | default 1 if ARCH_MPC8536 |
Tom Rini | ed7fe2b | 2021-05-14 21:34:25 -0400 | [diff] [blame] | 1372 | default 2 if ARCH_P1011 || \ |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 1373 | ARCH_P1020 || \ |
| 1374 | ARCH_P1021 || \ |
York Sun | 53c9538 | 2016-12-28 08:43:29 -0800 | [diff] [blame] | 1375 | ARCH_P1024 || \ |
| 1376 | ARCH_P1025 || \ |
| 1377 | ARCH_P2020 |
| 1378 | default 3 if ARCH_P1010 || \ |
| 1379 | ARCH_BSC9132 || \ |
| 1380 | ARCH_C29X |
| 1381 | help |
| 1382 | Select a temporary TLB entry to be used during boot to work |
| 1383 | around limitations in e500v1 and e500v2 external debugger |
| 1384 | support. This reduces the portions of the boot code where |
| 1385 | breakpoints and single stepping do not work. The value of this |
| 1386 | symbol should be set to the TLB1 entry to be used for this |
| 1387 | purpose. If unsure, do not change. |
| 1388 | |
Prabhakar Kushwaha | 1c40707 | 2017-02-02 15:01:26 +0530 | [diff] [blame] | 1389 | config SYS_FSL_IFC_CLK_DIV |
| 1390 | int "Divider of platform clock" |
| 1391 | depends on FSL_IFC |
| 1392 | default 2 if ARCH_B4420 || \ |
| 1393 | ARCH_B4860 || \ |
| 1394 | ARCH_T1024 || \ |
Prabhakar Kushwaha | 1c40707 | 2017-02-02 15:01:26 +0530 | [diff] [blame] | 1395 | ARCH_T1040 || \ |
| 1396 | ARCH_T1042 || \ |
Prabhakar Kushwaha | 1c40707 | 2017-02-02 15:01:26 +0530 | [diff] [blame] | 1397 | ARCH_T4240 |
| 1398 | default 1 |
| 1399 | help |
| 1400 | Defines divider of platform clock(clock input to |
| 1401 | IFC controller). |
| 1402 | |
Prabhakar Kushwaha | add63f9 | 2017-02-02 15:02:00 +0530 | [diff] [blame] | 1403 | config SYS_FSL_LBC_CLK_DIV |
| 1404 | int "Divider of platform clock" |
| 1405 | depends on FSL_ELBC || ARCH_MPC8540 || \ |
Tom Rini | a857133 | 2021-05-14 21:34:20 -0400 | [diff] [blame] | 1406 | ARCH_MPC8548 || \ |
Tom Rini | 8069689 | 2021-05-14 21:34:23 -0400 | [diff] [blame] | 1407 | ARCH_MPC8560 |
Prabhakar Kushwaha | add63f9 | 2017-02-02 15:02:00 +0530 | [diff] [blame] | 1408 | |
| 1409 | default 2 if ARCH_P2041 || \ |
| 1410 | ARCH_P3041 || \ |
| 1411 | ARCH_P4080 || \ |
Prabhakar Kushwaha | add63f9 | 2017-02-02 15:02:00 +0530 | [diff] [blame] | 1412 | ARCH_P5040 |
| 1413 | default 1 |
| 1414 | |
| 1415 | help |
| 1416 | Defines divider of platform clock(clock input to |
| 1417 | eLBC controller). |
| 1418 | |
Tom Rini | fbc3621 | 2022-06-15 12:03:45 -0400 | [diff] [blame] | 1419 | config ENABLE_36BIT_PHYS |
| 1420 | bool "Enable 36bit physical address space support" |
| 1421 | |
Tom Rini | 3dab405 | 2022-06-25 11:02:43 -0400 | [diff] [blame] | 1422 | config SYS_BOOK3E_HV |
| 1423 | bool "Category E.HV is supported" |
| 1424 | depends on BOOKE |
| 1425 | |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 1426 | config FSL_CORENET |
| 1427 | bool |
| 1428 | select SYS_FSL_CPC |
| 1429 | |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 1430 | config FSL_NGPIXIS |
| 1431 | bool |
| 1432 | |
Tom Rini | f6c1f91 | 2022-06-25 11:02:45 -0400 | [diff] [blame] | 1433 | config SYS_CPC_REINIT_F |
| 1434 | bool |
| 1435 | help |
| 1436 | The CPC is configured as SRAM at the time of U-Boot entry and is |
| 1437 | required to be re-initialized. |
| 1438 | |
| 1439 | config SYS_FSL_CPC |
Tom Rini | 6f6b970 | 2022-07-23 13:05:08 -0400 | [diff] [blame] | 1440 | bool |
Tom Rini | f6c1f91 | 2022-06-25 11:02:45 -0400 | [diff] [blame] | 1441 | |
Tom Rini | 38d091a | 2022-06-27 13:35:46 -0400 | [diff] [blame] | 1442 | config SYS_CACHE_STASHING |
| 1443 | bool "Enable cache stashing" |
| 1444 | |
Tom Rini | 4143a23 | 2022-07-31 21:08:28 -0400 | [diff] [blame] | 1445 | config SYS_FSL_PCIE_COMPAT_P4080_PCIE |
| 1446 | bool |
| 1447 | |
| 1448 | config SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
| 1449 | bool |
| 1450 | |
| 1451 | config SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
| 1452 | bool |
| 1453 | |
| 1454 | config SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 |
| 1455 | bool |
| 1456 | |
| 1457 | config SYS_FSL_PCIE_COMPAT |
| 1458 | string |
| 1459 | depends on FSL_CORENET |
| 1460 | default "fsl,p4080-pcie" if SYS_FSL_PCIE_COMPAT_P4080_PCIE |
| 1461 | default "fsl,qoriq-pcie-v2.2" if SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 |
| 1462 | default "fsl,qoriq-pcie-v2.4" if SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 |
| 1463 | default "fsl,qoriq-pcie-v3.0" if SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 |
| 1464 | help |
| 1465 | Defines the string to utilize when trying to match PCIe device tree |
| 1466 | nodes for the given platform. |
| 1467 | |
Tom Rini | ff4e87c | 2022-07-31 21:08:29 -0400 | [diff] [blame] | 1468 | config SYS_FSL_SINGLE_SOURCE_CLK |
| 1469 | bool |
| 1470 | |
| 1471 | config SYS_FSL_SRIO_LIODN |
| 1472 | bool |
| 1473 | |
| 1474 | config SYS_FSL_TBCLK_DIV |
| 1475 | int |
| 1476 | default 32 if ARCH_P2041 || ARCH_P3041 |
| 1477 | default 16 if ARCH_P4080 || ARCH_P5040 || ARCH_T4240 || ARCH_B4860 || \ |
| 1478 | ARCH_B4420 || ARCH_T1040 || ARCH_T1042 || \ |
| 1479 | ARCH_T1024 || ARCH_T2080 |
| 1480 | default 8 |
| 1481 | help |
| 1482 | Defines the core time base clock divider ratio compared to the system |
| 1483 | clock. On most PQ3 devices this is 8, on newer QorIQ devices it can |
| 1484 | be 16 or 32. The ratio varies from SoC to Soc. |
| 1485 | |
| 1486 | config SYS_FSL_USB1_PHY_ENABLE |
| 1487 | bool |
| 1488 | |
| 1489 | config SYS_FSL_USB2_PHY_ENABLE |
| 1490 | bool |
| 1491 | |
| 1492 | config SYS_FSL_USB_DUAL_PHY_ENABLE |
| 1493 | bool |
| 1494 | |
Tom Rini | de47ff5 | 2022-06-10 22:59:37 -0400 | [diff] [blame] | 1495 | config SYS_MPC85XX_NO_RESETVEC |
| 1496 | bool "Discard resetvec section and move bootpg section up" |
| 1497 | depends on MPC85xx |
| 1498 | help |
| 1499 | If this variable is specified, the section .resetvec is not kept and |
| 1500 | the section .bootpg is placed in the previous 4k of the .text section. |
| 1501 | |
| 1502 | config SPL_SYS_MPC85XX_NO_RESETVEC |
| 1503 | bool "Discard resetvec section and move bootpg section up, in SPL" |
| 1504 | depends on MPC85xx && SPL |
| 1505 | help |
| 1506 | If this variable is specified, the section .resetvec is not kept and |
| 1507 | the section .bootpg is placed in the previous 4k of the .text section, |
| 1508 | of the SPL portion of the binary. |
| 1509 | |
| 1510 | config TPL_SYS_MPC85XX_NO_RESETVEC |
| 1511 | bool "Discard resetvec section and move bootpg section up, in TPL" |
| 1512 | depends on MPC85xx && TPL |
| 1513 | help |
| 1514 | If this variable is specified, the section .resetvec is not kept and |
| 1515 | the section .bootpg is placed in the previous 4k of the .text section, |
| 1516 | of the SPL portion of the binary. |
| 1517 | |
Rajesh Bhagat | c8c0170 | 2021-02-15 09:46:14 +0100 | [diff] [blame] | 1518 | config FSL_VIA |
| 1519 | bool |
| 1520 | |
Bin Meng | 1d636a0 | 2021-02-25 17:22:58 +0800 | [diff] [blame] | 1521 | source "board/emulation/qemu-ppce500/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1522 | source "board/freescale/mpc8548cds/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1523 | source "board/freescale/p1010rdb/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1524 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1525 | source "board/freescale/p2041rdb/Kconfig" |
Shengzhou Liu | 48c6f32 | 2014-11-24 17:11:56 +0800 | [diff] [blame] | 1526 | source "board/freescale/t102xrdb/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1527 | source "board/freescale/t104xrdb/Kconfig" |
| 1528 | source "board/freescale/t208xqds/Kconfig" |
| 1529 | source "board/freescale/t208xrdb/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1530 | source "board/freescale/t4rdb/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1531 | source "board/socrates/Kconfig" |
Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1532 | |
| 1533 | endmenu |