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wdenk56523f12004-07-11 17:40:54 +00001/*
Wolfgang Denk69445d62014-10-24 15:33:43 +02002 * (C) Copyright 2003-2014
wdenk56523f12004-07-11 17:40:54 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk45a212c2006-07-19 17:52:30 +02005 * (C) Copyright 2004-2006
wdenk56523f12004-07-11 17:40:54 +00006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
wdenk56523f12004-07-11 17:40:54 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
wdenk56523f12004-07-11 17:40:54 +000014/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090019#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Wolfgang Denk5078cce2006-07-21 11:16:34 +020020#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
Wolfgang Denk69445d62014-10-24 15:33:43 +020022#define CONFIG_DISPLAY_BOARDINFO
wdenk56523f12004-07-11 17:40:54 +000023
Wolfgang Denk2ae18242010-10-06 09:05:45 +020024/*
25 * Valid values for CONFIG_SYS_TEXT_BASE are:
26 * 0xFC000000 boot low (standard configuration with room for
27 * max 64 MByte Flash ROM)
28 * 0xFFF00000 boot high (for a backup copy of U-Boot)
29 * 0x00100000 boot from RAM (for testing only)
30 */
31#ifndef CONFIG_SYS_TEXT_BASE
32#define CONFIG_SYS_TEXT_BASE 0xFC000000
33#endif
34
Wolfgang Denk5196a7a2006-08-18 23:27:33 +020035/* On a Cameron or on a FO300 board or ... */
Heiko Schocher98e69562010-12-04 08:34:04 +010036#if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
37 && !defined(CONFIG_FO300)
Wolfgang Denk5078cce2006-07-21 11:16:34 +020038#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
39#endif
wdenk56523f12004-07-11 17:40:54 +000040
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk56523f12004-07-11 17:40:54 +000042
Becky Bruce31d82672008-05-08 19:02:12 -050043#define CONFIG_HIGH_BATS 1 /* High BATs supported */
44
wdenk56523f12004-07-11 17:40:54 +000045/*
46 * Serial console configuration
47 */
Wolfgang Denk5078cce2006-07-21 11:16:34 +020048#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
49#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Axel Beierleinbef92e22008-08-16 00:30:48 +020051#define CONFIG_BOOTCOUNT_LIMIT 1
wdenk56523f12004-07-11 17:40:54 +000052
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020053#ifdef CONFIG_FO300
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020055#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
56#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
Bartlomiej Siekaddde6b72006-08-22 10:38:18 +020057#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020058#if 0
59#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
60 /* switch is closed */
61#endif
62
63#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
64 /* switch is open */
Wolfgang Denk5196a7a2006-08-18 23:27:33 +020065#endif /* CONFIG_FO300 */
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +020066
Heiko Schocher98e69562010-12-04 08:34:04 +010067#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
wdenk7e6bf352004-12-12 22:06:17 +000068#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
69#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
70#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
wdenk7e6bf352004-12-12 22:06:17 +000072#define CONFIG_BOARD_EARLY_INIT_R
73#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +000074
wdenk56523f12004-07-11 17:40:54 +000075/*
76 * PCI Mapping:
77 * 0x40000000 - 0x4fffffff - PCI Memory
78 * 0x50000000 - 0x50ffffff - PCI IO Space
79 */
Heiko Schocher98e69562010-12-04 08:34:04 +010080#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
wdenk7e6bf352004-12-12 22:06:17 +000081#define CONFIG_PCI 1
wdenk56523f12004-07-11 17:40:54 +000082#define CONFIG_PCI_PNP 1
wdenk31a64922004-08-28 21:09:14 +000083/* #define CONFIG_PCI_SCAN_SHOW 1 */
wdenk56523f12004-07-11 17:40:54 +000084
85#define CONFIG_PCI_MEM_BUS 0x40000000
86#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
87#define CONFIG_PCI_MEM_SIZE 0x10000000
88
89#define CONFIG_PCI_IO_BUS 0x50000000
90#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
91#define CONFIG_PCI_IO_SIZE 0x01000000
92
Wolfgang Denkcd65a3d2006-06-16 16:11:34 +020093#define CONFIG_EEPRO100 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020094#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
wdenk56523f12004-07-11 17:40:54 +000095#define CONFIG_NS8382X 1
wdenk83e40ba2005-03-31 18:42:15 +000096#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +000097
wdenk8f0b7cb2005-03-27 23:41:39 +000098/*
99 * Video console
100 */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200101#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
wdenk8f0b7cb2005-03-27 23:41:39 +0000102#define CONFIG_VIDEO
103#define CONFIG_VIDEO_SM501
104#define CONFIG_VIDEO_SM501_32BPP
105#define CONFIG_CFB_CONSOLE
106#define CONFIG_VIDEO_LOGO
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200107
108#ifndef CONFIG_FO300
wdenk8f0b7cb2005-03-27 23:41:39 +0000109#define CONFIG_CONSOLE_EXTRA_INFO
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200110#else
111#define CONFIG_VIDEO_BMP_LOGO
112#endif
113
114#define CONFIG_VGA_AS_SINGLE_DEVICE
wdenk8f0b7cb2005-03-27 23:41:39 +0000115#define CONFIG_VIDEO_SW_CURSOR
116#define CONFIG_SPLASH_SCREEN
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200118#endif /* #ifndef CONFIG_TQM5200S */
wdenk56523f12004-07-11 17:40:54 +0000119
wdenk56523f12004-07-11 17:40:54 +0000120/* Partitions */
wdenk89c02e22005-03-16 16:32:26 +0000121#define CONFIG_MAC_PARTITION
wdenk56523f12004-07-11 17:40:54 +0000122#define CONFIG_DOS_PARTITION
wdenk8f0b7cb2005-03-27 23:41:39 +0000123#define CONFIG_ISO_PARTITION
wdenk56523f12004-07-11 17:40:54 +0000124
125/* USB */
Heiko Schocher98e69562010-12-04 08:34:04 +0100126#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
127 defined(CONFIG_STK52XX)
Markus Klotzbuecher7b59b3c2006-11-27 11:44:58 +0100128#define CONFIG_USB_OHCI_NEW
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_OHCI_BE_CONTROLLER
wdenk56523f12004-07-11 17:40:54 +0000130#define CONFIG_USB_STORAGE
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +0100131
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
133#define CONFIG_SYS_USB_OHCI_CPU_INIT
134#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
135#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
136#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +0100137
wdenk56523f12004-07-11 17:40:54 +0000138#endif
139
Wolfgang Denk135ae002006-07-22 01:20:03 +0200140#ifndef CONFIG_CAM5200
wdenk56523f12004-07-11 17:40:54 +0000141/* POST support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
143 CONFIG_SYS_POST_CPU | \
144 CONFIG_SYS_POST_I2C)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200145#endif
wdenk56523f12004-07-11 17:40:54 +0000146
147#ifdef CONFIG_POST
wdenk56523f12004-07-11 17:40:54 +0000148/* preserve space for the post_word at end of on-chip SRAM */
149#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
wdenk56523f12004-07-11 17:40:54 +0000150#endif
151
wdenk56523f12004-07-11 17:40:54 +0000152/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500153 * BOOTP options
wdenk56523f12004-07-11 17:40:54 +0000154 */
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500155#define CONFIG_BOOTP_BOOTFILESIZE
156#define CONFIG_BOOTP_BOOTPATH
157#define CONFIG_BOOTP_GATEWAY
158#define CONFIG_BOOTP_HOSTNAME
wdenk56523f12004-07-11 17:40:54 +0000159
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500160/*
Jon Loeliger26946902007-07-04 22:30:50 -0500161 * Command line configuration.
wdenk56523f12004-07-11 17:40:54 +0000162 */
Jon Loeliger26946902007-07-04 22:30:50 -0500163#define CONFIG_CMD_DATE
Jon Loeliger26946902007-07-04 22:30:50 -0500164#define CONFIG_CMD_EEPROM
Jon Loeliger26946902007-07-04 22:30:50 -0500165#define CONFIG_CMD_JFFS2
Jon Loeliger26946902007-07-04 22:30:50 -0500166#define CONFIG_CMD_REGINFO
Jon Loeliger26946902007-07-04 22:30:50 -0500167#define CONFIG_CMD_BSP
168
169#ifdef CONFIG_VIDEO
170 #define CONFIG_CMD_BMP
171#endif
172
173#ifdef CONFIG_PCI
Marian Balakowicz2b2a5872007-10-05 10:40:54 +0200174#define CONFIG_CMD_PCI
TsiChung Liewf33fca22008-03-30 01:19:06 -0500175#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Jon Loeliger26946902007-07-04 22:30:50 -0500176#endif
177
Heiko Schocher98e69562010-12-04 08:34:04 +0100178#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
179 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
Jon Loeliger26946902007-07-04 22:30:50 -0500180 #define CONFIG_CMD_IDE
Jon Loeliger26946902007-07-04 22:30:50 -0500181#endif
182
Heiko Schocher98e69562010-12-04 08:34:04 +0100183#if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
184 defined(CONFIG_STK52XX)
Jon Loeliger26946902007-07-04 22:30:50 -0500185 #define CONFIG_CFG_USB
186 #define CONFIG_CFG_FAT
187#endif
188
Jon Loeligeraf075ee2007-07-08 17:02:01 -0500189#ifdef CONFIG_POST
190 #define CONFIG_CMD_DIAG
191#endif
192
wdenk151ab832005-02-24 22:44:16 +0000193#define CONFIG_TIMESTAMP /* display image timestamps */
194
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200195#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
wdenk56523f12004-07-11 17:40:54 +0000197#endif
198
199/*
200 * Autobooting
201 */
wdenk56523f12004-07-11 17:40:54 +0000202
wdenk81050922004-07-11 20:04:51 +0000203#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk4c4aca82006-07-26 10:33:37 +0200204 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk56523f12004-07-11 17:40:54 +0000205 "echo"
206
207#undef CONFIG_BOOTARGS
208
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
Wolfgang Denk78d620e2006-11-23 22:58:58 +0100210# define ENV_UPDT \
211 "update=protect off FFF00000 +${filesize};" \
212 "erase FFF00000 +${filesize};" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200213 "cp.b 200000 FFF00000 ${filesize};" \
Wolfgang Denk78d620e2006-11-23 22:58:58 +0100214 "protect on FFF00000 +${filesize}\0"
215#else /* default lowboot configuration */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200216# define ENV_UPDT \
Wolfgang Denk78d620e2006-11-23 22:58:58 +0100217 "update=protect off FC000000 +${filesize};" \
218 "erase FC000000 +${filesize};" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200219 "cp.b 200000 FC000000 ${filesize};" \
Wolfgang Denk78d620e2006-11-23 22:58:58 +0100220 "protect on FC000000 +${filesize}\0"
221#endif
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200222
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200223#if defined(CONFIG_TQM5200)
Reinhard Thies6abaee42007-01-10 14:41:14 +0100224#define CUSTOM_ENV_SETTINGS \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200225 "hostname=tqm5200\0" \
Reinhard Thies6abaee42007-01-10 14:41:14 +0100226 "bootfile=/tftpboot/tqm5200/uImage\0" \
Bartlomiej Sieka8f8416f2007-06-08 14:52:22 +0200227 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
Reinhard Thies6abaee42007-01-10 14:41:14 +0100228 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200229#elif defined(CONFIG_CAM5200)
Wolfgang Denk1636d1c2007-06-22 23:59:00 +0200230#define CUSTOM_ENV_SETTINGS \
Reinhard Thies6abaee42007-01-10 14:41:14 +0100231 "bootfile=cam5200/uImage\0" \
232 "u-boot=cam5200/u-boot.bin\0" \
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200233 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
Reinhard Thies6abaee42007-01-10 14:41:14 +0100234#endif
235
Martin Krausea5cc5552008-03-19 14:25:14 +0100236#if defined(CONFIG_TQM5200_B)
237#define ENV_FLASH_LAYOUT \
238 "fdt_addr=FC100000\0" \
239 "kernel_addr=FC140000\0" \
240 "ramdisk_addr=FC600000\0"
Heiko Schocher5624d662010-12-17 10:11:27 +0100241#elif defined(CONFIG_CHARON)
242#define ENV_FLASH_LAYOUT \
243 "fdt_addr=FDFC0000\0" \
244 "kernel_addr=FC0A0000\0" \
245 "ramdisk_addr=FC200000\0"
Martin Krausea5cc5552008-03-19 14:25:14 +0100246#else /* !CONFIG_TQM5200_B */
247#define ENV_FLASH_LAYOUT \
248 "fdt_addr=FC0A0000\0" \
249 "kernel_addr=FC0C0000\0" \
250 "ramdisk_addr=FC300000\0"
251#endif
252
wdenk81050922004-07-11 20:04:51 +0000253#define CONFIG_EXTRA_ENV_SETTINGS \
wdenk56523f12004-07-11 17:40:54 +0000254 "netdev=eth0\0" \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200255 "console=ttyPSC0\0" \
Martin Krausea5cc5552008-03-19 14:25:14 +0100256 ENV_FLASH_LAYOUT \
Bartlomiej Siekad78791a2007-10-25 17:20:01 +0200257 "kernel_addr_r=400000\0" \
258 "fdt_addr_r=600000\0" \
wdenk89c02e22005-03-16 16:32:26 +0000259 "rootpath=/opt/eldk/ppc_6xx\0" \
260 "ramargs=setenv bootargs root=/dev/ram rw\0" \
wdenk56523f12004-07-11 17:40:54 +0000261 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100262 "nfsroot=${serverip}:${rootpath}\0" \
263 "addip=setenv bootargs ${bootargs} " \
264 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
265 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200266 "addcons=setenv bootargs ${bootargs} " \
Bartlomiej Sieka8f8416f2007-06-08 14:52:22 +0200267 "console=${console},${baudrate}\0" \
Heiko Schocher98e69562010-12-04 08:34:04 +0100268 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
269 "flash_self_old=sete console ttyS0; " \
270 "run ramargs addip addcons addmtd; " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100271 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200272 "flash_self=run ramargs addip addcons;" \
273 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
274 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100275 "bootm ${kernel_addr}\0" \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200276 "flash_nfs=run nfsargs addip addcons;" \
Bartlomiej Sieka8f8416f2007-06-08 14:52:22 +0200277 "bootm ${kernel_addr} - ${fdt_addr}\0" \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200278 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
279 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
280 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
281 "tftp ${fdt_addr_r} ${fdt_file}; " \
Heiko Schocher98e69562010-12-04 08:34:04 +0100282 "run nfsargs addip addcons addmtd; " \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200283 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
Reinhard Thies6abaee42007-01-10 14:41:14 +0100284 CUSTOM_ENV_SETTINGS \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200285 "load=tftp 200000 ${u-boot}\0" \
286 ENV_UPDT \
wdenk56523f12004-07-11 17:40:54 +0000287 ""
wdenk56523f12004-07-11 17:40:54 +0000288
289#define CONFIG_BOOTCOMMAND "run net_nfs"
290
291/*
292 * IPB Bus clocking configuration.
293 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200294#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenk56523f12004-07-11 17:40:54 +0000295
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200296#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
wdenk56523f12004-07-11 17:40:54 +0000297/*
298 * PCI Bus clocking configuration
299 *
300 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200301 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
Bartlomiej Siekac99512d2007-05-27 16:53:43 +0200302 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
wdenk56523f12004-07-11 17:40:54 +0000303 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
wdenk56523f12004-07-11 17:40:54 +0000305#endif
306
307/*
308 * I2C configuration
309 */
310#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
wdenk8f0b7cb2005-03-27 23:41:39 +0000311#ifdef CONFIG_TQM5200_REV100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
wdenk56523f12004-07-11 17:40:54 +0000313#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200314#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
wdenk56523f12004-07-11 17:40:54 +0000315#endif
316
317/*
318 * I2C clock frequency
319 *
320 * Please notice, that the resulting clock frequency could differ from the
321 * configured value. This is because the I2C clock is derived from system
Bin Menga1875592016-02-05 19:30:11 -0800322 * clock over a frequency divider with only a few divider values. U-Boot
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200323 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
wdenk56523f12004-07-11 17:40:54 +0000324 * approximation allways lies below the configured value, never above.
325 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200326#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
327#define CONFIG_SYS_I2C_SLAVE 0x7F
wdenk56523f12004-07-11 17:40:54 +0000328
329/*
330 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
331 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
332 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
333 * same configuration could be used.
334 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200335#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
336#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
337#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
338#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
wdenk56523f12004-07-11 17:40:54 +0000339
340/*
341 * HW-Monitor configuration on Mini-FAP
342 */
343#if defined (CONFIG_MINIFAP)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200344#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
wdenk56523f12004-07-11 17:40:54 +0000345#endif
346
347/* List of I2C addresses to be verified by POST */
wdenk56523f12004-07-11 17:40:54 +0000348#if defined (CONFIG_MINIFAP)
Peter Tyser60aaaa02010-10-22 00:20:30 -0500349#undef CONFIG_SYS_POST_I2C_ADDRS
350#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
351 CONFIG_SYS_I2C_HWMON_ADDR, \
352 CONFIG_SYS_I2C_SLAVE}
wdenk56523f12004-07-11 17:40:54 +0000353#endif
354
355/*
356 * Flash configuration
357 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200358#define CONFIG_SYS_FLASH_BASE 0xFC000000
wdenk56523f12004-07-11 17:40:54 +0000359
Marian Balakowiczd9384de2007-01-10 00:26:15 +0100360#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200361#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
Marian Balakowicz72997122006-10-03 20:28:38 +0200362 (= chip selects) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200363#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
364#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
365#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Marian Balakowicz72997122006-10-03 20:28:38 +0200366
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200367#define CONFIG_SYS_FLASH_ADDR0 0x555
368#define CONFIG_SYS_FLASH_ADDR1 0x2AA
369#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
370#define CONFIG_SYS_MAX_FLASH_SECT 128
Marian Balakowiczd9384de2007-01-10 00:26:15 +0100371#else
372/* use CFI flash driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200373#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200374#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
Wolfgang Denk085ecde2010-11-23 13:20:22 +0100375#define CONFIG_FLASH_CFI_MTD /* with MTD support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200376#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
377#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
Marian Balakowiczd9384de2007-01-10 00:26:15 +0100378 (= chip selects) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200379#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
Marian Balakowiczd9384de2007-01-10 00:26:15 +0100380#endif
Marian Balakowicz72997122006-10-03 20:28:38 +0200381
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200382#define CONFIG_SYS_FLASH_EMPTY_INFO
383#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
384#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
wdenk56523f12004-07-11 17:40:54 +0000385
Wolfgang Denk135ae002006-07-22 01:20:03 +0200386#if defined (CONFIG_CAM5200)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200387# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200388#elif defined(CONFIG_TQM5200_B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200390#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200391# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200392#endif
393
Wolfgang Denkd534f5c2005-08-23 22:27:41 +0200394/* Dynamic MTD partition support */
Stefan Roese68d7d652009-03-19 13:30:36 +0100395#define CONFIG_CMD_MTDPARTS
Stefan Roese942556a2009-05-12 14:32:58 +0200396#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Heiko Schocher259bff72010-12-17 10:11:20 +0100397#define MTDIDS_DEFAULT "nor0=fc000000.flash"
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200398
Heiko Schocher5624d662010-12-17 10:11:27 +0100399#if defined(CONFIG_STK52XX)
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200400# if defined(CONFIG_TQM5200_B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200401# if defined(CONFIG_SYS_LOWBOOT)
Heiko Schocher259bff72010-12-17 10:11:20 +0100402# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
Martin Krausea5cc5552008-03-19 14:25:14 +0100403 "256k(dtb)," \
404 "2304k(kernel)," \
405 "2560k(small-fs)," \
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200406 "2m(initrd)," \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200407 "8m(misc)," \
408 "16m(big-fs)"
409# else /* highboot */
Heiko Schocher259bff72010-12-17 10:11:20 +0100410# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200411 "3584k(small-fs)," \
412 "2m(initrd)," \
413 "8m(misc)," \
414 "15m(big-fs)," \
415 "1m(firmware)"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200416# endif /* CONFIG_SYS_LOWBOOT */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200417# else /* !CONFIG_TQM5200_B */
Heiko Schocher259bff72010-12-17 10:11:20 +0100418# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200419 "128k(dtb)," \
420 "2304k(kernel)," \
Wolfgang Denkd534f5c2005-08-23 22:27:41 +0200421 "2m(initrd)," \
422 "4m(small-fs)," \
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200423 "8m(misc)," \
Bartlomiej Siekae1f601b2007-09-13 16:33:59 +0200424 "15m(big-fs)"
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200425# endif /* CONFIG_TQM5200_B */
Wolfgang Denk135ae002006-07-22 01:20:03 +0200426#elif defined (CONFIG_CAM5200)
Heiko Schocher259bff72010-12-17 10:11:20 +0100427# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200428 "1792k(kernel)," \
Marian Balakowicz72997122006-10-03 20:28:38 +0200429 "5632k(rootfs)," \
430 "24m(home)"
Heiko Schocher5624d662010-12-17 10:11:27 +0100431#elif defined (CONFIG_CHARON)
432# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
433 "1408k(kernel)," \
434 "2m(initrd)," \
435 "4m(small-fs)," \
436 "24320k(big-fs)," \
437 "256k(dts)"
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200438#elif defined (CONFIG_FO300)
Heiko Schocher259bff72010-12-17 10:11:20 +0100439# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200440 "1408k(kernel)," \
441 "2m(initrd)," \
442 "4m(small-fs)," \
443 "8m(misc)," \
444 "16m(big-fs)"
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200445#else
446# error "Unknown Carrier Board"
447#endif /* CONFIG_STK52XX */
wdenk56523f12004-07-11 17:40:54 +0000448
449/*
450 * Environment settings
451 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200452#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200453#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
Wolfgang Denk78d620e2006-11-23 22:58:58 +0100454#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200455#define CONFIG_ENV_SECT_SIZE 0x40000
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200456#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200457#define CONFIG_ENV_SECT_SIZE 0x20000
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200458#endif /* CONFIG_TQM5200_B */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200459#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
460#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
wdenk56523f12004-07-11 17:40:54 +0000461
462/*
463 * Memory map
464 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200465#define CONFIG_SYS_MBAR 0xF0000000
466#define CONFIG_SYS_SDRAM_BASE 0x00000000
467#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenk56523f12004-07-11 17:40:54 +0000468
469/* Use ON-Chip SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200470#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
wdenk56523f12004-07-11 17:40:54 +0000471#ifdef CONFIG_POST
472/* preserve space for the post_word at end of on-chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200473#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
wdenk56523f12004-07-11 17:40:54 +0000474#else
Wolfgang Denk553f0982010-10-26 13:32:32 +0200475#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
wdenk56523f12004-07-11 17:40:54 +0000476#endif
477
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200478#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200479#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk56523f12004-07-11 17:40:54 +0000480
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200481#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200482#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
483# define CONFIG_SYS_RAMBOOT 1
wdenk56523f12004-07-11 17:40:54 +0000484#endif
485
Wolfgang Denk135ae002006-07-22 01:20:03 +0200486#if defined (CONFIG_CAM5200)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200487# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200488#elif defined(CONFIG_TQM5200_B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200489# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
Wolfgang Denk45a212c2006-07-19 17:52:30 +0200490#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200491# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200492#endif
493
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200494#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
495#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk56523f12004-07-11 17:40:54 +0000496
497/*
498 * Ethernet configuration
499 */
500#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800501#define CONFIG_MPC5xxx_FEC_MII100
wdenk56523f12004-07-11 17:40:54 +0000502/*
Ben Warren86321fc2009-02-05 23:58:25 -0800503 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
wdenk56523f12004-07-11 17:40:54 +0000504 */
Ben Warren86321fc2009-02-05 23:58:25 -0800505/* #define CONFIG_MPC5xxx_FEC_MII10 */
wdenk56523f12004-07-11 17:40:54 +0000506#define CONFIG_PHY_ADDR 0x00
507
508/*
509 * GPIO configuration
510 *
Marian Balakowicz72997122006-10-03 20:28:38 +0200511 * use CS1: Bit 0 (mask: 0x80000000):
512 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
wdenk56523f12004-07-11 17:40:54 +0000513 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
Marian Balakowicz72997122006-10-03 20:28:38 +0200514 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
515 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
516 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
517 * Use for REV200 STK52XX boards and FO300 boards. Do not use
518 * with REV100 modules (because, there I2C1 is used as I2C bus).
519 * use ATA: Bits 6-7 (mask 0x03000000):
520 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
521 * Use for CAM5200 board.
522 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
523 * use PSC6: Bits 9-11 (mask 0x00700000):
524 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
525 * UART, CODEC or IrDA.
526 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
527 * enable extended POST tests.
528 * Use for MINI-FAP and TQM5200_IB boards.
529 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
530 * Extended POST test is not available.
531 * Use for STK52xx, FO300 and CAM5200 boards.
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200532 * WARNING: When the extended POST is enabled, these bits will
533 * be overridden by this code as GPIOs!
Marian Balakowicz72997122006-10-03 20:28:38 +0200534 * use PCI_DIS: Bit 16 (mask 0x00008000):
535 * 1 -> disable PCI controller (on CAM5200 board).
536 * use USB: Bits 18-19 (mask 0x00003000):
537 * 10 -> two UARTs (on FO300 and CAM5200).
538 * use PSC3: Bits 20-23 (mask: 0x00000f00):
539 * 0000 -> All PSC3 pins are GPIOs.
540 * 1100 -> UART/SPI (on FO300 board).
541 * 0100 -> UART (on CAM5200 board).
542 * use PSC2: Bits 25:27 (mask: 0x00000030):
543 * 000 -> All PSC2 pins are GPIOs.
544 * 100 -> UART (on CAM5200 board).
545 * 001 -> CAN1/2 on PSC2 pins.
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200546 * Use for REV100 STK52xx boards
Marian Balakowicz72997122006-10-03 20:28:38 +0200547 * 01x -> Use AC97 (on FO300 board).
548 * use PSC1: Bits 29-31 (mask: 0x00000007):
549 * 100 -> UART (on all boards).
wdenk56523f12004-07-11 17:40:54 +0000550 */
Heiko Schocher98e69562010-12-04 08:34:04 +0100551#if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
wdenk56523f12004-07-11 17:40:54 +0000552#if defined (CONFIG_MINIFAP)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200553# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
wdenk7e6bf352004-12-12 22:06:17 +0000554#elif defined (CONFIG_STK52XX)
wdenk83e40ba2005-03-31 18:42:15 +0000555# if defined (CONFIG_STK52XX_REV100)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200556# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
wdenk83e40ba2005-03-31 18:42:15 +0000557# else /* STK52xx REV200 and above */
558# if defined (CONFIG_TQM5200_REV100)
559# error TQM5200 REV100 not supported on STK52XX REV200 or above
560# else/* TQM5200 REV200 and above */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200561# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
wdenk83e40ba2005-03-31 18:42:15 +0000562# endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000563# endif
Marian Balakowicz6d3bc9b2006-08-18 19:14:46 +0200564#elif defined (CONFIG_FO300)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200565# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
Marian Balakowicz72997122006-10-03 20:28:38 +0200566#elif defined (CONFIG_CAM5200)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200567# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
wdenk83e40ba2005-03-31 18:42:15 +0000568#else /* TMQ5200 Inbetriebnahme-Board */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200569# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
wdenk56523f12004-07-11 17:40:54 +0000570#endif
Heiko Schocher98e69562010-12-04 08:34:04 +0100571#endif
wdenk56523f12004-07-11 17:40:54 +0000572
573/*
574 * RTC configuration
575 */
Wolfgang Denk4f562f12005-08-18 11:51:12 +0200576#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
577# define CONFIG_RTC_M41T11 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200578# define CONFIG_SYS_I2C_RTC_ADDR 0x68
579# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
Wolfgang Denkedd0b502006-07-19 14:44:03 +0200580 year */
Wolfgang Denk4f562f12005-08-18 11:51:12 +0200581#else
582# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
583#endif
wdenk56523f12004-07-11 17:40:54 +0000584
585/*
586 * Miscellaneous configurable options
587 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200588#define CONFIG_SYS_LONGHELP /* undef to save memory */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200589
Wolfgang Denk2751a952006-10-28 02:29:14 +0200590#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Wolfgang Denk5078cce2006-07-21 11:16:34 +0200591
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200592#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger26946902007-07-04 22:30:50 -0500593#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200594#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger26946902007-07-04 22:30:50 -0500595#endif
596
597#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200598#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenk56523f12004-07-11 17:40:54 +0000599#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200600#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk56523f12004-07-11 17:40:54 +0000601#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200602#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
603#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
604#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk56523f12004-07-11 17:40:54 +0000605
606/* Enable an alternate, more extensive memory test */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200607#define CONFIG_SYS_ALT_MEMTEST
wdenk56523f12004-07-11 17:40:54 +0000608
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200609#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
610#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
wdenk56523f12004-07-11 17:40:54 +0000611
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200612#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
wdenk56523f12004-07-11 17:40:54 +0000613
wdenk56523f12004-07-11 17:40:54 +0000614/*
wdenk56523f12004-07-11 17:40:54 +0000615 * Various low-level settings
616 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200617#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
618#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenk56523f12004-07-11 17:40:54 +0000619
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200620#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
621#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
622#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
623#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
wdenk56523f12004-07-11 17:40:54 +0000624#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200625#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
wdenk56523f12004-07-11 17:40:54 +0000626#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200627#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
628#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenk56523f12004-07-11 17:40:54 +0000629
wdenk7e6bf352004-12-12 22:06:17 +0000630#define CONFIG_LAST_STAGE_INIT
wdenk7e6bf352004-12-12 22:06:17 +0000631
wdenk56523f12004-07-11 17:40:54 +0000632/*
633 * SRAM - Do not map below 2 GB in address space, because this area is used
634 * for SDRAM autosizing.
635 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200636#define CONFIG_SYS_CS2_START 0xE5000000
637#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
638#define CONFIG_SYS_CS2_CFG 0x0004D930
wdenk56523f12004-07-11 17:40:54 +0000639
640/*
641 * Grafic controller - Do not map below 2 GB in address space, because this
642 * area is used for SDRAM autosizing.
643 */
wdenk8f0b7cb2005-03-27 23:41:39 +0000644#define SM501_FB_BASE 0xE0000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200645#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
646#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
647#define CONFIG_SYS_CS1_CFG 0x8F48FF70
648#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
wdenk56523f12004-07-11 17:40:54 +0000649
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200650#define CONFIG_SYS_CS_BURST 0x00000000
651#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
wdenk56523f12004-07-11 17:40:54 +0000652
Marian Balakowicz72997122006-10-03 20:28:38 +0200653#if defined(CONFIG_CAM5200)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200654#define CONFIG_SYS_CS4_START 0xB0000000
655#define CONFIG_SYS_CS4_SIZE 0x00010000
656#define CONFIG_SYS_CS4_CFG 0x01019C10
Marian Balakowicz72997122006-10-03 20:28:38 +0200657
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200658#define CONFIG_SYS_CS5_START 0xD0000000
659#define CONFIG_SYS_CS5_SIZE 0x01208000
660#define CONFIG_SYS_CS5_CFG 0x1414BF10
Marian Balakowicz72997122006-10-03 20:28:38 +0200661#endif
662
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200663#define CONFIG_SYS_RESET_ADDRESS 0xff000000
wdenk56523f12004-07-11 17:40:54 +0000664
665/*-----------------------------------------------------------------------
666 * USB stuff
667 *-----------------------------------------------------------------------
668 */
669#define CONFIG_USB_CLOCK 0x0001BBBB
670#define CONFIG_USB_CONFIG 0x00001000
671
672/*-----------------------------------------------------------------------
673 * IDE/ATA stuff Supports IDE harddisk
674 *-----------------------------------------------------------------------
675 */
676
wdenk81050922004-07-11 20:04:51 +0000677#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
wdenk56523f12004-07-11 17:40:54 +0000678
wdenk81050922004-07-11 20:04:51 +0000679#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
680#undef CONFIG_IDE_LED /* LED for ide not supported */
wdenk56523f12004-07-11 17:40:54 +0000681
wdenk81050922004-07-11 20:04:51 +0000682#define CONFIG_IDE_RESET /* reset for ide supported */
wdenk56523f12004-07-11 17:40:54 +0000683#define CONFIG_IDE_PREINIT
684
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200685#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
686#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
wdenk56523f12004-07-11 17:40:54 +0000687
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200688#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
wdenk56523f12004-07-11 17:40:54 +0000689
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200690#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
wdenk56523f12004-07-11 17:40:54 +0000691
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200692/* Offset for data I/O */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200693#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
wdenk56523f12004-07-11 17:40:54 +0000694
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200695/* Offset for normal register accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200696#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
wdenk56523f12004-07-11 17:40:54 +0000697
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200698/* Offset for alternate registers */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200699#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
wdenk56523f12004-07-11 17:40:54 +0000700
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200701/* Interval between registers */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200702#define CONFIG_SYS_ATA_STRIDE 4
wdenk56523f12004-07-11 17:40:54 +0000703
Wolfgang Denk33af3e62008-10-01 12:34:58 +0200704/* Support ATAPI devices */
Detlev Zundel95c44ec2009-10-07 16:38:05 +0200705#define CONFIG_ATAPI 1
Wolfgang Denk33af3e62008-10-01 12:34:58 +0200706
Bartlomiej Sieka8f8416f2007-06-08 14:52:22 +0200707/*-----------------------------------------------------------------------
708 * Open firmware flat tree support
709 *-----------------------------------------------------------------------
710 */
Bartlomiej Sieka8f8416f2007-06-08 14:52:22 +0200711#define OF_CPU "PowerPC,5200@0"
712#define OF_SOC "soc5200@f0000000"
713#define OF_TBCLK (bd->bi_busfreq / 4)
714#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
715
wdenk56523f12004-07-11 17:40:54 +0000716#endif /* __CONFIG_H */