blob: 78362d24a281166842bbaeeac17f884409b8a520 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrick Delaunay873bf442020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard395f1292019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020013#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060014#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060015#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060016#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010017#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020018#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070019#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010020#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070021#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010022#include <led.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060023#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070024#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010025#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020026#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060027#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020028#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020029#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020030#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020031#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010032#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010033#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020034#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020035#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010036#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010037#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020038#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020039#include <jffs2/load_kernel.h>
Simon Glasscd93d622020-05-10 11:40:13 -060040#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060041#include <linux/delay.h>
Simon Glass61b29b82020-02-03 07:36:15 -070042#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020043#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020044#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010045#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010046
Patrick Delaunay03fb0382020-06-29 10:34:06 +020047#include "../../st/common/stusb160x.h"
48
Patrick Delaunay45459742019-02-27 17:01:24 +010049/* SYSCFG registers */
50#define SYSCFG_BOOTR 0x00
51#define SYSCFG_PMCSETR 0x04
52#define SYSCFG_IOCTRLSETR 0x18
53#define SYSCFG_ICNR 0x1C
54#define SYSCFG_CMPCR 0x20
55#define SYSCFG_CMPENSETR 0x24
56#define SYSCFG_PMCCLRR 0x44
57
58#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
59#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
60
61#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
62#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
63#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
64#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
65#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
66
67#define SYSCFG_CMPCR_SW_CTRL BIT(1)
68#define SYSCFG_CMPCR_READY BIT(8)
69
70#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
71
72#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
73#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
74
75#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
76
77#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020078#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
79#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
80#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010081
Patrick Delaunayf8598d92018-03-12 10:46:18 +010082/*
83 * Get a global data pointer
84 */
85DECLARE_GLOBAL_DATA_PTR;
86
Patrice Chotard28c064e2019-04-30 18:09:38 +020087#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010088#define USB_WARNING_LOW_THRESHOLD_UV 660000
89#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020090#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010091
Patrick Delaunayd1a4b092020-05-25 12:19:46 +020092int board_early_init_f(void)
93{
94 /* nothing to do, only used in SPL */
95 return 0;
96}
97
Patrick Delaunayd461f102019-02-12 11:44:41 +010098int checkboard(void)
99{
100 int ret;
101 char *mode;
102 u32 otp;
103 struct udevice *dev;
104 const char *fdt_compat;
105 int fdt_compat_len;
106
Patrick Delaunay43df0a12020-03-18 09:22:49 +0100107 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +0100108 mode = "trusted";
109 else
110 mode = "basic";
111
Patrick Delaunayd461f102019-02-12 11:44:41 +0100112 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
113 &fdt_compat_len);
Patrick Delaunay873bf442020-11-06 19:01:59 +0100114
115 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
116 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunayd461f102019-02-12 11:44:41 +0100117
Patrick Delaunay888dc682020-03-24 09:05:00 +0100118 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100119 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
120 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65e25be2020-12-28 20:34:56 -0700121 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100122 &dev);
123 if (!ret)
124 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
125 &otp, sizeof(otp));
126 if (ret > 0 && otp)
Patrick Delaunay873bf442020-11-06 19:01:59 +0100127 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
128 otp >> 16,
129 (otp >> 12) & 0xF,
130 (otp >> 4) & 0xF,
131 ((otp >> 8) & 0xF) - 1 + 'A',
132 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100133 }
134
135 return 0;
136}
137
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100138static void board_key_check(void)
139{
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100140 ofnode node;
141 struct gpio_desc gpio;
142 enum forced_boot_mode boot_mode = BOOT_NORMAL;
143
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200144 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
145 return;
146
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100147 node = ofnode_path("/config");
148 if (!ofnode_valid(node)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100149 log_debug("no /config node?\n");
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100150 return;
151 }
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200152 if (IS_ENABLED(CONFIG_FASTBOOT)) {
153 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
154 &gpio, GPIOD_IS_IN)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100155 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200156 } else {
157 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100158 log_notice("Fastboot key pressed, ");
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200159 boot_mode = BOOT_FASTBOOT;
160 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100161
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200162 dm_gpio_free(NULL, &gpio);
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100163 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100164 }
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200165 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
166 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
167 &gpio, GPIOD_IS_IN)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100168 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200169 } else {
170 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100171 log_notice("STM32Programmer key pressed, ");
Patrick Delaunay00bac2a2020-07-31 16:31:42 +0200172 boot_mode = BOOT_STM32PROG;
173 }
174 dm_gpio_free(NULL, &gpio);
175 }
176 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100177 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100178 log_notice("entering download mode...\n");
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100179 clrsetbits_le32(TAMP_BOOT_CONTEXT,
180 TAMP_BOOT_FORCED_MASK,
181 boot_mode);
182 }
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100183}
184
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100185int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200186{
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100187 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200188 int ret;
189
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200190 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
191 return -ENODEV;
192
Patrick Delaunay03fb0382020-06-29 10:34:06 +0200193 /* if typec stusb160x is present, means DK1 or DK2 board */
194 ret = stusb160x_cable_connected();
195 if (ret >= 0)
196 return ret;
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100197
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100198 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65e25be2020-12-28 20:34:56 -0700199 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100200 &dwc2_udc_otg);
Patrick Delaunay873bf442020-11-06 19:01:59 +0100201 if (ret) {
202 log_debug("dwc2_udc_otg init failed\n");
203 return ret;
204 }
Patrice Chotard4c834b92018-08-10 17:12:14 +0200205
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100206 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200207}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200208
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200209#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200210#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
211#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
212
213int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
214{
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200215 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
216 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200217 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200218 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
219 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200220 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
221 &dev->idProduct);
222 else
223 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
224
225 return 0;
226}
Patrick Delaunay6a8713b2020-07-31 16:31:43 +0200227#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200228
Patrice Chotard395f1292019-02-12 16:50:40 +0100229static int get_led(struct udevice **dev, char *led_string)
230{
231 char *led_name;
232 int ret;
233
234 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
235 if (!led_name) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100236 log_debug("could not find %s config string\n", led_string);
Patrice Chotard395f1292019-02-12 16:50:40 +0100237 return -ENOENT;
238 }
239 ret = led_get_by_label(led_name, dev);
240 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100241 log_debug("get=%d\n", ret);
Patrice Chotard395f1292019-02-12 16:50:40 +0100242 return ret;
243 }
244
245 return 0;
246}
247
248static int setup_led(enum led_state_t cmd)
249{
250 struct udevice *dev;
251 int ret;
252
Patrick Delaunay0c952952020-04-22 14:29:12 +0200253 if (!CONFIG_IS_ENABLED(LED))
254 return 0;
255
Patrice Chotard395f1292019-02-12 16:50:40 +0100256 ret = get_led(&dev, "u-boot,boot-led");
257 if (ret)
258 return ret;
259
260 ret = led_set_state(dev, cmd);
261 return ret;
262}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200263
264static void __maybe_unused led_error_blink(u32 nb_blink)
265{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200266 int ret;
267 struct udevice *led;
268 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200269
270 if (!nb_blink)
271 return;
272
Patrick Delaunay0c952952020-04-22 14:29:12 +0200273 if (CONFIG_IS_ENABLED(LED)) {
274 ret = get_led(&led, "u-boot,error-led");
275 if (!ret) {
276 /* make u-boot,error-led blinking */
277 /* if U32_MAX and 125ms interval, for 17.02 years */
278 for (i = 0; i < 2 * nb_blink; i++) {
279 led_set_state(led, LEDST_TOGGLE);
280 mdelay(125);
281 WATCHDOG_RESET();
282 }
283 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200284 }
285 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200286
287 /* infinite: the boot process must be stopped */
288 if (nb_blink == U32_MAX)
289 hang();
290}
Patrice Chotard395f1292019-02-12 16:50:40 +0100291
Patrice Chotard42082bc2020-10-16 09:28:59 +0200292static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100293{
294 struct ofnode_phandle_args adc_args;
295 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100296 unsigned int raw;
Patrice Chotard42082bc2020-10-16 09:28:59 +0200297 int ret, uV;
298 int i;
Patrice Chotard395f1292019-02-12 16:50:40 +0100299
300 for (i = 0; i < adc_count; i++) {
301 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
302 "#io-channel-cells", 0, i,
303 &adc_args)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100304 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100305 return 0;
306 }
307
308 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
309 &adc);
310
311 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100312 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard395f1292019-02-12 16:50:40 +0100313 return ret;
314 }
315
316 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
317 &raw);
318 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100319 log_err("single shot failed for %s[%d]!\n",
320 adc->name, adc_args.args[0]);
Patrice Chotard395f1292019-02-12 16:50:40 +0100321 return ret;
322 }
323 /* Convert to uV */
324 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard42082bc2020-10-16 09:28:59 +0200325 if (uV > *max_uV)
326 *max_uV = uV;
327 if (uV < *min_uV)
328 *min_uV = uV;
Patrick Delaunay873bf442020-11-06 19:01:59 +0100329 log_debug("%s[%02d] = %u, %d uV\n",
330 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard395f1292019-02-12 16:50:40 +0100331 } else {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100332 log_err("Can't get uV value for %s[%d]\n",
333 adc->name, adc_args.args[0]);
Patrice Chotard395f1292019-02-12 16:50:40 +0100334 }
335 }
336
Patrice Chotard42082bc2020-10-16 09:28:59 +0200337 return 0;
338}
339
340static int board_check_usb_power(void)
341{
342 ofnode node;
343 int max_uV = 0;
344 int min_uV = USB_START_HIGH_THRESHOLD_UV;
345 int adc_count, ret;
346 u32 nb_blink;
347 u8 i;
348
349 node = ofnode_path("/config");
350 if (!ofnode_valid(node)) {
351 log_debug("no /config node?\n");
352 return -ENOENT;
353 }
354
Patrice Chotard395f1292019-02-12 16:50:40 +0100355 /*
Patrice Chotard42082bc2020-10-16 09:28:59 +0200356 * Retrieve the ADC channels devices and get measurement
357 * for each of them
Patrice Chotard395f1292019-02-12 16:50:40 +0100358 */
Patrice Chotard42082bc2020-10-16 09:28:59 +0200359 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
360 "#io-channel-cells", 0);
361 if (adc_count < 0) {
362 if (adc_count == -ENOENT)
363 return 0;
364
365 log_err("Can't find adc channel (%d)\n", adc_count);
366
367 return adc_count;
368 }
369
370 /* perform maximum of 2 ADC measurements to detect power supply current */
371 for (i = 0; i < 2; i++) {
372 if (IS_ENABLED(CONFIG_ADC))
373 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
374 else
375 ret = -ENODEV;
376
377 if (ret)
378 return ret;
379
380 /*
381 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
382 * board is plugged on an USB-C 3A power supply and boot process can
383 * continue.
384 */
385 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
386 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
387 min_uV <= USB_LOW_THRESHOLD_UV)
388 return 0;
389
390 if (i == 0) {
391 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
392 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
393 }
394 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100395
Patrick Delaunay873bf442020-11-06 19:01:59 +0100396 log_notice("****************************************************\n");
Patrice Chotard28c064e2019-04-30 18:09:38 +0200397 /*
398 * If highest and lowest value are either both below
399 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
400 * means USB TYPE-C is in unattached mode, this is an issue, make
401 * u-boot,error-led blinking and stop boot process.
402 */
403 if ((max_uV > USB_LOW_THRESHOLD_UV &&
404 min_uV > USB_LOW_THRESHOLD_UV) ||
405 (max_uV <= USB_LOW_THRESHOLD_UV &&
406 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100407 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
408 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotard28c064e2019-04-30 18:09:38 +0200409 /* with 125ms interval, led will blink for 17.02 years ....*/
410 nb_blink = U32_MAX;
411 }
412
413 if (max_uV > USB_LOW_THRESHOLD_UV &&
414 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
415 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100416 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100417 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200418 }
419
420 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
421 max_uV <= USB_START_LOW_THRESHOLD_UV &&
422 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100423 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100424 nb_blink = 3;
425 }
426
Patrice Chotard28c064e2019-04-30 18:09:38 +0200427 /*
428 * If highest value is above 2.15 Volts that means that the USB TypeC
429 * supplies more than 3 Amp, this is not compliant with TypeC specification
430 */
431 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100432 log_notice("* USB TYPE-C charger not compliant with *\n");
433 log_notice("* specification *\n");
434 log_notice("****************************************************\n\n");
Patrice Chotard28c064e2019-04-30 18:09:38 +0200435 /* with 125ms interval, led will blink for 17.02 years ....*/
436 nb_blink = U32_MAX;
437 } else {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100438 log_notice("* Current too low, use a 3A power supply! *\n");
439 log_notice("****************************************************\n\n");
Patrice Chotard28c064e2019-04-30 18:09:38 +0200440 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100441
Patrick Delaunaydd281082019-07-30 19:16:39 +0200442 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100443
444 return 0;
445}
446
Patrick Delaunay45459742019-02-27 17:01:24 +0100447static void sysconf_init(void)
448{
Patrick Delaunay45459742019-02-27 17:01:24 +0100449 u8 *syscfg;
Patrick Delaunay45459742019-02-27 17:01:24 +0100450 struct udevice *pwr_dev;
451 struct udevice *pwr_reg;
452 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100453 u32 otp = 0;
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200454 int ret;
455 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100456
457 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
458
459 /* interconnect update : select master using the port 1 */
460 /* LTDC = AXI_M9 */
461 /* GPU = AXI_M8 */
462 /* today information is hardcoded in U-Boot */
463 writel(BIT(9), syscfg + SYSCFG_ICNR);
464
465 /* disable Pull-Down for boot pin connected to VDD */
466 bootr = readl(syscfg + SYSCFG_BOOTR);
467 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
468 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
469 writel(bootr, syscfg + SYSCFG_BOOTR);
470
Patrick Delaunay45459742019-02-27 17:01:24 +0100471 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
472 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
473 * The customer will have to disable this for low frequencies
474 * or if AFMUX is selected but the function not used, typically for
475 * TRACE. Otherwise, impact on power consumption.
476 *
477 * WARNING:
478 * enabling High Speed mode while VDD>2.7V
479 * with the OTP product_below_2v5 (OTP 18, BIT 13)
480 * erroneously set to 1 can damage the IC!
481 * => U-Boot set the register only if VDD < 2.7V (in DT)
482 * but this value need to be consistent with board design
483 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200484 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65e25be2020-12-28 20:34:56 -0700485 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200486 &pwr_dev);
Patrick Delaunay3434bbe2020-07-31 16:31:45 +0200487 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay45459742019-02-27 17:01:24 +0100488 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65e25be2020-12-28 20:34:56 -0700489 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay45459742019-02-27 17:01:24 +0100490 &dev);
491 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100492 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay45459742019-02-27 17:01:24 +0100493 return;
494 }
495
496 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200497 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100498 otp = otp & BIT(13);
499
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200500 /* get VDD = vdd-supply */
501 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100502 &pwr_reg);
503
504 /* check if VDD is Low Voltage */
505 if (!ret) {
506 if (regulator_get_value(pwr_reg) < 2700000) {
507 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
508 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
509 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
510 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
511 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
512 syscfg + SYSCFG_IOCTRLSETR);
513
514 if (!otp)
Patrick Delaunay873bf442020-11-06 19:01:59 +0100515 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay45459742019-02-27 17:01:24 +0100516 } else {
517 if (otp)
Patrick Delaunay873bf442020-11-06 19:01:59 +0100518 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay45459742019-02-27 17:01:24 +0100519 }
520 } else {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100521 log_debug("VDD unknown");
Patrick Delaunay45459742019-02-27 17:01:24 +0100522 }
523 }
Patrick Delaunay45459742019-02-27 17:01:24 +0100524
525 /* activate automatic I/O compensation
526 * warning: need to ensure CSI enabled and ready in clock driver
527 */
528 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
529
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200530 /* poll until ready (1s timeout) */
531 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
532 val & SYSCFG_CMPCR_READY,
533 1000000);
534 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100535 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200536 led_error_blink(10);
537 }
538
Patrick Delaunay45459742019-02-27 17:01:24 +0100539 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay45459742019-02-27 17:01:24 +0100540}
541
Patrick Delaunayd573e462019-07-30 19:16:38 +0200542/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
543static int dk2_i2c1_fix(void)
544{
545 ofnode node;
546 struct gpio_desc hdmi, audio;
547 int ret = 0;
548
Patrick Delaunaye817c8e2020-07-31 16:31:47 +0200549 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
550 return -ENODEV;
551
Patrick Delaunayd573e462019-07-30 19:16:38 +0200552 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
553 if (!ofnode_valid(node)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100554 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200555 return -ENOENT;
556 }
557
558 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
559 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100560 log_debug("could not find reset-gpios\n");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200561 return -ENOENT;
562 }
563
564 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
565 if (!ofnode_valid(node)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100566 log_debug("no cs42l51@4a ?\n");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200567 return -ENOENT;
568 }
569
570 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
571 &audio, GPIOD_IS_OUT)) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100572 log_debug("could not find reset-gpios\n");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200573 return -ENOENT;
574 }
575
576 /* before power up, insure that HDMI and AUDIO IC is under reset */
577 ret = dm_gpio_set_value(&hdmi, 1);
578 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100579 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200580 goto error;
581 }
582 ret = dm_gpio_set_value(&audio, 1);
583 if (ret) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100584 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunayd573e462019-07-30 19:16:38 +0200585 goto error;
586 }
587
588 /* power-up audio IC */
589 regulator_autoset_by_name("v1v8_audio", NULL);
590
591 /* power-up HDMI IC */
592 regulator_autoset_by_name("v1v2_hdmi", NULL);
593 regulator_autoset_by_name("v3v3_hdmi", NULL);
594
595error:
596 return ret;
597}
598
599static bool board_is_dk2(void)
600{
Patrick Delaunay84625482020-01-13 15:17:42 +0100601 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200602 of_machine_is_compatible("st,stm32mp157c-dk2"))
603 return true;
604
605 return false;
606}
Patrick Delaunayd573e462019-07-30 19:16:38 +0200607
Patrick Delaunay055065a2020-04-22 14:29:13 +0200608static bool board_is_ev1(void)
609{
610 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
611 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
612 of_machine_is_compatible("st,stm32mp157c-ev1") ||
613 of_machine_is_compatible("st,stm32mp157d-ev1") ||
614 of_machine_is_compatible("st,stm32mp157f-ev1")))
615 return true;
616
617 return false;
618}
619
620/* touchscreen driver: only used for pincontrol configuration */
621static const struct udevice_id goodix_ids[] = {
622 { .compatible = "goodix,gt9147", },
623 { }
624};
625
626U_BOOT_DRIVER(goodix) = {
627 .name = "goodix",
628 .id = UCLASS_NOP,
629 .of_match = goodix_ids,
630};
631
632static void board_ev1_init(void)
633{
634 struct udevice *dev;
635
636 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65e25be2020-12-28 20:34:56 -0700637 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay055065a2020-04-22 14:29:13 +0200638}
639
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100640/* board dependent setup after realloc */
641int board_init(void)
642{
643 /* address of boot parameters */
644 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
645
Patrick Delaunay29e4ce32020-06-04 14:30:24 +0200646 if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
647 gpio_hog_probe_all();
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100648
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100649 board_key_check();
650
Patrick Delaunay055065a2020-04-22 14:29:13 +0200651 if (board_is_ev1())
652 board_ev1_init();
653
Patrick Delaunayd573e462019-07-30 19:16:38 +0200654 if (board_is_dk2())
655 dk2_i2c1_fix();
656
Patrick Delaunaye817c8e2020-07-31 16:31:47 +0200657 if (IS_ENABLED(CONFIG_DM_REGULATOR))
658 regulators_enable_boot_on(_DEBUG);
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200659
Patrick Delaunay3434bbe2020-07-31 16:31:45 +0200660 if (!IS_ENABLED(CONFIG_TFABOOT))
661 sysconf_init();
Patrick Delaunay45459742019-02-27 17:01:24 +0100662
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200663 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200664 led_default_state();
665
Patrick Delaunay0c952952020-04-22 14:29:12 +0200666 setup_led(LEDST_ON);
667
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100668 return 0;
669}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100670
671int board_late_init(void)
672{
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100673 const void *fdt_compat;
674 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200675 int ret;
676 u32 otp;
677 struct udevice *dev;
678 char buf[10];
Patrick Delaunay72b09982020-07-31 16:31:48 +0200679 char dtb_name[256];
680 int buf_len;
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100681
Patrick Delaunay72b09982020-07-31 16:31:48 +0200682 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
683 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
684 &fdt_compat_len);
685 if (fdt_compat && fdt_compat_len) {
686 if (strncmp(fdt_compat, "st,", 3) != 0) {
687 env_set("board_name", fdt_compat);
688 } else {
689 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200690
Patrick Delaunay72b09982020-07-31 16:31:48 +0200691 buf_len = sizeof(dtb_name);
692 strncpy(dtb_name, fdt_compat + 3, buf_len);
693 buf_len -= strlen(fdt_compat + 3);
694 strncat(dtb_name, ".dtb", buf_len);
695 env_set("fdtfile", dtb_name);
696 }
697 }
698 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65e25be2020-12-28 20:34:56 -0700699 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay72b09982020-07-31 16:31:48 +0200700 &dev);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200701
Patrick Delaunay72b09982020-07-31 16:31:48 +0200702 if (!ret)
703 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
704 &otp, sizeof(otp));
705 if (ret > 0 && otp) {
706 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
707 env_set("board_id", buf);
708
709 snprintf(buf, sizeof(buf), "0x%04x",
710 ((otp >> 8) & 0xF) - 1 + 0xA);
711 env_set("board_rev", buf);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200712 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100713 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100714
Patrice Chotard395f1292019-02-12 16:50:40 +0100715 /* for DK1/DK2 boards */
716 board_check_usb_power();
717
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100718 return 0;
719}
Patrice Chotard395f1292019-02-12 16:50:40 +0100720
721void board_quiesce_devices(void)
722{
723 setup_led(LEDST_OFF);
724}
Patrice Chotard87471642019-05-02 18:07:14 +0200725
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200726/* eth init function : weak called in eqos driver */
727int board_interface_eth_init(struct udevice *dev,
728 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200729{
730 u8 *syscfg;
731 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200732 bool eth_clk_sel_reg = false;
733 bool eth_ref_clk_sel_reg = false;
734
735 /* Gigabit Ethernet 125MHz clock selection. */
736 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
737
738 /* Ethernet 50Mhz RMII clock selection */
739 eth_ref_clk_sel_reg =
740 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200741
742 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
743
744 if (!syscfg)
745 return -ENODEV;
746
747 switch (interface_type) {
748 case PHY_INTERFACE_MODE_MII:
749 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
750 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunay873bf442020-11-06 19:01:59 +0100751 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullieredacf262019-05-17 15:08:43 +0200752 break;
753 case PHY_INTERFACE_MODE_GMII:
754 if (eth_clk_sel_reg)
755 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
756 SYSCFG_PMCSETR_ETH_CLK_SEL;
757 else
758 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunay873bf442020-11-06 19:01:59 +0100759 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullieredacf262019-05-17 15:08:43 +0200760 break;
761 case PHY_INTERFACE_MODE_RMII:
762 if (eth_ref_clk_sel_reg)
763 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
764 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
765 else
766 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunay873bf442020-11-06 19:01:59 +0100767 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullieredacf262019-05-17 15:08:43 +0200768 break;
769 case PHY_INTERFACE_MODE_RGMII:
770 case PHY_INTERFACE_MODE_RGMII_ID:
771 case PHY_INTERFACE_MODE_RGMII_RXID:
772 case PHY_INTERFACE_MODE_RGMII_TXID:
773 if (eth_clk_sel_reg)
774 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
775 SYSCFG_PMCSETR_ETH_CLK_SEL;
776 else
777 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunay873bf442020-11-06 19:01:59 +0100778 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullieredacf262019-05-17 15:08:43 +0200779 break;
780 default:
Patrick Delaunay873bf442020-11-06 19:01:59 +0100781 log_debug("Do not manage %d interface\n",
782 interface_type);
Christophe Roullieredacf262019-05-17 15:08:43 +0200783 /* Do not manage others interfaces */
784 return -EINVAL;
785 }
786
787 /* clear and set ETH configuration bits */
788 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
789 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
790 syscfg + SYSCFG_PMCCLRR);
791 writel(value, syscfg + SYSCFG_PMCSETR);
792
793 return 0;
794}
795
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200796enum env_location env_get_location(enum env_operation op, int prio)
797{
798 u32 bootmode = get_bootmode();
799
800 if (prio)
801 return ENVL_UNKNOWN;
802
803 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200804 case BOOT_FLASH_SD:
805 case BOOT_FLASH_EMMC:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200806 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
807 return ENVL_MMC;
808 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
809 return ENVL_EXT4;
810 else
811 return ENVL_NOWHERE;
812
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200813 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100814 case BOOT_FLASH_SPINAND:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200815 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
816 return ENVL_UBI;
817 else
818 return ENVL_NOWHERE;
819
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200820 case BOOT_FLASH_NOR:
Patrick Delaunayebfd5922020-07-31 16:31:49 +0200821 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
822 return ENVL_SPI_FLASH;
823 else
824 return ENVL_NOWHERE;
825
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200826 default:
827 return ENVL_NOWHERE;
828 }
829}
830
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200831const char *env_ext4_get_intf(void)
832{
833 u32 bootmode = get_bootmode();
834
835 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
836 case BOOT_FLASH_SD:
837 case BOOT_FLASH_EMMC:
838 return "mmc";
839 default:
840 return "";
841 }
842}
843
844const char *env_ext4_get_dev_part(void)
845{
Manuel Reis81d4c4e2020-11-25 10:16:20 +0000846 static char *const env_dev_part =
847#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
848 CONFIG_ENV_EXT4_DEVICE_AND_PART;
849#else
850 "";
851#endif
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200852 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reis81d4c4e2020-11-25 10:16:20 +0000853
854 if (strlen(env_dev_part) > 0)
855 return env_dev_part;
856
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200857 u32 bootmode = get_bootmode();
858
859 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
860}
Manuel Reis81d4c4e2020-11-25 10:16:20 +0000861
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200862int mmc_get_env_dev(void)
863{
864 u32 bootmode = get_bootmode();
865
866 return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
867}
Patrick Delaunaya9addca2020-06-15 11:18:22 +0200868
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200869#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900870int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200871{
Patrick Delaunayd0a3c4f2020-07-29 13:24:52 +0200872 static const struct node_info nodes[] = {
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200873 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100874 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200875 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello300669a2020-07-31 09:53:42 +0200876 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200877 };
Patrick Delaunay29e5c022020-10-15 14:52:30 +0200878 char *boot_device;
Patrick Delaunay06f624f2020-07-31 16:31:50 +0200879
Patrick Delaunay29e5c022020-10-15 14:52:30 +0200880 /* Check the boot-source and don't update MTD for serial or usb boot */
881 boot_device = env_get("boot_device");
882 if (!boot_device ||
883 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
884 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
885 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200886
887 return 0;
888}
889#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200890
891static void board_copro_image_process(ulong fw_image, size_t fw_size)
892{
893 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
894
895 if (!rproc_is_initialized())
896 if (rproc_init()) {
Patrick Delaunay873bf442020-11-06 19:01:59 +0100897 log_err("Remote Processor %d initialization failed\n",
898 id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200899 return;
900 }
901
902 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunay873bf442020-11-06 19:01:59 +0100903 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
904 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200905
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100906 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200907 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200908}
909
910U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);