blob: 57a649e97e306c06567e2e2fbcd554f9dd531607 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020010#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060011#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010019#include <led.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060020#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070021#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010022#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020023#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060024#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020025#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020026#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020027#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020028#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010029#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010030#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020031#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020032#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010033#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010034#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020035#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020036#include <jffs2/load_kernel.h>
Simon Glasscd93d622020-05-10 11:40:13 -060037#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060038#include <linux/delay.h>
Simon Glass61b29b82020-02-03 07:36:15 -070039#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020040#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020041#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010042#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010043
Patrick Delaunay03fb0382020-06-29 10:34:06 +020044#include "../../st/common/stusb160x.h"
45
Patrick Delaunay45459742019-02-27 17:01:24 +010046/* SYSCFG registers */
47#define SYSCFG_BOOTR 0x00
48#define SYSCFG_PMCSETR 0x04
49#define SYSCFG_IOCTRLSETR 0x18
50#define SYSCFG_ICNR 0x1C
51#define SYSCFG_CMPCR 0x20
52#define SYSCFG_CMPENSETR 0x24
53#define SYSCFG_PMCCLRR 0x44
54
55#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
56#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
57
58#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
59#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
60#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
61#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
62#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
63
64#define SYSCFG_CMPCR_SW_CTRL BIT(1)
65#define SYSCFG_CMPCR_READY BIT(8)
66
67#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
68
69#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
70#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
71
72#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
73
74#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020075#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
76#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
77#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010078
Patrick Delaunayf8598d92018-03-12 10:46:18 +010079/*
80 * Get a global data pointer
81 */
82DECLARE_GLOBAL_DATA_PTR;
83
Patrice Chotard28c064e2019-04-30 18:09:38 +020084#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010085#define USB_WARNING_LOW_THRESHOLD_UV 660000
86#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020087#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010088
Patrick Delaunayd1a4b092020-05-25 12:19:46 +020089int board_early_init_f(void)
90{
91 /* nothing to do, only used in SPL */
92 return 0;
93}
94
Patrick Delaunayd461f102019-02-12 11:44:41 +010095int checkboard(void)
96{
97 int ret;
98 char *mode;
99 u32 otp;
100 struct udevice *dev;
101 const char *fdt_compat;
102 int fdt_compat_len;
103
Patrick Delaunay43df0a12020-03-18 09:22:49 +0100104 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +0100105 mode = "trusted";
106 else
107 mode = "basic";
108
109 printf("Board: stm32mp1 in %s mode", mode);
110 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
111 &fdt_compat_len);
112 if (fdt_compat && fdt_compat_len)
113 printf(" (%s)", fdt_compat);
114 puts("\n");
115
Patrick Delaunay888dc682020-03-24 09:05:00 +0100116 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100117 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
118 ret = uclass_get_device_by_driver(UCLASS_MISC,
119 DM_GET_DRIVER(stm32mp_bsec),
120 &dev);
121 if (!ret)
122 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
123 &otp, sizeof(otp));
124 if (ret > 0 && otp)
125 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
126 otp >> 16,
127 (otp >> 12) & 0xF,
128 (otp >> 4) & 0xF,
129 ((otp >> 8) & 0xF) - 1 + 'A',
130 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100131 }
132
133 return 0;
134}
135
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100136static void board_key_check(void)
137{
138#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
139 ofnode node;
140 struct gpio_desc gpio;
141 enum forced_boot_mode boot_mode = BOOT_NORMAL;
142
143 node = ofnode_path("/config");
144 if (!ofnode_valid(node)) {
145 debug("%s: no /config node?\n", __func__);
146 return;
147 }
148#ifdef CONFIG_FASTBOOT
149 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
150 &gpio, GPIOD_IS_IN)) {
151 debug("%s: could not find a /config/st,fastboot-gpios\n",
152 __func__);
153 } else {
154 if (dm_gpio_get_value(&gpio)) {
155 puts("Fastboot key pressed, ");
156 boot_mode = BOOT_FASTBOOT;
157 }
158
159 dm_gpio_free(NULL, &gpio);
160 }
161#endif
162#ifdef CONFIG_CMD_STM32PROG
163 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
164 &gpio, GPIOD_IS_IN)) {
165 debug("%s: could not find a /config/st,stm32prog-gpios\n",
166 __func__);
167 } else {
168 if (dm_gpio_get_value(&gpio)) {
169 puts("STM32Programmer key pressed, ");
170 boot_mode = BOOT_STM32PROG;
171 }
172 dm_gpio_free(NULL, &gpio);
173 }
174#endif
175
176 if (boot_mode != BOOT_NORMAL) {
177 puts("entering download mode...\n");
178 clrsetbits_le32(TAMP_BOOT_CONTEXT,
179 TAMP_BOOT_FORCED_MASK,
180 boot_mode);
181 }
182#endif
183}
184
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100185#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100186#include <usb/dwc2_udc.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100187int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200188{
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100189 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200190 int ret;
191
Patrick Delaunay03fb0382020-06-29 10:34:06 +0200192 /* if typec stusb160x is present, means DK1 or DK2 board */
193 ret = stusb160x_cable_connected();
194 if (ret >= 0)
195 return ret;
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100196
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100197 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
198 DM_GET_DRIVER(dwc2_udc_otg),
199 &dwc2_udc_otg);
200 if (!ret)
201 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200202
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100203 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200204}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200205
206#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
207#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
208
209int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
210{
211 if (!strcmp(name, "usb_dnl_dfu"))
212 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
213 else if (!strcmp(name, "usb_dnl_fastboot"))
214 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
215 &dev->idProduct);
216 else
217 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
218
219 return 0;
220}
221
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100222#endif /* CONFIG_USB_GADGET */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200223
Patrice Chotard395f1292019-02-12 16:50:40 +0100224static int get_led(struct udevice **dev, char *led_string)
225{
226 char *led_name;
227 int ret;
228
229 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
230 if (!led_name) {
231 pr_debug("%s: could not find %s config string\n",
232 __func__, led_string);
233 return -ENOENT;
234 }
235 ret = led_get_by_label(led_name, dev);
236 if (ret) {
237 debug("%s: get=%d\n", __func__, ret);
238 return ret;
239 }
240
241 return 0;
242}
243
244static int setup_led(enum led_state_t cmd)
245{
246 struct udevice *dev;
247 int ret;
248
Patrick Delaunay0c952952020-04-22 14:29:12 +0200249 if (!CONFIG_IS_ENABLED(LED))
250 return 0;
251
Patrice Chotard395f1292019-02-12 16:50:40 +0100252 ret = get_led(&dev, "u-boot,boot-led");
253 if (ret)
254 return ret;
255
256 ret = led_set_state(dev, cmd);
257 return ret;
258}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200259
260static void __maybe_unused led_error_blink(u32 nb_blink)
261{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200262 int ret;
263 struct udevice *led;
264 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200265
266 if (!nb_blink)
267 return;
268
Patrick Delaunay0c952952020-04-22 14:29:12 +0200269 if (CONFIG_IS_ENABLED(LED)) {
270 ret = get_led(&led, "u-boot,error-led");
271 if (!ret) {
272 /* make u-boot,error-led blinking */
273 /* if U32_MAX and 125ms interval, for 17.02 years */
274 for (i = 0; i < 2 * nb_blink; i++) {
275 led_set_state(led, LEDST_TOGGLE);
276 mdelay(125);
277 WATCHDOG_RESET();
278 }
279 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200280 }
281 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200282
283 /* infinite: the boot process must be stopped */
284 if (nb_blink == U32_MAX)
285 hang();
286}
Patrice Chotard395f1292019-02-12 16:50:40 +0100287
Patrick Delaunay41542472019-07-30 19:16:43 +0200288#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100289static int board_check_usb_power(void)
290{
291 struct ofnode_phandle_args adc_args;
292 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100293 ofnode node;
294 unsigned int raw;
295 int max_uV = 0;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200296 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100297 int ret, uV, adc_count;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200298 u32 nb_blink;
299 u8 i;
Patrice Chotard395f1292019-02-12 16:50:40 +0100300 node = ofnode_path("/config");
301 if (!ofnode_valid(node)) {
302 debug("%s: no /config node?\n", __func__);
303 return -ENOENT;
304 }
305
306 /*
307 * Retrieve the ADC channels devices and get measurement
308 * for each of them
309 */
310 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
311 "#io-channel-cells");
312 if (adc_count < 0) {
313 if (adc_count == -ENOENT)
314 return 0;
315
316 pr_err("%s: can't find adc channel (%d)\n", __func__,
317 adc_count);
318
319 return adc_count;
320 }
321
322 for (i = 0; i < adc_count; i++) {
323 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
324 "#io-channel-cells", 0, i,
325 &adc_args)) {
326 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
327 __func__);
328 return 0;
329 }
330
331 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
332 &adc);
333
334 if (ret) {
335 pr_err("%s: Can't get adc device(%d)\n", __func__,
336 ret);
337 return ret;
338 }
339
340 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
341 &raw);
342 if (ret) {
343 pr_err("%s: single shot failed for %s[%d]!\n",
344 __func__, adc->name, adc_args.args[0]);
345 return ret;
346 }
347 /* Convert to uV */
348 if (!adc_raw_to_uV(adc, raw, &uV)) {
349 if (uV > max_uV)
350 max_uV = uV;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200351 if (uV < min_uV)
352 min_uV = uV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100353 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
354 adc->name, adc_args.args[0], raw, uV);
355 } else {
356 pr_err("%s: Can't get uV value for %s[%d]\n",
357 __func__, adc->name, adc_args.args[0]);
358 }
359 }
360
361 /*
362 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
363 * board is plugged on an USB-C 3A power supply and boot process can
364 * continue.
365 */
366 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotard28c064e2019-04-30 18:09:38 +0200367 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
368 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100369 return 0;
370
Patrice Chotard28c064e2019-04-30 18:09:38 +0200371 pr_err("****************************************************\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100372
Patrice Chotard28c064e2019-04-30 18:09:38 +0200373 /*
374 * If highest and lowest value are either both below
375 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
376 * means USB TYPE-C is in unattached mode, this is an issue, make
377 * u-boot,error-led blinking and stop boot process.
378 */
379 if ((max_uV > USB_LOW_THRESHOLD_UV &&
380 min_uV > USB_LOW_THRESHOLD_UV) ||
381 (max_uV <= USB_LOW_THRESHOLD_UV &&
382 min_uV <= USB_LOW_THRESHOLD_UV)) {
383 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
384 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
385 /* with 125ms interval, led will blink for 17.02 years ....*/
386 nb_blink = U32_MAX;
387 }
388
389 if (max_uV > USB_LOW_THRESHOLD_UV &&
390 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
391 min_uV <= USB_LOW_THRESHOLD_UV) {
392 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100393 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200394 }
395
396 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
397 max_uV <= USB_START_LOW_THRESHOLD_UV &&
398 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard5eff1682020-04-30 18:41:05 +0200399 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100400 nb_blink = 3;
401 }
402
Patrice Chotard28c064e2019-04-30 18:09:38 +0200403 /*
404 * If highest value is above 2.15 Volts that means that the USB TypeC
405 * supplies more than 3 Amp, this is not compliant with TypeC specification
406 */
407 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
408 pr_err("* USB TYPE-C charger not compliant with *\n");
409 pr_err("* specification *\n");
410 pr_err("****************************************************\n\n");
411 /* with 125ms interval, led will blink for 17.02 years ....*/
412 nb_blink = U32_MAX;
413 } else {
414 pr_err("* Current too low, use a 3A power supply! *\n");
415 pr_err("****************************************************\n\n");
416 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100417
Patrick Delaunaydd281082019-07-30 19:16:39 +0200418 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100419
420 return 0;
421}
Patrick Delaunay41542472019-07-30 19:16:43 +0200422#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100423
Patrick Delaunay45459742019-02-27 17:01:24 +0100424static void sysconf_init(void)
425{
Patrick Delaunay654706b2020-04-01 09:07:33 +0200426#ifndef CONFIG_TFABOOT
Patrick Delaunay45459742019-02-27 17:01:24 +0100427 u8 *syscfg;
428#ifdef CONFIG_DM_REGULATOR
429 struct udevice *pwr_dev;
430 struct udevice *pwr_reg;
431 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100432 u32 otp = 0;
433#endif
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200434 int ret;
435 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100436
437 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
438
439 /* interconnect update : select master using the port 1 */
440 /* LTDC = AXI_M9 */
441 /* GPU = AXI_M8 */
442 /* today information is hardcoded in U-Boot */
443 writel(BIT(9), syscfg + SYSCFG_ICNR);
444
445 /* disable Pull-Down for boot pin connected to VDD */
446 bootr = readl(syscfg + SYSCFG_BOOTR);
447 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
448 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
449 writel(bootr, syscfg + SYSCFG_BOOTR);
450
451#ifdef CONFIG_DM_REGULATOR
452 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
453 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
454 * The customer will have to disable this for low frequencies
455 * or if AFMUX is selected but the function not used, typically for
456 * TRACE. Otherwise, impact on power consumption.
457 *
458 * WARNING:
459 * enabling High Speed mode while VDD>2.7V
460 * with the OTP product_below_2v5 (OTP 18, BIT 13)
461 * erroneously set to 1 can damage the IC!
462 * => U-Boot set the register only if VDD < 2.7V (in DT)
463 * but this value need to be consistent with board design
464 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200465 ret = uclass_get_device_by_driver(UCLASS_PMIC,
466 DM_GET_DRIVER(stm32mp_pwr_pmic),
467 &pwr_dev);
Patrick Delaunay45459742019-02-27 17:01:24 +0100468 if (!ret) {
469 ret = uclass_get_device_by_driver(UCLASS_MISC,
470 DM_GET_DRIVER(stm32mp_bsec),
471 &dev);
472 if (ret) {
473 pr_err("Can't find stm32mp_bsec driver\n");
474 return;
475 }
476
477 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200478 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100479 otp = otp & BIT(13);
480
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200481 /* get VDD = vdd-supply */
482 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100483 &pwr_reg);
484
485 /* check if VDD is Low Voltage */
486 if (!ret) {
487 if (regulator_get_value(pwr_reg) < 2700000) {
488 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
489 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
490 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
491 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
492 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
493 syscfg + SYSCFG_IOCTRLSETR);
494
495 if (!otp)
496 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
497 } else {
498 if (otp)
499 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
500 }
501 } else {
502 debug("VDD unknown");
503 }
504 }
505#endif
506
507 /* activate automatic I/O compensation
508 * warning: need to ensure CSI enabled and ready in clock driver
509 */
510 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
511
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200512 /* poll until ready (1s timeout) */
513 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
514 val & SYSCFG_CMPCR_READY,
515 1000000);
516 if (ret) {
517 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
518 led_error_blink(10);
519 }
520
Patrick Delaunay45459742019-02-27 17:01:24 +0100521 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
522#endif
523}
524
Patrick Delaunayd573e462019-07-30 19:16:38 +0200525#ifdef CONFIG_DM_REGULATOR
526/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
527static int dk2_i2c1_fix(void)
528{
529 ofnode node;
530 struct gpio_desc hdmi, audio;
531 int ret = 0;
532
533 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
534 if (!ofnode_valid(node)) {
535 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
536 return -ENOENT;
537 }
538
539 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
540 &hdmi, GPIOD_IS_OUT)) {
541 pr_debug("%s: could not find reset-gpios\n",
542 __func__);
543 return -ENOENT;
544 }
545
546 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
547 if (!ofnode_valid(node)) {
548 pr_debug("%s: no cs42l51@4a ?\n", __func__);
549 return -ENOENT;
550 }
551
552 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
553 &audio, GPIOD_IS_OUT)) {
554 pr_debug("%s: could not find reset-gpios\n",
555 __func__);
556 return -ENOENT;
557 }
558
559 /* before power up, insure that HDMI and AUDIO IC is under reset */
560 ret = dm_gpio_set_value(&hdmi, 1);
561 if (ret) {
562 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
563 goto error;
564 }
565 ret = dm_gpio_set_value(&audio, 1);
566 if (ret) {
567 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
568 goto error;
569 }
570
571 /* power-up audio IC */
572 regulator_autoset_by_name("v1v8_audio", NULL);
573
574 /* power-up HDMI IC */
575 regulator_autoset_by_name("v1v2_hdmi", NULL);
576 regulator_autoset_by_name("v3v3_hdmi", NULL);
577
578error:
579 return ret;
580}
581
582static bool board_is_dk2(void)
583{
Patrick Delaunay84625482020-01-13 15:17:42 +0100584 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200585 of_machine_is_compatible("st,stm32mp157c-dk2"))
586 return true;
587
588 return false;
589}
590#endif
591
Patrick Delaunay055065a2020-04-22 14:29:13 +0200592static bool board_is_ev1(void)
593{
594 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
595 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
596 of_machine_is_compatible("st,stm32mp157c-ev1") ||
597 of_machine_is_compatible("st,stm32mp157d-ev1") ||
598 of_machine_is_compatible("st,stm32mp157f-ev1")))
599 return true;
600
601 return false;
602}
603
604/* touchscreen driver: only used for pincontrol configuration */
605static const struct udevice_id goodix_ids[] = {
606 { .compatible = "goodix,gt9147", },
607 { }
608};
609
610U_BOOT_DRIVER(goodix) = {
611 .name = "goodix",
612 .id = UCLASS_NOP,
613 .of_match = goodix_ids,
614};
615
616static void board_ev1_init(void)
617{
618 struct udevice *dev;
619
620 /* configure IRQ line on EV1 for touchscreen before LCD reset */
621 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
622}
623
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100624/* board dependent setup after realloc */
625int board_init(void)
626{
627 /* address of boot parameters */
628 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
629
Patrick Delaunay29e4ce32020-06-04 14:30:24 +0200630 if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
631 gpio_hog_probe_all();
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100632
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100633 board_key_check();
634
Patrick Delaunay055065a2020-04-22 14:29:13 +0200635 if (board_is_ev1())
636 board_ev1_init();
637
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200638#ifdef CONFIG_DM_REGULATOR
Patrick Delaunayd573e462019-07-30 19:16:38 +0200639 if (board_is_dk2())
640 dk2_i2c1_fix();
641
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200642 regulators_enable_boot_on(_DEBUG);
643#endif
644
Patrick Delaunay45459742019-02-27 17:01:24 +0100645 sysconf_init();
646
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200647 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200648 led_default_state();
649
Patrick Delaunay0c952952020-04-22 14:29:12 +0200650 setup_led(LEDST_ON);
651
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100652 return 0;
653}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100654
655int board_late_init(void)
656{
657#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
658 const void *fdt_compat;
659 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200660 int ret;
661 u32 otp;
662 struct udevice *dev;
663 char buf[10];
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100664
665 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
666 &fdt_compat_len);
667 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay99f67432020-04-22 14:29:14 +0200668 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100669 env_set("board_name", fdt_compat);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200670 } else {
671 char dtb_name[256];
672 int buf_len = sizeof(dtb_name);
673
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100674 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200675
676 strncpy(dtb_name, fdt_compat + 3, buf_len);
677 buf_len -= strlen(fdt_compat + 3);
678 strncat(dtb_name, ".dtb", buf_len);
679 env_set("fdtfile", dtb_name);
680 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100681 }
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200682 ret = uclass_get_device_by_driver(UCLASS_MISC,
683 DM_GET_DRIVER(stm32mp_bsec),
684 &dev);
685
686 if (!ret)
687 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
688 &otp, sizeof(otp));
689 if (!ret && otp) {
690 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
691 env_set("board_id", buf);
692
693 snprintf(buf, sizeof(buf), "0x%04x",
694 ((otp >> 8) & 0xF) - 1 + 0xA);
695 env_set("board_rev", buf);
696 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100697#endif
698
Patrick Delaunay41542472019-07-30 19:16:43 +0200699#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100700 /* for DK1/DK2 boards */
701 board_check_usb_power();
Patrick Delaunay41542472019-07-30 19:16:43 +0200702#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100703
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100704 return 0;
705}
Patrice Chotard395f1292019-02-12 16:50:40 +0100706
707void board_quiesce_devices(void)
708{
709 setup_led(LEDST_OFF);
710}
Patrice Chotard87471642019-05-02 18:07:14 +0200711
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200712/* eth init function : weak called in eqos driver */
713int board_interface_eth_init(struct udevice *dev,
714 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200715{
716 u8 *syscfg;
717 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200718 bool eth_clk_sel_reg = false;
719 bool eth_ref_clk_sel_reg = false;
720
721 /* Gigabit Ethernet 125MHz clock selection. */
722 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
723
724 /* Ethernet 50Mhz RMII clock selection */
725 eth_ref_clk_sel_reg =
726 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200727
728 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
729
730 if (!syscfg)
731 return -ENODEV;
732
733 switch (interface_type) {
734 case PHY_INTERFACE_MODE_MII:
735 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
736 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
737 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
738 break;
739 case PHY_INTERFACE_MODE_GMII:
740 if (eth_clk_sel_reg)
741 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
742 SYSCFG_PMCSETR_ETH_CLK_SEL;
743 else
744 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
745 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
746 break;
747 case PHY_INTERFACE_MODE_RMII:
748 if (eth_ref_clk_sel_reg)
749 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
750 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
751 else
752 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
753 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
754 break;
755 case PHY_INTERFACE_MODE_RGMII:
756 case PHY_INTERFACE_MODE_RGMII_ID:
757 case PHY_INTERFACE_MODE_RGMII_RXID:
758 case PHY_INTERFACE_MODE_RGMII_TXID:
759 if (eth_clk_sel_reg)
760 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
761 SYSCFG_PMCSETR_ETH_CLK_SEL;
762 else
763 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
764 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
765 break;
766 default:
767 debug("%s: Do not manage %d interface\n",
768 __func__, interface_type);
769 /* Do not manage others interfaces */
770 return -EINVAL;
771 }
772
773 /* clear and set ETH configuration bits */
774 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
775 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
776 syscfg + SYSCFG_PMCCLRR);
777 writel(value, syscfg + SYSCFG_PMCSETR);
778
779 return 0;
780}
781
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200782enum env_location env_get_location(enum env_operation op, int prio)
783{
784 u32 bootmode = get_bootmode();
785
786 if (prio)
787 return ENVL_UNKNOWN;
788
789 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
790#ifdef CONFIG_ENV_IS_IN_EXT4
791 case BOOT_FLASH_SD:
792 case BOOT_FLASH_EMMC:
793 return ENVL_EXT4;
794#endif
795#ifdef CONFIG_ENV_IS_IN_UBI
796 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100797 case BOOT_FLASH_SPINAND:
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200798 return ENVL_UBI;
799#endif
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200800#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
801 case BOOT_FLASH_NOR:
802 return ENVL_SPI_FLASH;
803#endif
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200804 default:
805 return ENVL_NOWHERE;
806 }
807}
808
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200809#if defined(CONFIG_ENV_IS_IN_EXT4)
810const char *env_ext4_get_intf(void)
811{
812 u32 bootmode = get_bootmode();
813
814 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
815 case BOOT_FLASH_SD:
816 case BOOT_FLASH_EMMC:
817 return "mmc";
818 default:
819 return "";
820 }
821}
822
823const char *env_ext4_get_dev_part(void)
824{
825 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
826 u32 bootmode = get_bootmode();
827
828 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
829}
830#endif
831
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200832#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900833int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200834{
835#ifdef CONFIG_FDT_FIXUP_PARTITIONS
836 struct node_info nodes[] = {
837 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100838 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200839 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
840 };
841 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
842#endif
843
844 return 0;
845}
846#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200847
848static void board_copro_image_process(ulong fw_image, size_t fw_size)
849{
850 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
851
852 if (!rproc_is_initialized())
853 if (rproc_init()) {
854 printf("Remote Processor %d initialization failed\n",
855 id);
856 return;
857 }
858
859 ret = rproc_load(id, fw_image, fw_size);
860 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
861 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
862
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100863 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200864 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200865}
866
867U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);