Alex | af2cbfd | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 1 | source "drivers/net/phy/Kconfig" |
Calvin Johnson | a802d1e | 2018-03-08 15:30:35 +0530 | [diff] [blame] | 2 | source "drivers/net/pfe_eth/Kconfig" |
Florinel Iordache | 1bad991 | 2019-05-15 09:09:21 +0000 | [diff] [blame] | 3 | source "drivers/net/fsl-mc/Kconfig" |
Alex | af2cbfd | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 4 | |
Joe Hershberger | 05c3e68 | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 5 | config DM_ETH |
| 6 | bool "Enable Driver Model for Ethernet drivers" |
| 7 | depends on DM |
| 8 | help |
| 9 | Enable driver model for Ethernet. |
| 10 | |
Joe Hershberger | c25f406 | 2018-07-02 14:47:48 -0500 | [diff] [blame] | 11 | The eth_*() interface will be implemented by the UCLASS_ETH class |
| 12 | This is currently implemented in net/eth-uclass.c |
Joe Hershberger | 05c3e68 | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 13 | Look in include/net.h for details. |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 14 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 15 | config DM_MDIO |
| 16 | bool "Enable Driver Model for MDIO devices" |
| 17 | depends on DM_ETH && PHYLIB |
| 18 | help |
| 19 | Enable driver model for MDIO devices |
| 20 | |
| 21 | Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as |
| 22 | stand-alone devices. Useful in particular for systems that support |
| 23 | DM_ETH and have a stand-alone MDIO hardware block shared by multiple |
| 24 | Ethernet interfaces. |
| 25 | This is currently implemented in net/mdio-uclass.c |
| 26 | Look in include/miiphy.h for details. |
| 27 | |
Alex Marginean | 8880edb | 2019-07-12 10:13:50 +0300 | [diff] [blame] | 28 | config DM_MDIO_MUX |
| 29 | bool "Enable Driver Model for MDIO MUX devices" |
| 30 | depends on DM_MDIO |
| 31 | help |
| 32 | Enable driver model for MDIO MUX devices |
| 33 | |
| 34 | Adds UCLASS_MDIO_MUX DM class supporting MDIO MUXes. Useful for |
| 35 | systems that support DM_MDIO and integrate one or multiple muxes on |
| 36 | the MDIO bus. |
| 37 | This is currently implemented in net/mdio-mux-uclass.c |
| 38 | Look in include/miiphy.h for details. |
| 39 | |
Alex Marginean | ec9594a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 40 | config MDIO_SANDBOX |
| 41 | depends on DM_MDIO && SANDBOX |
| 42 | default y |
| 43 | bool "Sandbox: Mocked MDIO driver" |
| 44 | help |
| 45 | This driver implements dummy read/write/reset MDIO functions mimicking |
| 46 | a bus with a single PHY. |
| 47 | |
| 48 | This driver is used in for testing in test/dm/mdio.c |
| 49 | |
Alex Marginean | c3d9f3f | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 50 | config MDIO_MUX_SANDBOX |
| 51 | depends on DM_MDIO_MUX && MDIO_SANDBOX |
| 52 | default y |
| 53 | bool "Sandbox: Mocked MDIO-MUX driver" |
| 54 | help |
| 55 | This driver implements dummy select/deselect ops mimicking a MUX on |
| 56 | the MDIO bux. It uses mdio_sandbox driver as parent MDIO. |
| 57 | |
| 58 | This driver is used for testing in test/dm/mdio.c |
| 59 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 60 | menuconfig NETDEVICES |
| 61 | bool "Network device support" |
| 62 | depends on NET |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 63 | default y if DM_ETH |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 64 | help |
| 65 | You must select Y to enable any network device support |
| 66 | Generally if you have any networking support this is a given |
| 67 | |
| 68 | If unsure, say Y |
| 69 | |
| 70 | if NETDEVICES |
| 71 | |
Philipp Tomsich | 449ea2c | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 72 | config PHY_GIGE |
| 73 | bool "Enable GbE PHY status parsing and configuration" |
| 74 | help |
| 75 | Enables support for parsing the status output and for |
| 76 | configuring GbE PHYs (affects the inner workings of some |
| 77 | commands and miiphyutil.c). |
| 78 | |
Marek Vasut | e40095f | 2016-05-24 23:29:09 +0200 | [diff] [blame] | 79 | config AG7XXX |
| 80 | bool "Atheros AG7xxx Ethernet MAC support" |
| 81 | depends on DM_ETH && ARCH_ATH79 |
| 82 | select PHYLIB |
| 83 | help |
| 84 | This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is |
| 85 | present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. |
| 86 | |
| 87 | |
Thomas Chou | 96fa1e4 | 2015-10-22 15:29:11 +0800 | [diff] [blame] | 88 | config ALTERA_TSE |
| 89 | bool "Altera Triple-Speed Ethernet MAC support" |
| 90 | depends on DM_ETH |
| 91 | select PHYLIB |
| 92 | help |
| 93 | This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. |
| 94 | Please find details on the "Triple-Speed Ethernet MegaCore Function |
| 95 | Resource Center" of Altera. |
| 96 | |
Suji Velupillai | c89782d | 2017-07-10 14:05:41 -0700 | [diff] [blame] | 97 | config BCM_SF2_ETH |
| 98 | bool "Broadcom SF2 (Starfighter2) Ethernet support" |
| 99 | select PHYLIB |
| 100 | help |
| 101 | This is an abstract framework which provides a generic interface |
| 102 | to MAC and DMA management for multiple Broadcom SoCs such as |
| 103 | Cygnus, NSP and bcm28155_ap platforms. |
| 104 | |
| 105 | config BCM_SF2_ETH_DEFAULT_PORT |
| 106 | int "Broadcom SF2 (Starfighter2) Ethernet default port number" |
| 107 | depends on BCM_SF2_ETH |
| 108 | default 0 |
| 109 | help |
| 110 | Default port number for the Starfighter2 ethernet driver. |
| 111 | |
| 112 | config BCM_SF2_ETH_GMAC |
| 113 | bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" |
| 114 | depends on BCM_SF2_ETH |
| 115 | help |
| 116 | This flag enables the ethernet support for Broadcom platforms with |
| 117 | GMAC such as Cygnus. This driver is based on the framework provided |
| 118 | by the BCM_SF2_ETH driver. |
| 119 | Say Y to any bcmcygnus based platforms. |
| 120 | |
Álvaro Fernández Rojas | 55e55fe | 2018-12-01 19:00:24 +0100 | [diff] [blame] | 121 | config BCM6348_ETH |
| 122 | bool "BCM6348 EMAC support" |
| 123 | depends on DM_ETH && ARCH_BMIPS |
| 124 | select DMA |
| 125 | select DMA_CHANNELS |
| 126 | select MII |
| 127 | select PHYLIB |
| 128 | help |
| 129 | This driver supports the BCM6348 Ethernet MAC. |
| 130 | |
Álvaro Fernández Rojas | 9622972 | 2018-12-01 19:00:32 +0100 | [diff] [blame] | 131 | config BCM6368_ETH |
| 132 | bool "BCM6368 EMAC support" |
| 133 | depends on DM_ETH && ARCH_BMIPS |
| 134 | select DMA |
| 135 | select MII |
| 136 | help |
| 137 | This driver supports the BCM6368 Ethernet MAC. |
| 138 | |
Amit Singh Tomar | d53e3fa | 2020-01-27 01:14:42 +0000 | [diff] [blame] | 139 | config BCMGENET |
| 140 | bool "BCMGENET V5 support" |
| 141 | depends on DM_ETH |
| 142 | select PHYLIB |
| 143 | help |
| 144 | This driver supports the BCMGENET Ethernet MAC. |
| 145 | |
Stephen Warren | ba4dfef | 2016-10-21 14:46:47 -0600 | [diff] [blame] | 146 | config DWC_ETH_QOS |
| 147 | bool "Synopsys DWC Ethernet QOS device support" |
| 148 | depends on DM_ETH |
| 149 | select PHYLIB |
| 150 | help |
| 151 | This driver supports the Synopsys Designware Ethernet QOS (Quality |
| 152 | Of Service) IP block. The IP supports many options for bus type, |
| 153 | clocking/reset structure, and feature list. This driver currently |
| 154 | supports the specific configuration used in NVIDIA's Tegra186 chip, |
| 155 | but should be extensible to other combinations quite easily. |
| 156 | |
Simon Glass | c294ac5 | 2015-08-19 09:33:41 -0600 | [diff] [blame] | 157 | config E1000 |
| 158 | bool "Intel PRO/1000 Gigabit Ethernet support" |
| 159 | help |
| 160 | This driver supports Intel(R) PRO/1000 gigabit ethernet family of |
| 161 | adapters. For more information on how to identify your adapter, go |
| 162 | to the Adapter & Driver ID Guide at: |
| 163 | |
| 164 | <http://support.intel.com/support/network/adapter/pro100/21397.htm> |
| 165 | |
| 166 | config E1000_SPI_GENERIC |
| 167 | bool "Allow access to the Intel 8257x SPI bus" |
| 168 | depends on E1000 |
| 169 | help |
| 170 | Allow generic access to the SPI bus on the Intel 8257x, for |
| 171 | example with the "sspi" command. |
| 172 | |
| 173 | config E1000_SPI |
| 174 | bool "Enable SPI bus utility code" |
| 175 | depends on E1000 |
| 176 | help |
| 177 | Utility code for direct access to the SPI bus on Intel 8257x. |
| 178 | This does not do anything useful unless you set at least one |
| 179 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. |
| 180 | |
| 181 | config CMD_E1000 |
| 182 | bool "Enable the e1000 command" |
| 183 | depends on E1000 |
| 184 | help |
| 185 | This enables the 'e1000' management command for E1000 devices. When |
| 186 | used on devices with SPI support you can reprogram the EEPROM from |
| 187 | U-Boot. |
| 188 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 189 | config ETH_SANDBOX |
| 190 | depends on DM_ETH && SANDBOX |
| 191 | default y |
| 192 | bool "Sandbox: Mocked Ethernet driver" |
| 193 | help |
| 194 | This driver simply responds with fake ARP replies and ping |
| 195 | replies that are used to verify network stack functionality |
| 196 | |
| 197 | This driver is particularly useful in the test/dm/eth.c tests |
| 198 | |
Joe Hershberger | a346ca7 | 2015-03-22 17:09:21 -0500 | [diff] [blame] | 199 | config ETH_SANDBOX_RAW |
| 200 | depends on DM_ETH && SANDBOX |
| 201 | default y |
| 202 | bool "Sandbox: Bridge to Linux Raw Sockets" |
| 203 | help |
| 204 | This driver is a bridge from the bottom of the network stack |
| 205 | in U-Boot to the RAW AF_PACKET API in Linux. This allows real |
| 206 | network traffic to be tested from within sandbox. See |
Keerthy | 5917d0b | 2019-07-29 13:52:04 +0530 | [diff] [blame] | 207 | doc/arch/index.rst for more details. |
Joe Hershberger | a346ca7 | 2015-03-22 17:09:21 -0500 | [diff] [blame] | 208 | |
Simon Glass | ef48f6d | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 209 | config ETH_DESIGNWARE |
| 210 | bool "Synopsys Designware Ethernet MAC" |
Thomas Chou | 25af71c | 2015-12-07 20:53:29 +0800 | [diff] [blame] | 211 | select PHYLIB |
Simon Goldschmidt | 6fb1eb1 | 2019-01-13 19:58:41 +0100 | [diff] [blame] | 212 | imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA |
Simon Glass | ef48f6d | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 213 | help |
| 214 | This MAC is present in SoCs from various vendors. It supports |
| 215 | 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to |
| 216 | provide the PHY (physical media interface). |
| 217 | |
Marek Vasut | 215a065 | 2018-08-13 19:32:14 +0200 | [diff] [blame] | 218 | config ETH_DESIGNWARE_SOCFPGA |
Simon Goldschmidt | 4f1267c | 2019-01-13 19:58:40 +0100 | [diff] [blame] | 219 | select REGMAP |
| 220 | select SYSCON |
Marek Vasut | 215a065 | 2018-08-13 19:32:14 +0200 | [diff] [blame] | 221 | bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" |
| 222 | depends on DM_ETH && ETH_DESIGNWARE |
| 223 | help |
| 224 | The Altera SoCFPGA requires additional configuration of the |
| 225 | Altera system manager to correctly interface with the PHY. |
| 226 | This code handles those SoC specifics. |
| 227 | |
Max Filippov | f072712 | 2016-08-05 18:26:15 +0300 | [diff] [blame] | 228 | config ETHOC |
| 229 | bool "OpenCores 10/100 Mbps Ethernet MAC" |
| 230 | help |
| 231 | This MAC is present in OpenRISC and Xtensa XTFPGA boards. |
| 232 | |
Peng Fan | fbada48 | 2018-03-28 20:54:14 +0800 | [diff] [blame] | 233 | config FEC_MXC_SHARE_MDIO |
| 234 | bool "Share the MDIO bus for FEC controller" |
| 235 | depends on FEC_MXC |
| 236 | |
| 237 | config FEC_MXC_MDIO_BASE |
| 238 | hex "MDIO base address for the FEC controller" |
| 239 | depends on FEC_MXC_SHARE_MDIO |
| 240 | help |
| 241 | This specifies the MDIO registers base address. It is used when |
| 242 | two FEC controllers share MDIO bus. |
| 243 | |
Jagan Teki | 97d29ca | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 244 | config FEC_MXC |
| 245 | bool "FEC Ethernet controller" |
Peng Fan | 81dc2ac | 2019-10-22 03:29:58 +0000 | [diff] [blame] | 246 | depends on MX28 || MX5 || MX6 || MX7 || IMX8 || IMX8M || VF610 |
Jagan Teki | 97d29ca | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 247 | help |
| 248 | This driver supports the 10/100 Fast Ethernet controller for |
| 249 | NXP i.MX processors. |
| 250 | |
Tom Rini | cc1e98b | 2019-05-12 07:59:12 -0400 | [diff] [blame] | 251 | config FMAN_ENET |
| 252 | bool "Freescale FMan ethernet support" |
| 253 | depends on ARM || PPC |
| 254 | help |
| 255 | This driver support the Freescale FMan Ethernet controller |
| 256 | |
Tom Rini | 8dc1b17 | 2017-05-26 11:18:53 -0400 | [diff] [blame] | 257 | config FTMAC100 |
| 258 | bool "Ftmac100 Ethernet Support" |
| 259 | help |
| 260 | This MAC is present in Andestech SoCs. |
| 261 | |
Cédric Le Goater | f95de0b | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 262 | config FTGMAC100 |
| 263 | bool "Ftgmac100 Ethernet Support" |
| 264 | depends on DM_ETH |
| 265 | select PHYLIB |
| 266 | help |
| 267 | This driver supports the Faraday's FTGMAC100 Gigabit SoC |
| 268 | Ethernet controller that can be found on Aspeed SoCs (which |
| 269 | include NCSI). |
| 270 | |
| 271 | It is fully compliant with IEEE 802.3 specification for |
| 272 | 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 |
| 273 | Mbps Ethernet and includes Reduced Media Independent |
| 274 | Interface (RMII) and Reduced Gigabit Media Independent |
| 275 | Interface (RGMII) interfaces. It adopts an AHB bus interface |
| 276 | and integrates a link list DMA engine with direct M-Bus |
| 277 | accesses for transmitting and receiving packets. It has |
| 278 | independent TX/RX fifos, supports half and full duplex (1000 |
| 279 | Mbps mode only supports full duplex), flow control for full |
| 280 | duplex and backpressure for half duplex. |
| 281 | |
| 282 | The FTGMAC100 also implements IP, TCP, UDP checksum offloads |
| 283 | and supports IEEE 802.1Q VLAN tag insertion and removal. It |
| 284 | offers high-priority transmit queue for QoS and CoS |
| 285 | applications. |
| 286 | |
| 287 | |
Angelo Durgehello | 080bcc5 | 2019-11-15 23:54:17 +0100 | [diff] [blame] | 288 | config MCFFEC |
| 289 | bool "ColdFire Ethernet Support" |
| 290 | depends on DM_ETH |
| 291 | select PHYLIB |
| 292 | help |
| 293 | This driver supports the network interface units in the |
| 294 | ColdFire family. |
| 295 | |
| 296 | config FSLDMAFEC |
| 297 | bool "ColdFire DMA Ethernet Support" |
| 298 | depends on DM_ETH |
| 299 | select PHYLIB |
| 300 | help |
| 301 | This driver supports the network interface units in the |
| 302 | ColdFire family. |
| 303 | |
Chris Packham | ed52ea5 | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 304 | config MVGBE |
| 305 | bool "Marvell Orion5x/Kirkwood network interface support" |
| 306 | depends on KIRKWOOD || ORION5X |
Chris Packham | fb73107 | 2018-07-09 21:34:00 +1200 | [diff] [blame] | 307 | select PHYLIB if DM_ETH |
Chris Packham | ed52ea5 | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 308 | help |
| 309 | This driver supports the network interface units in the |
| 310 | Marvell Orion5x and Kirkwood SoCs |
| 311 | |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 312 | config MVNETA |
Miquel Raynal | e7ab2cc | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 313 | bool "Marvell Armada XP/385/3700 network interface support" |
| 314 | depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 315 | select PHYLIB |
| 316 | help |
| 317 | This driver supports the network interface units in the |
Miquel Raynal | e7ab2cc | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 318 | Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 319 | |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 320 | config MVPP2 |
Stefan Roese | e7935c4 | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 321 | bool "Marvell Armada 375/7K/8K network interface support" |
| 322 | depends on ARMADA_375 || ARMADA_8K |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 323 | select PHYLIB |
Nevo Hed | 17caaf8 | 2019-08-15 18:08:45 -0400 | [diff] [blame] | 324 | select MVMDIO |
| 325 | select DM_MDIO |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 326 | help |
| 327 | This driver supports the network interface units in the |
Stefan Roese | e7935c4 | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 328 | Marvell ARMADA 375, 7K and 8K SoCs. |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 329 | |
Wenyou Yang | ebcb40a | 2016-11-02 10:06:55 +0800 | [diff] [blame] | 330 | config MACB |
| 331 | bool "Cadence MACB/GEM Ethernet Interface" |
| 332 | depends on DM_ETH |
| 333 | select PHYLIB |
| 334 | help |
| 335 | The Cadence MACB ethernet interface is found on many Atmel |
| 336 | AT91 and SAMA5 parts. This driver also supports the Cadence |
| 337 | GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. |
| 338 | Say Y to include support for the MACB/GEM chip. |
| 339 | |
Wilson Lee | 4bf5691 | 2017-08-22 20:25:07 -0700 | [diff] [blame] | 340 | config MACB_ZYNQ |
| 341 | bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" |
| 342 | depends on MACB |
| 343 | help |
| 344 | The Cadence MACB ethernet interface was used on Zynq platform. |
| 345 | Say Y to enable support for the MACB/GEM in Zynq chip. |
| 346 | |
Stefan Roese | c895ef4 | 2018-10-26 14:53:27 +0200 | [diff] [blame] | 347 | config MT7628_ETH |
| 348 | bool "MediaTek MT7628 Ethernet Interface" |
Weijie Gao | 16b9490 | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 349 | depends on SOC_MT7628 |
Weijie Gao | f079321 | 2019-09-25 17:45:33 +0800 | [diff] [blame] | 350 | select PHYLIB |
Stefan Roese | c895ef4 | 2018-10-26 14:53:27 +0200 | [diff] [blame] | 351 | help |
| 352 | The MediaTek MT7628 ethernet interface is used on MT7628 and |
| 353 | MT7688 based boards. |
| 354 | |
Bin Meng | b68fe15 | 2015-08-27 22:25:58 -0700 | [diff] [blame] | 355 | config PCH_GBE |
| 356 | bool "Intel Platform Controller Hub EG20T GMAC driver" |
| 357 | depends on DM_ETH && DM_PCI |
| 358 | select PHYLIB |
| 359 | help |
| 360 | This MAC is present in Intel Platform Controller Hub EG20T. It |
| 361 | supports 10/100/1000 Mbps operation. |
| 362 | |
Mylène Josserand | 751b0be | 2017-04-02 12:59:08 +0200 | [diff] [blame] | 363 | config RGMII |
| 364 | bool "Enable RGMII" |
| 365 | help |
| 366 | Enable the support of the Reduced Gigabit Media-Independent |
| 367 | Interface (RGMII). |
| 368 | |
Adam Ford | d7869b2 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 369 | config MII |
| 370 | bool "Enable MII" |
| 371 | help |
| 372 | Enable support of the Media-Independent Interface (MII) |
| 373 | |
Bin Meng | 86e9dc8 | 2016-03-21 06:47:41 -0700 | [diff] [blame] | 374 | config RTL8139 |
| 375 | bool "Realtek 8139 series Ethernet controller driver" |
| 376 | help |
| 377 | This driver supports Realtek 8139 series fast ethernet family of |
| 378 | PCI chipsets/adapters. |
| 379 | |
Bin Meng | 0764f24 | 2016-03-21 06:47:42 -0700 | [diff] [blame] | 380 | config RTL8169 |
| 381 | bool "Realtek 8169 series Ethernet controller driver" |
| 382 | help |
| 383 | This driver supports Realtek 8169 series gigabit ethernet family of |
| 384 | PCI/PCIe chipsets/adapters. |
| 385 | |
Adam Ford | 8daec2d | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 386 | config SMC911X |
| 387 | bool "SMSC LAN911x and LAN921x controller driver" |
| 388 | |
| 389 | if SMC911X |
| 390 | |
Marek Vasut | 8148693 | 2020-03-15 17:39:01 +0100 | [diff] [blame] | 391 | if !DM_ETH |
Adam Ford | 8daec2d | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 392 | config SMC911X_BASE |
| 393 | hex "SMC911X Base Address" |
| 394 | help |
| 395 | Define this to hold the physical address |
| 396 | of the device (I/O space) |
Marek Vasut | 8148693 | 2020-03-15 17:39:01 +0100 | [diff] [blame] | 397 | endif #DM_ETH |
Adam Ford | 8daec2d | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 398 | |
| 399 | choice |
| 400 | prompt "SMC911X bus width" |
| 401 | default SMC911X_16_BIT |
| 402 | |
| 403 | config SMC911X_32_BIT |
| 404 | bool "Enable 32-bit interface" |
| 405 | |
| 406 | config SMC911X_16_BIT |
| 407 | bool "Enable 16-bit interface" |
| 408 | help |
| 409 | Define this if data bus is 16 bits. If your processor |
| 410 | automatically converts one 32 bit word to two 16 bit |
| 411 | words you may also try CONFIG_SMC911X_32_BIT. |
| 412 | |
| 413 | endchoice |
| 414 | endif #SMC911X |
| 415 | |
Mylène Josserand | 4d43d06 | 2017-04-02 12:59:03 +0200 | [diff] [blame] | 416 | config SUN7I_GMAC |
| 417 | bool "Enable Allwinner GMAC Ethernet support" |
| 418 | help |
| 419 | Enable the support for Sun7i GMAC Ethernet controller |
| 420 | |
Stefan Mavrodiev | aba3924 | 2017-11-03 08:56:51 +0200 | [diff] [blame] | 421 | config SUN7I_GMAC_FORCE_TXERR |
| 422 | bool "Force PA17 as gmac function" |
| 423 | depends on SUN7I_GMAC |
| 424 | help |
| 425 | Some ethernet phys needs TXERR control. Since the GMAC |
| 426 | doesn't have such signal, setting PA17 as GMAC function |
| 427 | makes the pin output low, which enables data transmission. |
| 428 | |
Mylène Josserand | abc3e4d | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 429 | config SUN4I_EMAC |
| 430 | bool "Allwinner Sun4i Ethernet MAC support" |
| 431 | depends on DM_ETH |
Artturi Alm | 6270a3f | 2017-11-08 05:08:58 +0200 | [diff] [blame] | 432 | select PHYLIB |
Mylène Josserand | abc3e4d | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 433 | help |
| 434 | This driver supports the Allwinner based SUN4I Ethernet MAC. |
| 435 | |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 436 | config SUN8I_EMAC |
| 437 | bool "Allwinner Sun8i Ethernet MAC support" |
| 438 | depends on DM_ETH |
| 439 | select PHYLIB |
Philipp Tomsich | 449ea2c | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 440 | select PHY_GIGE |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 441 | help |
| 442 | This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. |
| 443 | It can be found in H3/A64/A83T based SoCs and compatible with both |
Tom Rini | 7131d2d | 2017-02-20 09:38:03 -0500 | [diff] [blame] | 444 | External and Internal PHYs. |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 445 | |
Nobuhiro Iwamatsu | dcd18ea | 2017-12-01 16:08:03 +0900 | [diff] [blame] | 446 | config SH_ETHER |
| 447 | bool "Renesas SH Ethernet MAC" |
| 448 | select PHYLIB |
| 449 | help |
| 450 | This driver supports the Ethernet for Renesas SH and ARM SoCs. |
| 451 | |
Grygorii Strashko | ffad5fa | 2018-10-31 16:21:39 -0500 | [diff] [blame] | 452 | source "drivers/net/ti/Kconfig" |
Adam Ford | d7869b2 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 453 | |
Michal Simek | 338a5f2 | 2015-12-09 16:54:42 +0100 | [diff] [blame] | 454 | config XILINX_AXIEMAC |
| 455 | depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) |
| 456 | select PHYLIB |
| 457 | select MII |
| 458 | bool "Xilinx AXI Ethernet" |
| 459 | help |
| 460 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 461 | |
Michal Simek | 3229c86 | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 462 | config XILINX_EMACLITE |
Zubair Lutfullah Kakakhel | 2f1f05f | 2016-07-27 12:25:09 +0100 | [diff] [blame] | 463 | depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) |
Michal Simek | 3229c86 | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 464 | select PHYLIB |
| 465 | select MII |
| 466 | bool "Xilinx Ethernetlite" |
| 467 | help |
| 468 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 469 | |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 470 | config ZYNQ_GEM |
Michal Simek | ec48b6c | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 471 | depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) |
Michal Simek | 7bccc75 | 2015-12-11 09:14:31 +0100 | [diff] [blame] | 472 | select PHYLIB |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 473 | bool "Xilinx Ethernet GEM" |
| 474 | help |
Michal Simek | c942810 | 2015-12-09 16:53:52 +0100 | [diff] [blame] | 475 | This MAC is present in Xilinx Zynq and ZynqMP SoCs. |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 476 | |
Purna Chandra Mandal | 23e7578 | 2016-01-28 15:30:21 +0530 | [diff] [blame] | 477 | config PIC32_ETH |
| 478 | bool "Microchip PIC32 Ethernet Support" |
| 479 | depends on DM_ETH && MACH_PIC32 |
| 480 | select PHYLIB |
| 481 | help |
| 482 | This driver implements 10/100 Mbps Ethernet and MAC layer for |
| 483 | Microchip PIC32 microcontrollers. |
| 484 | |
Sjoerd Simons | 0125bcf | 2017-01-11 11:46:11 +0100 | [diff] [blame] | 485 | config GMAC_ROCKCHIP |
| 486 | bool "Rockchip Synopsys Designware Ethernet MAC" |
| 487 | depends on DM_ETH && ETH_DESIGNWARE |
| 488 | help |
| 489 | This driver provides Rockchip SoCs network support based on the |
| 490 | Synopsys Designware driver. |
| 491 | |
Marek Vasut | 8ae51b6 | 2017-05-13 15:54:28 +0200 | [diff] [blame] | 492 | config RENESAS_RAVB |
| 493 | bool "Renesas Ethernet AVB MAC" |
| 494 | depends on DM_ETH && RCAR_GEN3 |
| 495 | select PHYLIB |
| 496 | help |
| 497 | This driver implements support for the Ethernet AVB block in |
| 498 | Renesas M3 and H3 SoCs. |
| 499 | |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 500 | config MPC8XX_FEC |
| 501 | bool "Fast Ethernet Controller on MPC8XX" |
Christophe Leroy | ee1e600 | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 502 | depends on MPC8xx |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 503 | select MII |
| 504 | help |
| 505 | This driver implements support for the Fast Ethernet Controller |
| 506 | on MPC8XX |
| 507 | |
Kunihiko Hayashi | a892779 | 2018-05-24 19:24:37 +0900 | [diff] [blame] | 508 | config SNI_AVE |
| 509 | bool "Socionext AVE Ethernet support" |
| 510 | depends on DM_ETH && ARCH_UNIPHIER |
| 511 | select PHYLIB |
| 512 | select SYSCON |
| 513 | select REGMAP |
| 514 | help |
| 515 | This driver implements support for the Socionext AVE Ethernet |
| 516 | controller, as found on the Socionext UniPhier family. |
| 517 | |
Horatiu Vultur | 4c66157 | 2019-01-31 15:30:33 +0100 | [diff] [blame] | 518 | source "drivers/net/mscc_eswitch/Kconfig" |
Gregory CLEMENT | c854616 | 2019-01-17 17:07:13 +0100 | [diff] [blame] | 519 | |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 520 | config ETHER_ON_FEC1 |
| 521 | bool "FEC1" |
| 522 | depends on MPC8XX_FEC |
| 523 | default y |
| 524 | |
| 525 | config FEC1_PHY |
| 526 | int "FEC1 PHY" |
| 527 | depends on ETHER_ON_FEC1 |
| 528 | default -1 |
| 529 | help |
| 530 | Define to the hardcoded PHY address which corresponds |
| 531 | to the given FEC; i. e. |
| 532 | #define CONFIG_FEC1_PHY 4 |
| 533 | means that the PHY with address 4 is connected to FEC1 |
| 534 | |
| 535 | When set to -1, means to probe for first available. |
| 536 | |
| 537 | config PHY_NORXERR |
| 538 | bool "PHY_NORXERR" |
| 539 | depends on ETHER_ON_FEC1 |
| 540 | default n |
| 541 | help |
| 542 | The PHY does not have a RXERR line (RMII only). |
| 543 | (so program the FEC to ignore it). |
| 544 | |
| 545 | config ETHER_ON_FEC2 |
| 546 | bool "FEC2" |
| 547 | depends on MPC8XX_FEC && MPC885 |
| 548 | default y |
| 549 | |
| 550 | config FEC2_PHY |
| 551 | int "FEC2 PHY" |
| 552 | depends on ETHER_ON_FEC2 |
| 553 | default -1 |
| 554 | help |
| 555 | Define to the hardcoded PHY address which corresponds |
| 556 | to the given FEC; i. e. |
| 557 | #define CONFIG_FEC1_PHY 4 |
| 558 | means that the PHY with address 4 is connected to FEC1 |
| 559 | |
| 560 | When set to -1, means to probe for first available. |
| 561 | |
| 562 | config FEC2_PHY_NORXERR |
| 563 | bool "PHY_NORXERR" |
| 564 | depends on ETHER_ON_FEC2 |
| 565 | default n |
| 566 | help |
| 567 | The PHY does not have a RXERR line (RMII only). |
| 568 | (so program the FEC to ignore it). |
| 569 | |
Ahmed Mansour | 541d576 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 570 | config SYS_DPAA_QBMAN |
| 571 | bool "Device tree fixup for QBMan on freescale SOCs" |
| 572 | depends on (ARM || PPC) && !SPL_BUILD |
| 573 | default y if ARCH_B4860 || \ |
| 574 | ARCH_B4420 || \ |
| 575 | ARCH_P1023 || \ |
| 576 | ARCH_P2041 || \ |
| 577 | ARCH_T1023 || \ |
| 578 | ARCH_T1024 || \ |
| 579 | ARCH_T1040 || \ |
| 580 | ARCH_T1042 || \ |
| 581 | ARCH_T2080 || \ |
| 582 | ARCH_T2081 || \ |
| 583 | ARCH_T4240 || \ |
| 584 | ARCH_T4160 || \ |
| 585 | ARCH_P4080 || \ |
| 586 | ARCH_P3041 || \ |
| 587 | ARCH_P5040 || \ |
| 588 | ARCH_P5020 || \ |
| 589 | ARCH_LS1043A || \ |
| 590 | ARCH_LS1046A |
| 591 | help |
| 592 | QBman fixups to allow deep sleep in DPAA 1 SOCs |
| 593 | |
Mario Six | 1715105 | 2018-03-28 14:38:18 +0200 | [diff] [blame] | 594 | config TSEC_ENET |
| 595 | select PHYLIB |
| 596 | bool "Enable Three-Speed Ethernet Controller" |
| 597 | help |
| 598 | This driver implements support for the (Enhanced) Three-Speed |
| 599 | Ethernet Controller found on Freescale SoCs. |
| 600 | |
Weijie Gao | 23f1716 | 2018-12-20 16:12:53 +0800 | [diff] [blame] | 601 | config MEDIATEK_ETH |
| 602 | bool "MediaTek Ethernet GMAC Driver" |
| 603 | depends on DM_ETH |
| 604 | select PHYLIB |
| 605 | select DM_GPIO |
| 606 | select DM_RESET |
| 607 | help |
| 608 | This Driver support MediaTek Ethernet GMAC |
| 609 | Say Y to enable support for the MediaTek Ethernet GMAC. |
| 610 | |
Shawn Guo | 1d5b5d2 | 2019-03-20 15:32:40 +0800 | [diff] [blame] | 611 | config HIGMACV300_ETH |
| 612 | bool "HiSilicon Gigabit Ethernet Controller" |
| 613 | depends on DM_ETH |
| 614 | select DM_RESET |
| 615 | select PHYLIB |
| 616 | help |
| 617 | This driver supports HIGMACV300 Ethernet controller found on |
| 618 | HiSilicon SoCs. |
| 619 | |
Alex Marginean | 120b5ef | 2019-07-03 12:11:40 +0300 | [diff] [blame] | 620 | config FSL_ENETC |
| 621 | bool "NXP ENETC Ethernet controller" |
Alex Marginean | 1d99534 | 2019-07-03 12:11:41 +0300 | [diff] [blame] | 622 | depends on DM_PCI && DM_ETH && DM_MDIO |
Alex Marginean | 120b5ef | 2019-07-03 12:11:40 +0300 | [diff] [blame] | 623 | help |
| 624 | This driver supports the NXP ENETC Ethernet controller found on some |
| 625 | of the NXP SoCs. |
| 626 | |
Alex Marginean | 74dd383 | 2019-07-16 11:21:17 +0300 | [diff] [blame] | 627 | config MDIO_MUX_I2CREG |
| 628 | bool "MDIO MUX accessed as a register over I2C" |
| 629 | depends on DM_MDIO_MUX && DM_I2C |
| 630 | help |
| 631 | This driver is used for MDIO muxes driven by writing to a register of |
| 632 | an I2C chip. The board it was developed for uses a mux controlled by |
| 633 | on-board FPGA which in turn is accessed as a chip over I2C. |
| 634 | |
Alex Marginean | 8bd37ce | 2019-07-25 12:33:19 +0300 | [diff] [blame] | 635 | config MVMDIO |
| 636 | bool "Marvell MDIO interface support" |
| 637 | depends on DM_MDIO |
| 638 | help |
| 639 | This driver supports the MDIO interface found in the network |
| 640 | interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, |
| 641 | Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). |
| 642 | |
| 643 | This driver is used by the MVPP2 and MVNETA drivers. |
| 644 | |
Ioana Ciornei | 52e16ec | 2020-03-18 16:47:36 +0200 | [diff] [blame] | 645 | config FSL_LS_MDIO |
| 646 | bool "NXP Layerscape MDIO interface support" |
| 647 | depends on DM_MDIO |
| 648 | help |
| 649 | This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and |
| 650 | on the mEMAC (which supports both Clauses 22 and 45). |
| 651 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 652 | endif # NETDEVICES |