blob: cd083f7dde8c8353585416df3fe86b47f50c5a67 [file] [log] [blame]
Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
Simon Glass3f4e1e82015-11-29 13:17:57 -070028#include <dm.h>
Simon Glass6854f872014-11-14 20:56:33 -070029#include <errno.h>
30#include <malloc.h>
31#include <pci.h>
32#include <pci_rom.h>
33#include <vbe.h>
Simon Glassee87ee82016-10-05 20:42:17 -060034#include <video.h>
Simon Glass6854f872014-11-14 20:56:33 -070035#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080036#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070037
Simon Glass3f4e1e82015-11-29 13:17:57 -070038__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070039{
40 return true;
41}
42
Bin Mengf698baa2016-06-14 02:02:40 -070043__weak bool board_should_load_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070044{
Bin Mengc0aea6b2016-06-14 02:02:39 -070045 return true;
Simon Glass6854f872014-11-14 20:56:33 -070046}
47
48__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
49{
50 return vendev;
51}
52
Simon Glass3f4e1e82015-11-29 13:17:57 -070053static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glass6854f872014-11-14 20:56:33 -070054{
Simon Glass3f4e1e82015-11-29 13:17:57 -070055 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Simon Glass6854f872014-11-14 20:56:33 -070056 struct pci_rom_header *rom_header;
57 struct pci_rom_data *rom_data;
Simon Glass40305242014-12-29 19:32:23 -070058 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080059 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070060 u32 vendev;
61 u32 mapped_vendev;
62 u32 rom_address;
63
Simon Glass3f4e1e82015-11-29 13:17:57 -070064 vendev = pplat->vendor << 16 | pplat->device;
Simon Glass6854f872014-11-14 20:56:33 -070065 mapped_vendev = board_map_oprom_vendev(vendev);
66 if (vendev != mapped_vendev)
67 debug("Device ID mapped to %#08x\n", mapped_vendev);
68
Bin Meng786a08e2015-07-06 16:31:33 +080069#ifdef CONFIG_VGA_BIOS_ADDR
70 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070071#else
Simon Glass4a2708a2015-01-14 21:37:04 -070072
Simon Glass3f4e1e82015-11-29 13:17:57 -070073 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glass6854f872014-11-14 20:56:33 -070074 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
75 debug("%s: rom_address=%x\n", __func__, rom_address);
76 return -ENOENT;
77 }
78
79 /* Enable expansion ROM address decoding. */
Simon Glass3f4e1e82015-11-29 13:17:57 -070080 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
81 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glass6854f872014-11-14 20:56:33 -070082#endif
83 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080084 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070085
86 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -070087 le16_to_cpu(rom_header->signature),
88 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -070089
Simon Glass40305242014-12-29 19:32:23 -070090 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -070091 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -070092 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +080093#ifndef CONFIG_VGA_BIOS_ADDR
94 /* Disable expansion ROM address decoding */
Simon Glass3f4e1e82015-11-29 13:17:57 -070095 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Mengf110da92015-07-08 13:06:41 +080096#endif
Simon Glass6854f872014-11-14 20:56:33 -070097 return -EINVAL;
98 }
99
Simon Glass40305242014-12-29 19:32:23 -0700100 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
101 rom_vendor = le16_to_cpu(rom_data->vendor);
102 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700103
104 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700105 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700106
107 /* If the device id is mapped, a mismatch is expected */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700108 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700109 (vendev == mapped_vendev)) {
110 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700111 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700112 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700113 }
114
Bin Mengd57c2f22015-04-24 15:48:03 +0800115 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
116 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
117 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700118
Simon Glass3f4e1e82015-11-29 13:17:57 -0700119 if (pplat->class != rom_class) {
Bin Mengd57c2f22015-04-24 15:48:03 +0800120 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glass3f4e1e82015-11-29 13:17:57 -0700121 rom_class, pplat->class);
Simon Glass6854f872014-11-14 20:56:33 -0700122 }
123 *hdrp = rom_header;
124
125 return 0;
126}
127
Simon Glassd830b152016-01-15 05:23:22 -0700128/**
129 * pci_rom_load() - Load a ROM image and return a pointer to it
130 *
131 * @rom_header: Pointer to ROM image
132 * @ram_headerp: Returns a pointer to the image in RAM
133 * @allocedp: Returns true if @ram_headerp was allocated and needs
134 * to be freed
135 * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
136 * the error state. Even if this function returns an error, it may have
137 * allocated memory.
138 */
139static int pci_rom_load(struct pci_rom_header *rom_header,
140 struct pci_rom_header **ram_headerp, bool *allocedp)
Simon Glass6854f872014-11-14 20:56:33 -0700141{
142 struct pci_rom_data *rom_data;
143 unsigned int rom_size;
144 unsigned int image_size = 0;
145 void *target;
146
Simon Glassd830b152016-01-15 05:23:22 -0700147 *allocedp = false;
Simon Glass6854f872014-11-14 20:56:33 -0700148 do {
149 /* Get next image, until we see an x86 version */
150 rom_header = (struct pci_rom_header *)((void *)rom_header +
151 image_size);
152
153 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700154 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700155
Simon Glass40305242014-12-29 19:32:23 -0700156 image_size = le16_to_cpu(rom_data->ilen) * 512;
157 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700158
159 if (rom_data->type != 0)
160 return -EACCES;
161
162 rom_size = rom_header->size * 512;
163
Simon Glassbdc88d42014-12-29 19:32:24 -0700164#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700165 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700166#else
167 target = (void *)malloc(rom_size);
168 if (!target)
169 return -ENOMEM;
Simon Glassd830b152016-01-15 05:23:22 -0700170 *allocedp = true;
Simon Glassbdc88d42014-12-29 19:32:24 -0700171#endif
Simon Glass6854f872014-11-14 20:56:33 -0700172 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700173 ulong start = get_timer(0);
174
Simon Glass6854f872014-11-14 20:56:33 -0700175 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
176 rom_header, target, rom_size);
177 memcpy(target, rom_header, rom_size);
178 if (memcmp(target, rom_header, rom_size)) {
179 printf("VGA ROM copy failed\n");
180 return -EFAULT;
181 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700182 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700183 }
184 *ram_headerp = target;
185
186 return 0;
187}
188
Bin Meng153e1dd2015-08-13 00:29:16 -0700189struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700190
191int vbe_get_video_info(struct graphic_device *gdev)
192{
193#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
194 struct vesa_mode_info *vesa = &mode_info.vesa;
195
196 gdev->winSizeX = vesa->x_resolution;
197 gdev->winSizeY = vesa->y_resolution;
198
199 gdev->plnSizeX = vesa->x_resolution;
200 gdev->plnSizeY = vesa->y_resolution;
201
202 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
203
204 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800205 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700206 case 24:
207 gdev->gdfIndex = GDF_32BIT_X888RGB;
208 break;
209 case 16:
210 gdev->gdfIndex = GDF_16BIT_565RGB;
211 break;
212 default:
213 gdev->gdfIndex = GDF__8BIT_INDEX;
214 break;
215 }
216
217 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
218 gdev->pciBase = vesa->phys_base_ptr;
219
220 gdev->frameAdrs = vesa->phys_base_ptr;
221 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
222
223 gdev->vprBase = vesa->phys_base_ptr;
224 gdev->cprBase = vesa->phys_base_ptr;
225
Simon Glass23609c72015-01-01 16:18:00 -0700226 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700227#else
228 return -ENOSYS;
229#endif
230}
231
Bin Menga4520022015-07-06 16:31:36 +0800232void setup_video(struct screen_info *screen_info)
233{
Bin Menga4520022015-07-06 16:31:36 +0800234 struct vesa_mode_info *vesa = &mode_info.vesa;
235
Bin Meng1e7a0472015-07-30 03:49:13 -0700236 /* Sanity test on VESA parameters */
237 if (!vesa->x_resolution || !vesa->y_resolution)
238 return;
239
Bin Menga4520022015-07-06 16:31:36 +0800240 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
241
242 screen_info->lfb_width = vesa->x_resolution;
243 screen_info->lfb_height = vesa->y_resolution;
244 screen_info->lfb_depth = vesa->bits_per_pixel;
245 screen_info->lfb_linelength = vesa->bytes_per_scanline;
246 screen_info->lfb_base = vesa->phys_base_ptr;
247 screen_info->lfb_size =
248 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
249 65536);
250 screen_info->lfb_size >>= 16;
251 screen_info->red_size = vesa->red_mask_size;
252 screen_info->red_pos = vesa->red_mask_pos;
253 screen_info->green_size = vesa->green_mask_size;
254 screen_info->green_pos = vesa->green_mask_pos;
255 screen_info->blue_size = vesa->blue_mask_size;
256 screen_info->blue_pos = vesa->blue_mask_pos;
257 screen_info->rsvd_size = vesa->reserved_mask_size;
258 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800259}
260
Simon Glass3f4e1e82015-11-29 13:17:57 -0700261int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
262 int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700263{
Simon Glass3f4e1e82015-11-29 13:17:57 -0700264 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Andreas Bießmanned488992016-02-16 23:29:31 +0100265 struct pci_rom_header *rom = NULL, *ram = NULL;
Simon Glass6854f872014-11-14 20:56:33 -0700266 int vesa_mode = -1;
Simon Glassd830b152016-01-15 05:23:22 -0700267 bool emulate, alloced;
Simon Glass6854f872014-11-14 20:56:33 -0700268 int ret;
269
270 /* Only execute VGA ROMs */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700271 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
272 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glass6854f872014-11-14 20:56:33 -0700273 PCI_CLASS_DISPLAY_VGA);
274 return -ENODEV;
275 }
276
Bin Mengf698baa2016-06-14 02:02:40 -0700277 if (!board_should_load_oprom(dev))
Simon Glass6854f872014-11-14 20:56:33 -0700278 return -ENXIO;
279
Simon Glass3f4e1e82015-11-29 13:17:57 -0700280 ret = pci_rom_probe(dev, &rom);
Simon Glass6854f872014-11-14 20:56:33 -0700281 if (ret)
282 return ret;
283
Simon Glassd830b152016-01-15 05:23:22 -0700284 ret = pci_rom_load(rom, &ram, &alloced);
Simon Glass6854f872014-11-14 20:56:33 -0700285 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700286 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700287
Simon Glassd830b152016-01-15 05:23:22 -0700288 if (!board_should_run_oprom(dev)) {
289 ret = -ENXIO;
290 goto err;
291 }
Simon Glass6854f872014-11-14 20:56:33 -0700292
293#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
294 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
295 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
296#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700297 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700298
299 if (exec_method & PCI_ROM_USE_NATIVE) {
300#ifdef CONFIG_X86
301 emulate = false;
302#else
303 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
304 printf("BIOS native execution is only available on x86\n");
Simon Glassd830b152016-01-15 05:23:22 -0700305 ret = -ENOSYS;
306 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700307 }
308 emulate = true;
309#endif
310 } else {
311#ifdef CONFIG_BIOSEMU
312 emulate = true;
313#else
314 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
315 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
Simon Glassd830b152016-01-15 05:23:22 -0700316 ret = -ENOSYS;
317 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700318 }
319 emulate = false;
320#endif
321 }
322
Simon Glass6854f872014-11-14 20:56:33 -0700323 if (emulate) {
324#ifdef CONFIG_BIOSEMU
325 BE_VGAInfo *info;
326
Simon Glass72826722016-01-17 16:11:09 -0700327 ret = biosemu_setup(dev, &info);
Simon Glass6854f872014-11-14 20:56:33 -0700328 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700329 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700330 biosemu_set_interrupt_handler(0x15, int15_handler);
Simon Glass72826722016-01-17 16:11:09 -0700331 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
332 true, vesa_mode, &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700333 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700334 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700335#endif
336 } else {
337#ifdef CONFIG_X86
338 bios_set_interrupt_handler(0x15, int15_handler);
339
Simon Glass8beb0bd2015-11-29 13:17:58 -0700340 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
341 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700342#endif
343 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700344 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glassd830b152016-01-15 05:23:22 -0700345 ret = 0;
Simon Glass6854f872014-11-14 20:56:33 -0700346
Simon Glassd830b152016-01-15 05:23:22 -0700347err:
348 if (alloced)
349 free(ram);
350 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700351}
Simon Glassee87ee82016-10-05 20:42:17 -0600352
353#ifdef CONFIG_DM_VIDEO
Bin Meng5f6ad022016-10-09 04:14:15 -0700354int vbe_setup_video_priv(struct vesa_mode_info *vesa,
355 struct video_priv *uc_priv,
356 struct video_uc_platdata *plat)
Simon Glassee87ee82016-10-05 20:42:17 -0600357{
358 if (!vesa->x_resolution)
359 return -ENXIO;
360 uc_priv->xsize = vesa->x_resolution;
361 uc_priv->ysize = vesa->y_resolution;
362 switch (vesa->bits_per_pixel) {
363 case 32:
364 case 24:
365 uc_priv->bpix = VIDEO_BPP32;
366 break;
367 case 16:
368 uc_priv->bpix = VIDEO_BPP16;
369 break;
370 default:
371 return -EPROTONOSUPPORT;
372 }
373 plat->base = vesa->phys_base_ptr;
374 plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
375
376 return 0;
377}
378
379int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
380{
381 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
382 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
383 int ret;
384
Bin Mengf0920e42016-10-09 04:14:12 -0700385 printf("Video: ");
386
Simon Glassee87ee82016-10-05 20:42:17 -0600387 /* If we are running from EFI or coreboot, this can't work */
Bin Mengf0920e42016-10-09 04:14:12 -0700388 if (!ll_boot_init()) {
389 printf("Not available (previous bootloader prevents it)\n");
Simon Glassee87ee82016-10-05 20:42:17 -0600390 return -EPERM;
Bin Mengf0920e42016-10-09 04:14:12 -0700391 }
Simon Glassee87ee82016-10-05 20:42:17 -0600392 bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
393 ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
394 PCI_ROM_ALLOW_FALLBACK);
395 bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
396 if (ret) {
397 debug("failed to run video BIOS: %d\n", ret);
398 return ret;
399 }
400
401 ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
402 if (ret) {
403 debug("No video mode configured\n");
404 return ret;
405 }
406
Bin Mengf0920e42016-10-09 04:14:12 -0700407 printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
408 mode_info.vesa.bits_per_pixel);
409
Simon Glassee87ee82016-10-05 20:42:17 -0600410 return 0;
411}
412#endif