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Ian Campbell2c7e3b92014-10-24 21:20:44 +01001if ARCH_SUNXI
2
Hans de Goede44d8ae52015-04-06 20:33:34 +02003# Note only one of these may be selected at a time! But hidden choices are
4# not supported by Kconfig
5config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
Ian Campbell2c7e3b92014-10-24 21:20:44 +010019choice
20 prompt "Sunxi SoC Variant"
Joe Hershbergera26cd042015-05-12 14:46:23 -050021 optional
Ian Campbell2c7e3b92014-10-24 21:20:44 +010022
Ian Campbellc3be2792014-10-24 21:20:45 +010023config MACH_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010024 bool "sun4i (Allwinner A10)"
25 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020026 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010027 select SUPPORT_SPL
28
Ian Campbellc3be2792014-10-24 21:20:45 +010029config MACH_SUN5I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010030 bool "sun5i (Allwinner A13)"
31 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020032 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010033 select SUPPORT_SPL
34
Ian Campbellc3be2792014-10-24 21:20:45 +010035config MACH_SUN6I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010036 bool "sun6i (Allwinner A31)"
37 select CPU_V7
Chen-Yu Tsaicc08ea42015-05-28 21:25:32 +080038 select CPU_V7_HAS_NONSEC
39 select CPU_V7_HAS_VIRT
Hans de Goede44d8ae52015-04-06 20:33:34 +020040 select SUNXI_GEN_SUN6I
Hans de Goede8c2c9cf2014-10-25 20:18:10 +020041 select SUPPORT_SPL
Chen-Yu Tsaicc08ea42015-05-28 21:25:32 +080042 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbell2c7e3b92014-10-24 21:20:44 +010043
Ian Campbellc3be2792014-10-24 21:20:45 +010044config MACH_SUN7I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010045 bool "sun7i (Allwinner A20)"
46 select CPU_V7
Hans de Goedeea624e12014-11-14 09:34:30 +010047 select CPU_V7_HAS_NONSEC
48 select CPU_V7_HAS_VIRT
Hans de Goede44d8ae52015-04-06 20:33:34 +020049 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010050 select SUPPORT_SPL
Hans de Goedeb366fb92014-10-24 20:12:04 +020051 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbell2c7e3b92014-10-24 21:20:44 +010052
Hans de Goede5e6bacd2015-04-06 20:55:39 +020053config MACH_SUN8I_A23
Ian Campbell2c7e3b92014-10-24 21:20:44 +010054 bool "sun8i (Allwinner A23)"
55 select CPU_V7
Chen-Yu Tsai014414f2015-05-28 21:25:34 +080056 select CPU_V7_HAS_NONSEC
57 select CPU_V7_HAS_VIRT
Hans de Goede44d8ae52015-04-06 20:33:34 +020058 select SUNXI_GEN_SUN6I
Hans de Goede08fd1472014-12-07 14:34:27 +010059 select SUPPORT_SPL
Chen-Yu Tsai014414f2015-05-28 21:25:34 +080060 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbell2c7e3b92014-10-24 21:20:44 +010061
Vishnu Patekar8c3dacf2015-03-01 23:47:48 +053062config MACH_SUN8I_A33
63 bool "sun8i (Allwinner A33)"
64 select CPU_V7
Chen-Yu Tsai014414f2015-05-28 21:25:34 +080065 select CPU_V7_HAS_NONSEC
66 select CPU_V7_HAS_VIRT
Vishnu Patekar8c3dacf2015-03-01 23:47:48 +053067 select SUNXI_GEN_SUN6I
68 select SUPPORT_SPL
Chen-Yu Tsai014414f2015-05-28 21:25:34 +080069 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Vishnu Patekar8c3dacf2015-03-01 23:47:48 +053070
Hans de Goede1871a8c2015-01-13 19:25:06 +010071config MACH_SUN9I
72 bool "sun9i (Allwinner A80)"
73 select CPU_V7
74 select SUNXI_GEN_SUN6I
75
Ian Campbell2c7e3b92014-10-24 21:20:44 +010076endchoice
Maxime Ripard8a6564d2014-10-03 20:16:29 +080077
Hans de Goede5e6bacd2015-04-06 20:55:39 +020078# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
79config MACH_SUN8I
80 bool
81 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
82
83
Hans de Goede37781a12014-11-15 19:46:39 +010084config DRAM_CLK
Hans de Goede8ffc4872015-01-17 14:24:55 +010085 int "sunxi dram clock speed"
86 default 312 if MACH_SUN6I || MACH_SUN8I
87 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +010088 ---help---
89 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goedee1a08882015-01-25 11:29:27 +010090 of 24.
Hans de Goede37781a12014-11-15 19:46:39 +010091
Siarhei Siamashka47e35012015-02-01 00:27:06 +020092if MACH_SUN5I || MACH_SUN7I
93config DRAM_MBUS_CLK
94 int "sunxi mbus clock speed"
95 default 300
96 ---help---
97 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
98
99endif
100
Hans de Goede37781a12014-11-15 19:46:39 +0100101config DRAM_ZQ
Hans de Goede8ffc4872015-01-17 14:24:55 +0100102 int "sunxi dram zq value"
103 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
104 default 127 if MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +0100105 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +0100106 Set the dram zq value.
Hans de Goede37781a12014-11-15 19:46:39 +0100107
Hans de Goede8975cdf2015-05-13 15:00:46 +0200108config DRAM_ODT_EN
109 bool "sunxi dram odt enable"
110 default n if !MACH_SUN8I_A23
111 default y if MACH_SUN8I_A23
112 ---help---
113 Select this to enable dram odt (on die termination).
114
Hans de Goede8ffc4872015-01-17 14:24:55 +0100115if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
116config DRAM_EMR1
117 int "sunxi dram emr1 value"
118 default 0 if MACH_SUN4I
119 default 4 if MACH_SUN5I || MACH_SUN7I
120 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +0100121 Set the dram controller emr1 value.
Siarhei Siamashkad1336472015-02-01 00:27:05 +0200122
Siarhei Siamashka47e35012015-02-01 00:27:06 +0200123config DRAM_TPR3
124 hex "sunxi dram tpr3 value"
125 default 0
126 ---help---
127 Set the dram controller tpr3 parameter. This parameter configures
128 the delay on the command lane and also phase shifts, which are
129 applied for sampling incoming read data. The default value 0
130 means that no phase/delay adjustments are necessary. Properly
131 configuring this parameter increases reliability at high DRAM
132 clock speeds.
133
134config DRAM_DQS_GATING_DELAY
135 hex "sunxi dram dqs_gating_delay value"
136 default 0
137 ---help---
138 Set the dram controller dqs_gating_delay parmeter. Each byte
139 encodes the DQS gating delay for each byte lane. The delay
140 granularity is 1/4 cycle. For example, the value 0x05060606
141 means that the delay is 5 quarter-cycles for one lane (1.25
142 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
143 The default value 0 means autodetection. The results of hardware
144 autodetection are not very reliable and depend on the chip
145 temperature (sometimes producing different results on cold start
146 and warm reboot). But the accuracy of hardware autodetection
147 is usually good enough, unless running at really high DRAM
148 clocks speeds (up to 600MHz). If unsure, keep as 0.
149
Siarhei Siamashkad1336472015-02-01 00:27:05 +0200150choice
151 prompt "sunxi dram timings"
152 default DRAM_TIMINGS_VENDOR_MAGIC
153 ---help---
154 Select the timings of the DDR3 chips.
155
156config DRAM_TIMINGS_VENDOR_MAGIC
157 bool "Magic vendor timings from Android"
158 ---help---
159 The same DRAM timings as in the Allwinner boot0 bootloader.
160
161config DRAM_TIMINGS_DDR3_1066F_1333H
162 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
163 ---help---
164 Use the timings of the standard JEDEC DDR3-1066F speed bin for
165 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
166 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
167 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
168 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
169 that down binning to DDR3-1066F is supported (because DDR3-1066F
170 uses a bit faster timings than DDR3-1333H).
171
172config DRAM_TIMINGS_DDR3_800E_1066G_1333J
173 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
174 ---help---
175 Use the timings of the slowest possible JEDEC speed bin for the
176 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
177 DDR3-800E, DDR3-1066G or DDR3-1333J.
178
179endchoice
180
Hans de Goede37781a12014-11-15 19:46:39 +0100181endif
182
Hans de Goede8975cdf2015-05-13 15:00:46 +0200183if MACH_SUN8I_A23
184config DRAM_ODT_CORRECTION
185 int "sunxi dram odt correction value"
186 default 0
187 ---help---
188 Set the dram odt correction value (range -255 - 255). In allwinner
189 fex files, this option is found in bits 8-15 of the u32 odt_en variable
190 in the [dram] section. When bit 31 of the odt_en variable is set
191 then the correction is negative. Usually the value for this is 0.
192endif
193
Iain Patone71b4222015-03-28 10:26:38 +0000194config SYS_CLK_FREQ
195 default 912000000 if MACH_SUN7I
196 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
197
Maxime Ripard8a6564d2014-10-03 20:16:29 +0800198config SYS_CONFIG_NAME
Ian Campbellc3be2792014-10-24 21:20:45 +0100199 default "sun4i" if MACH_SUN4I
200 default "sun5i" if MACH_SUN5I
201 default "sun6i" if MACH_SUN6I
202 default "sun7i" if MACH_SUN7I
203 default "sun8i" if MACH_SUN8I
Hans de Goede1871a8c2015-01-13 19:25:06 +0100204 default "sun9i" if MACH_SUN9I
Hans de Goede6ae66f22014-08-01 09:28:24 +0200205
Masahiro Yamadadd840582014-07-30 14:08:14 +0900206config SYS_BOARD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900207 default "sunxi"
208
209config SYS_SOC
Masahiro Yamadadd840582014-07-30 14:08:14 +0900210 default "sunxi"
211
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200212config UART0_PORT_F
213 bool "UART0 on MicroSD breakout board"
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200214 default n
215 ---help---
216 Repurpose the SD card slot for getting access to the UART0 serial
217 console. Primarily useful only for low level u-boot debugging on
218 tablets, where normal UART0 is difficult to access and requires
219 device disassembly and/or soldering. As the SD card can't be used
220 at the same time, the system can be only booted in the FEL mode.
221 Only enable this if you really know what you are doing.
222
Hans de Goedeaccc9e42014-10-22 14:56:36 +0200223config OLD_SUNXI_KERNEL_COMPAT
224 boolean "Enable workarounds for booting old kernels"
225 default n
226 ---help---
227 Set this to enable various workarounds for old kernels, this results in
228 sub-optimal settings for newer kernels, only enable if needed.
229
Hans de Goedecd821132014-10-02 20:29:26 +0200230config MMC0_CD_PIN
231 string "Card detect pin for mmc0"
232 default ""
233 ---help---
234 Set the card detect pin for mmc0, leave empty to not use cd. This
235 takes a string in the format understood by sunxi_name_to_gpio, e.g.
236 PH1 for pin 1 of port H.
237
238config MMC1_CD_PIN
239 string "Card detect pin for mmc1"
240 default ""
241 ---help---
242 See MMC0_CD_PIN help text.
243
244config MMC2_CD_PIN
245 string "Card detect pin for mmc2"
246 default ""
247 ---help---
248 See MMC0_CD_PIN help text.
249
250config MMC3_CD_PIN
251 string "Card detect pin for mmc3"
252 default ""
253 ---help---
254 See MMC0_CD_PIN help text.
255
Paul Kocialkowski8deacca2015-03-22 18:12:23 +0100256config MMC1_PINS
257 string "Pins for mmc1"
258 default ""
259 ---help---
260 Set the pins used for mmc1, when applicable. This takes a string in the
261 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
262
263config MMC2_PINS
264 string "Pins for mmc2"
265 default ""
266 ---help---
267 See MMC1_PINS help text.
268
269config MMC3_PINS
270 string "Pins for mmc3"
271 default ""
272 ---help---
273 See MMC1_PINS help text.
274
Hans de Goede2ccfac02014-10-02 20:43:50 +0200275config MMC_SUNXI_SLOT_EXTRA
276 int "mmc extra slot number"
277 default -1
278 ---help---
279 sunxi builds always enable mmc0, some boards also have a second sdcard
280 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
281 support for this.
282
Hans de Goede4458b7a2015-01-07 15:26:06 +0100283config USB0_VBUS_PIN
284 string "Vbus enable pin for usb0 (otg)"
285 default ""
286 ---help---
287 Set the Vbus enable pin for usb0 (otg). This takes a string in the
288 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
289
Hans de Goede52defe82015-02-16 22:13:43 +0100290config USB0_VBUS_DET
291 string "Vbus detect pin for usb0 (otg)"
Hans de Goede52defe82015-02-16 22:13:43 +0100292 default ""
293 ---help---
294 Set the Vbus detect pin for usb0 (otg). This takes a string in the
295 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
296
Hans de Goede48c06c92015-06-14 17:29:53 +0200297config USB0_ID_DET
298 string "ID detect pin for usb0 (otg)"
299 default ""
300 ---help---
301 Set the ID detect pin for usb0 (otg). This takes a string in the
302 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
303
Hans de Goede115200c2014-11-07 16:09:00 +0100304config USB1_VBUS_PIN
305 string "Vbus enable pin for usb1 (ehci0)"
306 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100307 default "PH27" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100308 ---help---
309 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
310 a string in the format understood by sunxi_name_to_gpio, e.g.
311 PH1 for pin 1 of port H.
312
313config USB2_VBUS_PIN
314 string "Vbus enable pin for usb2 (ehci1)"
315 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100316 default "PH24" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100317 ---help---
318 See USB1_VBUS_PIN help text.
319
Paul Kocialkowski6c739c52015-04-10 23:09:52 +0200320config I2C0_ENABLE
321 bool "Enable I2C/TWI controller 0"
322 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
323 default n if MACH_SUN6I || MACH_SUN8I
324 ---help---
325 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
326 its clock and setting up the bus. This is especially useful on devices
327 with slaves connected to the bus or with pins exposed through e.g. an
328 expansion port/header.
329
330config I2C1_ENABLE
331 bool "Enable I2C/TWI controller 1"
332 default n
333 ---help---
334 See I2C0_ENABLE help text.
335
336config I2C2_ENABLE
337 bool "Enable I2C/TWI controller 2"
338 default n
339 ---help---
340 See I2C0_ENABLE help text.
341
342if MACH_SUN6I || MACH_SUN7I
343config I2C3_ENABLE
344 bool "Enable I2C/TWI controller 3"
345 default n
346 ---help---
347 See I2C0_ENABLE help text.
348endif
349
350if MACH_SUN7I
351config I2C4_ENABLE
352 bool "Enable I2C/TWI controller 4"
353 default n
354 ---help---
355 See I2C0_ENABLE help text.
356endif
357
Hans de Goede2fcf0332015-04-25 17:25:14 +0200358config AXP_GPIO
359 boolean "Enable support for gpio-s on axp PMICs"
360 default n
361 ---help---
362 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
363
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200364config VIDEO
Hans de Goede2dae8002014-12-21 16:28:32 +0100365 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200366 default y
367 ---help---
Hans de Goede2dae8002014-12-21 16:28:32 +0100368 Say Y here to add support for using a cfb console on the HDMI, LCD
369 or VGA output found on most sunxi devices. See doc/README.video for
370 info on how to select the video output and mode.
371
Hans de Goede2fbf0912014-12-23 23:04:35 +0100372config VIDEO_HDMI
373 boolean "HDMI output support"
374 depends on VIDEO && !MACH_SUN8I
375 default y
376 ---help---
377 Say Y here to add support for outputting video over HDMI.
378
Hans de Goeded9786d22014-12-25 13:58:06 +0100379config VIDEO_VGA
380 boolean "VGA output support"
381 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
382 default n
383 ---help---
384 Say Y here to add support for outputting video over VGA.
385
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100386config VIDEO_VGA_VIA_LCD
387 boolean "VGA via LCD controller support"
Chen-Yu Tsai2583d5b2015-01-12 18:02:10 +0800388 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100389 default n
390 ---help---
391 Say Y here to add support for external DACs connected to the parallel
392 LCD interface driving a VGA connector, such as found on the
393 Olimex A13 boards.
394
Hans de Goedefb75d972015-01-25 15:33:07 +0100395config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
396 boolean "Force sync active high for VGA via LCD controller support"
397 depends on VIDEO_VGA_VIA_LCD
398 default n
399 ---help---
400 Say Y here if you've a board which uses opendrain drivers for the vga
401 hsync and vsync signals. Opendrain drivers cannot generate steep enough
402 positive edges for a stable video output, so on boards with opendrain
403 drivers the sync signals must always be active high.
404
Chen-Yu Tsai507e27d2015-01-12 18:02:11 +0800405config VIDEO_VGA_EXTERNAL_DAC_EN
406 string "LCD panel power enable pin"
407 depends on VIDEO_VGA_VIA_LCD
408 default ""
409 ---help---
410 Set the enable pin for the external VGA DAC. This takes a string in the
411 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
412
Hans de Goede2dae8002014-12-21 16:28:32 +0100413config VIDEO_LCD_MODE
414 string "LCD panel timing details"
415 depends on VIDEO
416 default ""
417 ---help---
418 LCD panel timing details string, leave empty if there is no LCD panel.
419 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
420 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
421
Hans de Goede65150322015-01-13 13:21:46 +0100422config VIDEO_LCD_DCLK_PHASE
423 int "LCD panel display clock phase"
424 depends on VIDEO
425 default 1
426 ---help---
427 Select LCD panel display clock phase shift, range 0-3.
428
Hans de Goede2dae8002014-12-21 16:28:32 +0100429config VIDEO_LCD_POWER
430 string "LCD panel power enable pin"
431 depends on VIDEO
432 default ""
433 ---help---
434 Set the power enable pin for the LCD panel. This takes a string in the
435 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
436
Hans de Goede242e3d82015-02-16 17:26:41 +0100437config VIDEO_LCD_RESET
438 string "LCD panel reset pin"
439 depends on VIDEO
440 default ""
441 ---help---
442 Set the reset pin for the LCD panel. This takes a string in the format
443 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
444
Hans de Goede2dae8002014-12-21 16:28:32 +0100445config VIDEO_LCD_BL_EN
446 string "LCD panel backlight enable pin"
447 depends on VIDEO
448 default ""
449 ---help---
450 Set the backlight enable pin for the LCD panel. This takes a string in the
451 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
452 port H.
453
454config VIDEO_LCD_BL_PWM
455 string "LCD panel backlight pwm pin"
456 depends on VIDEO
457 default ""
458 ---help---
459 Set the backlight pwm pin for the LCD panel. This takes a string in the
460 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200461
Hans de Goedea7403ae2015-01-22 21:02:42 +0100462config VIDEO_LCD_BL_PWM_ACTIVE_LOW
463 bool "LCD panel backlight pwm is inverted"
464 depends on VIDEO
465 default y
466 ---help---
467 Set this if the backlight pwm output is active low.
468
Hans de Goede55410082015-02-16 17:23:25 +0100469config VIDEO_LCD_PANEL_I2C
470 bool "LCD panel needs to be configured via i2c"
471 depends on VIDEO
Hans de Goede1fc42012015-03-07 12:00:02 +0100472 default n
Hans de Goede55410082015-02-16 17:23:25 +0100473 ---help---
474 Say y here if the LCD panel needs to be configured via i2c. This
475 will add a bitbang i2c controller using gpios to talk to the LCD.
476
477config VIDEO_LCD_PANEL_I2C_SDA
478 string "LCD panel i2c interface SDA pin"
479 depends on VIDEO_LCD_PANEL_I2C
480 default "PG12"
481 ---help---
482 Set the SDA pin for the LCD i2c interface. This takes a string in the
483 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
484
485config VIDEO_LCD_PANEL_I2C_SCL
486 string "LCD panel i2c interface SCL pin"
487 depends on VIDEO_LCD_PANEL_I2C
488 default "PG10"
489 ---help---
490 Set the SCL pin for the LCD i2c interface. This takes a string in the
491 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
492
Hans de Goede213480e2015-01-01 22:04:34 +0100493
494# Note only one of these may be selected at a time! But hidden choices are
495# not supported by Kconfig
496config VIDEO_LCD_IF_PARALLEL
497 bool
498
499config VIDEO_LCD_IF_LVDS
500 bool
501
502
503choice
504 prompt "LCD panel support"
505 depends on VIDEO
506 ---help---
507 Select which type of LCD panel to support.
508
509config VIDEO_LCD_PANEL_PARALLEL
510 bool "Generic parallel interface LCD panel"
511 select VIDEO_LCD_IF_PARALLEL
512
513config VIDEO_LCD_PANEL_LVDS
514 bool "Generic lvds interface LCD panel"
515 select VIDEO_LCD_IF_LVDS
516
Siarhei Siamashka97ece832015-01-19 05:23:33 +0200517config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
518 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
519 select VIDEO_LCD_SSD2828
520 select VIDEO_LCD_IF_PARALLEL
521 ---help---
522 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
523
Hans de Goede27515b22015-01-20 09:23:36 +0100524config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
525 bool "Hitachi tx18d42vm LCD panel"
526 select VIDEO_LCD_HITACHI_TX18D42VM
527 select VIDEO_LCD_IF_LVDS
528 ---help---
529 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
530
Hans de Goedeaad2ac22015-02-16 17:49:47 +0100531config VIDEO_LCD_TL059WV5C0
532 bool "tl059wv5c0 LCD panel"
533 select VIDEO_LCD_PANEL_I2C
534 select VIDEO_LCD_IF_PARALLEL
535 ---help---
536 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
537 Aigo M60/M608/M606 tablets.
538
Hans de Goede213480e2015-01-01 22:04:34 +0100539endchoice
540
541
Hans de Goede1a800f72015-01-11 17:17:00 +0100542config USB_MUSB_SUNXI
543 bool "Enable sunxi OTG / DRC USB controller in host mode"
544 default n
545 ---help---
546 Say y here to enable support for the sunxi OTG / DRC USB controller
547 used on almost all sunxi boards. Note currently u-boot can only have
548 one usb host controller enabled at a time, so enabling this on boards
549 which also use the ehci host controller will result in build errors.
550
Hans de Goede86b49092014-09-18 21:03:34 +0200551config USB_KEYBOARD
552 boolean "Enable USB keyboard support"
553 default y
554 ---help---
555 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede2dae8002014-12-21 16:28:32 +0100556 in combination with a graphical console).
Hans de Goede86b49092014-09-18 21:03:34 +0200557
Hans de Goedec13f60d2015-01-25 12:10:48 +0100558config GMAC_TX_DELAY
559 int "GMAC Transmit Clock Delay Chain"
560 default 0
561 ---help---
562 Set the GMAC Transmit Clock Delay Chain value.
563
Masahiro Yamadadd840582014-07-30 14:08:14 +0900564endif