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Lokesh Vutla00b34e92018-11-02 19:51:09 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Nishanth Menona94a4072023-11-01 15:56:03 -05003 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla00b34e92018-11-02 19:51:09 +05304 */
5
6/dts-v1/;
7
Bryan Brattlofe72ece52023-12-29 11:47:03 -06008#include "k3-am654-base-board.dts"
9#include "k3-am654-base-board-u-boot.dtsi"
James Doublesind5e08fd2019-10-07 14:04:25 +053010#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
Lokesh Vutla00b34e92018-11-02 19:51:09 +053011#include "k3-am654-ddr.dtsi"
12
13/ {
Lokesh Vutla00b34e92018-11-02 19:51:09 +053014 aliases {
Bryan Brattlofb53f1902023-12-29 11:47:00 -060015 remoteproc0 = &sysctrler;
16 remoteproc1 = &a53_0;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053017 };
18
Lokesh Vutla00b34e92018-11-02 19:51:09 +053019 a53_0: a53@0 {
20 compatible = "ti,am654-rproc";
21 reg = <0x0 0x00a90000 0x0 0x10>;
Lokesh Vutla355be912019-06-07 19:24:47 +053022 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
23 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053024 resets = <&k3_reset 202 0>;
Nishanth Menon965db9f2021-01-06 13:20:31 -060025 clocks = <&k3_clks 61 0>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053026 assigned-clocks = <&k3_clks 202 0>;
27 assigned-clock-rates = <800000000>;
28 ti,sci = <&dmsc>;
29 ti,sci-proc-id = <32>;
30 ti,sci-host-id = <10>;
Simon Glass8c103c32023-02-13 08:56:33 -070031 bootph-pre-ram;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053032 };
Bryan Brattlofe0556222023-12-29 11:47:21 -060033
34 clk_200mhz: dummy_clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <200000000>;
38 bootph-pre-ram;
39 };
Lokesh Vutla00b34e92018-11-02 19:51:09 +053040};
41
Bryan Brattlof4aea5362023-12-29 11:47:22 -060042&secure_proxy_mcu {
43 status = "okay";
44 bootph-pre-ram;
Bryan Brattlofb53f1902023-12-29 11:47:00 -060045};
46
Lokesh Vutla00b34e92018-11-02 19:51:09 +053047&cbass_wakeup {
48 sysctrler: sysctrler {
49 compatible = "ti,am654-system-controller";
Bryan Brattlof4aea5362023-12-29 11:47:22 -060050 mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053051 mbox-names = "tx", "rx";
Simon Glass8c103c32023-02-13 08:56:33 -070052 bootph-pre-ram;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053053 };
Lokesh Vutla00b34e92018-11-02 19:51:09 +053054};
55
Bryan Brattlof7cf2fa82023-12-29 11:47:06 -060056/*
57 * timer init is called as part of rproc_start() while
58 * starting System Firmware, so any clock/power-domain
59 * operations will fail as SYSFW is not yet up and running.
60 * Delete all clock/power-domain properties to avoid
61 * timer init failure.
62 * This is an always on timer at 20MHz.
63 */
64&mcu_timer0 {
65 /delete-property/ clocks;
66 /delete-property/ assigned-clocks;
67 /delete-property/ assigned-clock-parents;
68 /delete-property/ power-domains;
69};
70
Lokesh Vutla00b34e92018-11-02 19:51:09 +053071&dmsc {
Bryan Brattlof4aea5362023-12-29 11:47:22 -060072 mboxes = <&secure_proxy_mcu 8>,
73 <&secure_proxy_mcu 6>,
74 <&secure_proxy_mcu 5>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053075 mbox-names = "tx", "rx", "notify";
76 ti,host-id = <4>;
77 ti,secure-host;
78};
79
80&wkup_uart0 {
Lokesh Vutla00b34e92018-11-02 19:51:09 +053081 status = "okay";
Bryan Brattlofb65ea692023-12-29 11:47:02 -060082 bootph-pre-ram;
Lokesh Vutla00b34e92018-11-02 19:51:09 +053083};
84
Andreas Dannenberg20a22962019-08-15 15:55:30 -050085&mcu_uart0 {
Andreas Dannenberg20a22962019-08-15 15:55:30 -050086 clock-frequency = <48000000>;
Lokesh Vutlae4978762021-02-01 11:26:39 +053087 /delete-property/ power-domains;
Andreas Dannenberg20a22962019-08-15 15:55:30 -050088 status = "okay";
Bryan Brattlofb65ea692023-12-29 11:47:02 -060089 bootph-pre-ram;
Andreas Dannenberg20a22962019-08-15 15:55:30 -050090};
91
Tero Kristo56adc662019-10-24 15:00:57 +053092&wkup_vtm0 {
Lokesh Vutlae4978762021-02-01 11:26:39 +053093 compatible = "ti,am654-vtm", "ti,am654-avs";
Tero Kristo56adc662019-10-24 15:00:57 +053094 vdd-supply-3 = <&vdd_mpu>;
95 vdd-supply-4 = <&vdd_mpu>;
Tero Kristo56adc662019-10-24 15:00:57 +053096};
97
Lokesh Vutla00b34e92018-11-02 19:51:09 +053098&memorycontroller {
99 vtt-supply = <&vtt_supply>;
Lokesh Vutla00b34e92018-11-02 19:51:09 +0530100};
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530101
Bryan Brattlof52d87ef2023-12-29 11:47:12 -0600102/*
103 * MMC is probed to pull in firmware, so any clock
104 * or power-domain operation will fail as we do not
105 * have the firmware running at this point. Delete the
106 * power-domain properties to avoid making calls to
107 * SYSFW before it is loaded. Public ROM has already
108 * set it up for us anyway.
109 */
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530110&sdhci0 {
111 clock-names = "clk_xin";
112 clocks = <&clk_200mhz>;
113 /delete-property/ power-domains;
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530114};
115
Bryan Brattlof7f66ec52023-12-29 11:47:13 -0600116/*
117 * MMC is probed to pull in firmware, so any clock
118 * or power-domain operation will fail as we do not
119 * have the firmware running at this point. Delete the
120 * power-domain properties to avoid making calls to
121 * SYSFW before it is loaded. Public ROM has already
122 * set it up for us anyway.
123 */
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530124&sdhci1 {
125 clock-names = "clk_xin";
126 clocks = <&clk_200mhz>;
127 /delete-property/ power-domains;
128};
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500129
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530130&ospi0 {
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530131 reg = <0x0 0x47040000 0x0 0x100>,
132 <0x0 0x50000000 0x0 0x8000000>;
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530133};
Faiz Abbas5251eb12020-08-03 11:35:11 +0530134
Faiz Abbas5251eb12020-08-03 11:35:11 +0530135&dwc3_0 {
136 status = "okay";
Aswath Govindraju750d8472022-05-18 16:49:12 +0530137 /delete-property/ clocks;
Faiz Abbas5251eb12020-08-03 11:35:11 +0530138 /delete-property/ power-domains;
139 /delete-property/ assigned-clocks;
140 /delete-property/ assigned-clock-parents;
141};
142
Bryan Brattlofb53f1902023-12-29 11:47:00 -0600143&mcu_cpsw {
144 reg = <0x0 0x46000000 0x0 0x200000>,
145 <0x0 0x40f00200 0x0 0x2>;
146 reg-names = "cpsw_nuss", "mac_efuse";
147 /delete-property/ ranges;
148
149 cpsw-phy-sel@40f04040 {
150 compatible = "ti,am654-cpsw-phy-sel";
151 reg= <0x0 0x40f04040 0x0 0x4>;
152 reg-names = "gmii-sel";
153 };
154};
155
156&usb1 {
157 dr_mode = "peripheral";
158};