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Adam Ford5bbc2652017-08-07 17:37:18 -04001
2menuconfig NAND
3 bool "NAND Device Support"
4if NAND
Masahiro Yamada4b0abf92014-10-03 19:21:03 +09005
Masahiro Yamada65e41452014-11-13 20:31:50 +09006config SYS_NAND_SELF_INIT
7 bool
8 help
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
11
Masahiro Yamada4b0abf92014-10-03 19:21:03 +090012config NAND_DENALI
Masahiro Yamadadc774e62017-12-06 13:51:50 +090013 bool
Masahiro Yamada65e41452014-11-13 20:31:50 +090014 select SYS_NAND_SELF_INIT
Tom Rini8f1a80e2017-07-28 21:31:42 -040015 imply CMD_NAND
Masahiro Yamada4b0abf92014-10-03 19:21:03 +090016
Masahiro Yamada1d9654d2017-08-26 01:12:31 +090017config NAND_DENALI_DT
18 bool "Support Denali NAND controller as a DT device"
Masahiro Yamadadc774e62017-12-06 13:51:50 +090019 select NAND_DENALI
20 depends on OF_CONTROL && DM
Masahiro Yamada1d9654d2017-08-26 01:12:31 +090021 help
22 Enable the driver for NAND flash on platforms using a Denali NAND
23 controller as a DT device.
24
Masahiro Yamada4b0abf92014-10-03 19:21:03 +090025config NAND_DENALI_SPARE_AREA_SKIP_BYTES
26 int "Number of bytes skipped in OOB area"
27 depends on NAND_DENALI
28 range 0 63
29 help
30 This option specifies the number of bytes to skip from the beginning
31 of OOB area before last ECC sector data starts. This is potentially
32 used to preserve the bad block marker in the OOB area.
33
Adam Ford0a9ef452017-10-16 14:08:26 -050034config NAND_OMAP_GPMC
35 bool "Support OMAP GPMC NAND controller"
36 depends on ARCH_OMAP2PLUS
37 help
38 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
39 GPMC controller is used for parallel NAND flash devices, and can
40 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
41 and BCH16 ECC algorithms.
42
43config NAND_OMAP_GPMC_PREFETCH
44 bool "Enable GPMC Prefetch"
45 depends on NAND_OMAP_GPMC
Tom Rini39e70962017-10-20 16:55:51 -040046 default y
Adam Ford0a9ef452017-10-16 14:08:26 -050047 help
48 On OMAP platforms that use the GPMC controller
49 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
50 uses the prefetch mode to speed up read operations.
51
52config NAND_OMAP_ELM
53 bool "Enable ELM driver for OMAPxx and AMxx platforms."
54 depends on NAND_OMAP_GPMC && !OMAP34XX
55 help
56 ELM controller is used for ECC error detection (not ECC calculation)
57 of BCH4, BCH8 and BCH16 ECC algorithms.
58 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
59 thus such SoC platforms need to depend on software library for ECC error
60 detection. However ECC calculation on such plaforms would still be
61 done by GPMC controller.
62
Stefan Agner55191942015-05-08 19:07:11 +020063config NAND_VF610_NFC
Heiko Schocher064b55c2017-06-14 05:49:40 +020064 bool "Support for Freescale NFC for VF610"
Stefan Agner55191942015-05-08 19:07:11 +020065 select SYS_NAND_SELF_INIT
Tom Rini8f1a80e2017-07-28 21:31:42 -040066 imply CMD_NAND
Stefan Agner55191942015-05-08 19:07:11 +020067 help
68 Enables support for NAND Flash Controller on some Freescale
Heiko Schocher064b55c2017-06-14 05:49:40 +020069 processors like the VF610, MCF54418 or Kinetis K70.
Stefan Agner55191942015-05-08 19:07:11 +020070 The driver supports a maximum 2k page size. The driver
71 currently does not support hardware ECC.
72
Stefan Agner080a71e2015-05-08 19:07:12 +020073choice
74 prompt "Hardware ECC strength"
75 depends on NAND_VF610_NFC
76 default SYS_NAND_VF610_NFC_45_ECC_BYTES
77 help
78 Select the ECC strength used in the hardware BCH ECC block.
79
80config SYS_NAND_VF610_NFC_45_ECC_BYTES
81 bool "24-error correction (45 ECC bytes)"
82
83config SYS_NAND_VF610_NFC_60_ECC_BYTES
84 bool "32-error correction (60 ECC bytes)"
85
86endchoice
87
Stefan Roese873960c2015-07-23 10:26:16 +020088config NAND_PXA3XX
89 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
90 select SYS_NAND_SELF_INIT
Tom Rini8f1a80e2017-07-28 21:31:42 -040091 imply CMD_NAND
Stefan Roese873960c2015-07-23 10:26:16 +020092 help
93 This enables the driver for the NAND flash device found on
94 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
95
Hans de Goedee5268612015-08-16 14:48:22 +020096config NAND_SUNXI
Boris Brezillon4ccae812016-06-15 21:09:23 +020097 bool "Support for NAND on Allwinner SoCs"
Miquel Raynalb56052f2018-02-28 20:52:00 +010098 default ARCH_SUNXI
Miquel Raynal663e8a92018-02-28 20:51:57 +010099 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
Hans de Goedee5268612015-08-16 14:48:22 +0200100 select SYS_NAND_SELF_INIT
Maxime Ripard5fe4c9f2017-02-27 18:22:08 +0100101 select SYS_NAND_U_BOOT_LOCATIONS
Miquel Raynal6d094d52018-02-28 20:51:59 +0100102 select SPL_NAND_SUPPORT
Tom Rini8f1a80e2017-07-28 21:31:42 -0400103 imply CMD_NAND
Hans de Goedee5268612015-08-16 14:48:22 +0200104 ---help---
Boris Brezillon4ccae812016-06-15 21:09:23 +0200105 Enable support for NAND. This option enables the standard and
106 SPL drivers.
107 The SPL driver only supports reading from the NAND using DMA
108 transfers.
Hans de Goedee5268612015-08-16 14:48:22 +0200109
Maxime Ripardff93c282017-02-27 18:22:12 +0100110if NAND_SUNXI
111
112config NAND_SUNXI_SPL_ECC_STRENGTH
113 int "Allwinner NAND SPL ECC Strength"
114 default 64
115
116config NAND_SUNXI_SPL_ECC_SIZE
117 int "Allwinner NAND SPL ECC Step Size"
118 default 1024
119
120config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
121 int "Allwinner NAND SPL Usable Page Size"
122 default 1024
123
124endif
125
Siva Durga Prasad Paladugu78cb9652015-11-17 14:30:09 +0530126config NAND_ARASAN
127 bool "Configure Arasan Nand"
Ezequiel Garciad55c8152018-01-15 12:48:12 -0300128 select SYS_NAND_SELF_INIT
Tom Rini8f1a80e2017-07-28 21:31:42 -0400129 imply CMD_NAND
Siva Durga Prasad Paladugu78cb9652015-11-17 14:30:09 +0530130 help
131 This enables Nand driver support for Arasan nand flash
132 controller. This uses the hardware ECC for read and
133 write operations.
134
Adam Ford0a9ef452017-10-16 14:08:26 -0500135config NAND_MXC
136 bool "MXC NAND support"
137 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
138 imply CMD_NAND
139 help
140 This enables the NAND driver for the NAND flash controller on the
141 i.MX27 / i.MX31 / i.MX5 rocessors.
142
Jagan Tekidf10a852016-10-08 18:00:25 +0530143config NAND_MXS
144 bool "MXS NAND support"
Stefan Agnerc87c8112018-02-06 09:44:37 +0100145 depends on MX23 || MX28 || MX6 || MX7
Tom Rini8f1a80e2017-07-28 21:31:42 -0400146 imply CMD_NAND
Adam Ford99bec1a2018-02-06 08:34:45 -0600147 select APBH_DMA
148 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
149 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
Jagan Tekidf10a852016-10-08 18:00:25 +0530150 help
151 This enables NAND driver for the NAND flash controller on the
152 MXS processors.
153
Siva Durga Prasad Paladuguae798d22016-09-27 10:55:46 +0530154config NAND_ZYNQ
155 bool "Support for Zynq Nand controller"
156 select SYS_NAND_SELF_INIT
Tom Rini8f1a80e2017-07-28 21:31:42 -0400157 imply CMD_NAND
Siva Durga Prasad Paladuguae798d22016-09-27 10:55:46 +0530158 help
159 This enables Nand driver support for Nand flash controller
160 found on Zynq SoC.
161
Jeff Westfahl8000d6e2017-11-06 00:34:46 -0800162config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
163 bool "Enable use of 1st stage bootloader timing for NAND"
164 depends on NAND_ZYNQ
165 help
166 This flag prevent U-boot reconfigure NAND flash controller and reuse
167 the NAND timing from 1st stage bootloader.
168
Stefan Agner55191942015-05-08 19:07:11 +0200169comment "Generic NAND options"
170
Miquel Raynal748b5b32018-02-28 20:52:01 +0100171config SYS_NAND_BLOCK_SIZE
172 hex "NAND chip eraseblock size"
173 depends on ARCH_SUNXI
174 help
175 Number of data bytes in one eraseblock for the NAND chip on the
176 board. This is the multiple of NAND_PAGE_SIZE and the number of
177 pages.
178
179config SYS_NAND_PAGE_SIZE
180 hex "NAND chip page size"
181 depends on ARCH_SUNXI
182 help
183 Number of data bytes in one page for the NAND chip on the
184 board, not including the OOB area.
185
186config SYS_NAND_OOBSIZE
187 hex "NAND chip OOB size"
188 depends on ARCH_SUNXI
189 help
190 Number of bytes in the Out-Of-Band area for the NAND chip on
191 the board.
192
Stefan Agner55191942015-05-08 19:07:11 +0200193# Enhance depends when converting drivers to Kconfig which use this config
194# option (mxc_nand, ndfc, omap_gpmc).
195config SYS_NAND_BUSWIDTH_16BIT
196 bool "Use 16-bit NAND interface"
Adam Ford0a9ef452017-10-16 14:08:26 -0500197 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
Stefan Agner55191942015-05-08 19:07:11 +0200198 help
199 Indicates that NAND device has 16-bit wide data-bus. In absence of this
200 config, bus-width of NAND device is assumed to be either 8-bit and later
201 determined by reading ONFI params.
202 Above config is useful when NAND device's bus-width information cannot
203 be determined from on-chip ONFI params, like in following scenarios:
204 - SPL boot does not support reading of ONFI parameters. This is done to
205 keep SPL code foot-print small.
206 - In current U-Boot flow using nand_init(), driver initialization
207 happens in board_nand_init() which is called before any device probe
208 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
209 not available while configuring controller. So a static CONFIG_NAND_xx
210 is needed to know the device's bus-width in advance.
211
Boris Brezillon494e1082016-06-06 10:16:57 +0200212if SPL
213
214config SYS_NAND_U_BOOT_LOCATIONS
215 bool "Define U-boot binaries locations in NAND"
216 help
217 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
218 This option should not be enabled when compiling U-boot for boards
219 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
220 file.
221
Hans de Goeded90ba792015-08-21 21:49:51 +0200222config SYS_NAND_U_BOOT_OFFS
223 hex "Location in NAND to read U-Boot from"
Maxime Ripardadc706b2017-02-27 18:22:09 +0100224 default 0x800000 if NAND_SUNXI
Boris Brezillon494e1082016-06-06 10:16:57 +0200225 depends on SYS_NAND_U_BOOT_LOCATIONS
Hans de Goeded90ba792015-08-21 21:49:51 +0200226 help
227 Set the offset from the start of the nand where u-boot should be
228 loaded from.
229
Boris Brezillon80ef7002016-06-06 10:16:58 +0200230config SYS_NAND_U_BOOT_OFFS_REDUND
231 hex "Location in NAND to read U-Boot from"
232 default SYS_NAND_U_BOOT_OFFS
233 depends on SYS_NAND_U_BOOT_LOCATIONS
234 help
235 Set the offset from the start of the nand where the redundant u-boot
236 should be loaded from.
237
Adam Ford0a9ef452017-10-16 14:08:26 -0500238config SPL_NAND_AM33XX_BCH
239 bool "Enables SPL-NAND driver which supports ELM based"
240 depends on NAND_OMAP_GPMC && !OMAP34XX
241 default y
242 help
243 Hardware ECC correction. This is useful for platforms which have ELM
244 hardware engine and use NAND boot mode.
245 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
246 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
247 SPL-NAND driver with software ECC correction support.
248
Masahiro Yamada845034e2014-10-03 19:21:04 +0900249config SPL_NAND_DENALI
250 bool "Support Denali NAND controller for SPL"
251 help
252 This is a small implementation of the Denali NAND controller
253 for use on SPL.
254
Adam Ford0a9ef452017-10-16 14:08:26 -0500255config SPL_NAND_SIMPLE
256 bool "Use simple SPL NAND driver"
257 depends on !SPL_NAND_AM33XX_BCH
258 help
259 Support for NAND boot using simple NAND drivers that
260 expose the cmd_ctrl() interface.
Masahiro Yamada845034e2014-10-03 19:21:04 +0900261endif
262
Adam Ford5bbc2652017-08-07 17:37:18 -0400263endif # if NAND