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Masahiro Yamadad90a5a32015-08-27 12:44:29 +09001#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Marek BehĂșnde2069c2018-03-02 09:56:00 +010050 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
Simon Glass458a0702015-08-30 16:55:12 -060053 The driver is typically controlled by the device tree.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090054
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
Patrick Delaunayc20851b2019-08-02 14:48:00 +020062config PINCONF_RECURSIVE
63 bool "Support recursive binding for pin configuration nodes"
64 depends on PINCTRL_FULL
65 default n if ARCH_STM32MP
66 default y
67 help
68 In the Linux pinctrl binding, the pin configuration nodes need not be
69 direct children of the pin controller device (may be grandchildren for
70 example). It is define is each individual pin controller device.
71 Say Y here if you want to keep this behavior with the pinconfig
Yuan Fang423e3242021-09-08 19:06:48 +080072 u-class: all sub are recursively bounded.
Patrick Delaunayc20851b2019-08-02 14:48:00 +020073 If the option is disabled, this behavior is deactivated and only
74 the direct children of pin controller will be assumed as pin
75 configuration; you can save memory footprint when this feature is
76 no needed.
77
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090078config SPL_PINCTRL
Philipp Tomsich0fa0abe2017-07-26 12:27:42 +020079 bool "Support pin controllers in SPL"
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090080 depends on SPL && SPL_DM
81 help
82 This option is an SPL-variant of the PINCTRL option.
83 See the help of PINCTRL for details.
84
Simon Glass8aeafb52019-12-06 21:41:45 -070085config TPL_PINCTRL
86 bool "Support pin controllers in TPL"
87 depends on TPL && TPL_DM
88 help
89 This option is an TPL variant of the PINCTRL option.
90 See the help of PINCTRL for details.
91
Simon Glass747093d2022-04-30 00:56:53 -060092config VPL_PINCTRL
93 bool "Support pin controllers in VPL"
94 depends on VPL && VPL_DM
95 help
96 This option is an VPL variant of the PINCTRL option.
97 See the help of PINCTRL for details.
98
Masahiro Yamadad90a5a32015-08-27 12:44:29 +090099config SPL_PINCTRL_FULL
100 bool "Support full pin controllers in SPL"
101 depends on SPL_PINCTRL && SPL_OF_CONTROL
Vikas Manochab9747692017-05-28 12:55:10 -0700102 default n if TARGET_STM32F746_DISCO
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900103 default y
104 help
Simon Glass747093d2022-04-30 00:56:53 -0600105 This option is an SPL variant of the PINCTRL_FULL option.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900106 See the help of PINCTRL_FULL for details.
107
Simon Glass8aeafb52019-12-06 21:41:45 -0700108config TPL_PINCTRL_FULL
109 bool "Support full pin controllers in TPL"
110 depends on TPL_PINCTRL && TPL_OF_CONTROL
111 help
Simon Glass747093d2022-04-30 00:56:53 -0600112 This option is a TPL variant of the PINCTRL_FULL option.
113 See the help of PINCTRL_FULL for details.
114
115config VPL_PINCTRL_FULL
116 bool "Support full pin controllers in VPL"
117 depends on VPL_PINCTRL && VPL_OF_CONTROL
118 help
119 This option is a VPL variant of the PINCTRL_FULL option.
Simon Glass8aeafb52019-12-06 21:41:45 -0700120 See the help of PINCTRL_FULL for details.
121
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900122config SPL_PINCTRL_GENERIC
123 bool "Support generic pin controllers in SPL"
124 depends on SPL_PINCTRL_FULL
125 default y
126 help
127 This option is an SPL-variant of the PINCTRL_GENERIC option.
128 See the help of PINCTRL_GENERIC for details.
129
130config SPL_PINMUX
131 bool "Support pin multiplexing controllers in SPL"
132 depends on SPL_PINCTRL_GENERIC
133 default y
134 help
135 This option is an SPL-variant of the PINMUX option.
136 See the help of PINMUX for details.
Simon Glass458a0702015-08-30 16:55:12 -0600137 The pinctrl subsystem can add a substantial overhead to the SPL
138 image since it typically requires quite a few tables either in the
139 driver or in the device tree. If this is acceptable and you need
140 to adjust pin multiplexing in SPL in order to boot into U-Boot,
141 enable this option. You will need to enable device tree in SPL
142 for this to work.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900143
144config SPL_PINCONF
145 bool "Support pin configuration controllers in SPL"
146 depends on SPL_PINCTRL_GENERIC
147 help
148 This option is an SPL-variant of the PINCONF option.
149 See the help of PINCONF for details.
150
Patrick Delaunayc20851b2019-08-02 14:48:00 +0200151config SPL_PINCONF_RECURSIVE
152 bool "Support recursive binding for pin configuration nodes in SPL"
153 depends on SPL_PINCTRL_FULL
154 default n if ARCH_STM32MP
155 default y
156 help
157 This option is an SPL-variant of the PINCONF_RECURSIVE option.
158 See the help of PINCONF_RECURSIVE for details.
159
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900160if PINCTRL || SPL_PINCTRL
161
Mark Kettenisb814e002021-11-02 18:21:57 +0100162config PINCTRL_APPLE
163 bool "Apple pinctrl driver"
164 depends on DM && PINCTRL_GENERIC && ARCH_APPLE
165 default y
166 help
167 Support pin multiplexing on Apple SoCs.
168
169 The driver is controlled by a device tree node which contains
170 both the GPIO definitions and pin control functions for each
171 available multiplex function.
172
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200173config PINCTRL_AR933X
Wills Wanga79d0642016-03-16 16:59:55 +0800174 bool "QCA/Athores ar933x pin control driver"
175 depends on DM && SOC_AR933X
176 help
177 Support pin multiplexing control on QCA/Athores ar933x SoCs.
178 The driver is controlled by a device tree node which contains
179 both the GPIO definitions and pin control functions for each
180 available multiplex function.
181
Wenyou Yang9319a752017-03-23 12:44:37 +0800182config PINCTRL_AT91
183 bool "AT91 pinctrl driver"
184 depends on DM
185 help
186 This option is to enable the AT91 pinctrl driver for AT91 PIO
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200187 controller.
188
189 AT91 PIO controller is a combined gpio-controller, pin-mux and
190 pin-config module. Each I/O pin may be dedicated as a general-purpose
191 I/O or be assigned to a function of an embedded peripheral. Each I/O
192 pin has a glitch filter providing rejection of glitches lower than
193 one-half of peripheral clock cycle and a debouncing filter providing
194 rejection of unwanted pulses from key or push button operations. You
195 can also control the multi-driver capability, pull-up and pull-down
196 feature on each I/O pin.
Wenyou Yang9319a752017-03-23 12:44:37 +0800197
Wenyou Yangac72e172016-07-20 17:16:27 +0800198config PINCTRL_AT91PIO4
199 bool "AT91 PIO4 pinctrl driver"
200 depends on DM
201 help
202 This option is to enable the AT91 pinctrl driver for AT91 PIO4
203 controller which is available on SAMA5D2 SoC.
204
Simon Glass74749f12019-12-06 21:42:53 -0700205config PINCTRL_INTEL
206 bool "Standard Intel pin-control and pin-mux driver"
207 help
208 Recent Intel chips such as Apollo Lake (APL) use a common pin control
209 and GPIO scheme. The settings for this come from an SoC-specific
210 driver which must be separately enabled. The driver supports setting
211 pins on start-up and changing the GPIO attributes.
212
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200213config PINCTRL_PIC32
214 bool "Microchip PIC32 pin-control and pin-mux driver"
215 depends on DM && MACH_PIC32
216 default y
217 help
218 Supports individual pin selection and configuration for each
219 remappable peripheral available on Microchip PIC32
220 SoCs. This driver is controlled by a device tree node which
Chris Packhamcb4d1bb2019-01-13 22:13:26 +1300221 contains both GPIO definition and pin control functions.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200222
223config PINCTRL_QCA953X
224 bool "QCA/Athores qca953x pin control driver"
225 depends on DM && SOC_QCA953X
226 help
227 Support pin multiplexing control on QCA/Athores qca953x SoCs.
228
229 The driver is controlled by a device tree node which contains both
230 the GPIO definitions and pin control functions for each available
231 multiplex function.
232
Heiko Schocher5990b052020-02-03 10:23:53 +0100233config PINCTRL_QE
234 bool "QE based pinctrl driver, like on mpc83xx"
235 depends on DM
236 help
237 This option is to enable the QE pinctrl driver for QE based io
238 controller.
239
Andy Yan09aa7c42017-06-01 18:00:10 +0800240config PINCTRL_ROCKCHIP_RV1108
241 bool "Rockchip rv1108 pin control driver"
242 depends on DM
243 help
244 Support pin multiplexing control on Rockchip rv1108 SoC.
245
246 The driver is controlled by a device tree node which contains
247 both the GPIO definitions and pin control functions for each
248 available multiplex function.
249
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900250config PINCTRL_SANDBOX
251 bool "Sandbox pinctrl driver"
252 depends on SANDBOX
253 help
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200254 This enables pinctrl driver for sandbox.
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900255
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200256 Currently, this driver actually does nothing but print debug
257 messages when pinctrl operations are invoked.
Vikas Manocha94d53082017-02-12 10:25:49 -0800258
Felix Brack44d5c372017-03-22 11:26:44 +0100259config PINCTRL_SINGLE
260 bool "Single register pin-control and pin-multiplex driver"
261 depends on DM
262 help
263 This enables pinctrl driver for systems using a single register for
264 pin configuration and multiplexing. TI's AM335X SoCs are examples of
265 such systems.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200266
Felix Brack44d5c372017-03-22 11:26:44 +0100267 Depending on the platform make sure to also enable OF_TRANSLATE and
268 eventually SPL_OF_TRANSLATE to get correct address translations.
269
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200270config PINCTRL_STI
271 bool "STMicroelectronics STi pin-control and pin-mux driver"
272 depends on DM && ARCH_STI
273 default y
274 help
Patrick Delaunayeae488b2022-05-20 18:38:10 +0200275 Support pin multiplexing control on STMicroelectronics STi SoCs.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200276
277 The driver is controlled by a device tree node which contains both
278 the GPIO definitions and pin control functions for each available
279 multiplex function.
280
281config PINCTRL_STM32
282 bool "ST STM32 pin control driver"
283 depends on DM
284 help
285 Supports pin multiplexing control on stm32 SoCs.
286
287 The driver is controlled by a device tree node which contains both
288 the GPIO definitions and pin control functions for each available
289 multiplex function.
290
Patrick Delaunay82624352019-03-11 11:13:15 +0100291config PINCTRL_STMFX
292 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
293 depends on DM && PINCTRL_FULL
294 help
295 I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
296 GPIO expander.
297 Supports pin multiplexing control on stm32 SoCs.
298
299 The driver is controlled by a device tree node which contains both
300 the GPIO definitions and pin control functions for each available
301 multiplex function.
302
303config SPL_PINCTRL_STMFX
304 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
305 depends on SPL_PINCTRL_FULL
306 help
307 This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
308 See the help of PINCTRL_STMFX for details.
309
maxims@google.com4f0e44e2017-04-17 12:00:27 -0700310config ASPEED_AST2500_PINCTRL
Michal Simek171fd222020-07-23 09:00:40 +0200311 bool "Aspeed AST2500 pin control driver"
312 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
313 default y
314 help
315 Support pin multiplexing control on Aspeed ast2500 SoC. The driver
316 uses Generic Pinctrl framework and is compatible with the Linux
317 driver, i.e. it uses the same device tree configuration.
maxims@google.com4f0e44e2017-04-17 12:00:27 -0700318
Ryan Chen46220bf2021-11-02 10:17:52 +0800319config ASPEED_AST2600_PINCTRL
320 bool "Aspeed AST2600 pin control driver"
321 depends on DM && PINCTRL_GENERIC && ASPEED_AST2600
322 default y
323 help
324 Support pin multiplexing control on Aspeed ast2600 SoC. The driver
325 uses Generic Pinctrl framework and is compatible with the Linux
326 driver, i.e. it uses the same device tree configuration.
327
Sean Anderson7224d5c2020-09-14 11:01:58 -0400328config PINCTRL_K210
329 bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
330 depends on DM && PINCTRL_GENERIC
331 help
332 Support pin multiplexing on the K210. The "FPIOA" can remap any
333 supported function to any multifunctional IO pin. It can also perform
334 basic GPIO functions, such as reading the current value of a pin.
Ashok Reddy Somadbd673f2022-02-23 15:23:05 +0100335
336config PINCTRL_ZYNQMP
337 bool "Xilinx ZynqMP pin control driver"
338 depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP
339 default y
340 help
341 Support pin multiplexing control on Xilinx ZynqMP. The driver uses
342 Generic Pinctrl framework and is compatible with the Linux driver,
343 i.e. it uses the same device tree configuration.
344
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900345endif
346
Philipp Tomsichefc46772019-02-01 15:11:48 +0100347source "drivers/pinctrl/broadcom/Kconfig"
348source "drivers/pinctrl/exynos/Kconfig"
Simon Glass74749f12019-12-06 21:42:53 -0700349source "drivers/pinctrl/intel/Kconfig"
Ryder Lee01aa9d12018-11-15 10:07:58 +0800350source "drivers/pinctrl/mediatek/Kconfig"
Philipp Tomsichefc46772019-02-01 15:11:48 +0100351source "drivers/pinctrl/meson/Kconfig"
352source "drivers/pinctrl/mscc/Kconfig"
Weijie Gao3fad4412019-09-25 17:45:26 +0800353source "drivers/pinctrl/mtmips/Kconfig"
Philipp Tomsichefc46772019-02-01 15:11:48 +0100354source "drivers/pinctrl/mvebu/Kconfig"
Stefan Bosch8d393b22020-07-10 19:07:30 +0200355source "drivers/pinctrl/nexell/Kconfig"
Jim Liuf49d6162022-05-17 16:30:32 +0800356source "drivers/pinctrl/nuvoton/Kconfig"
Peng Fan745df682016-02-03 10:06:07 +0800357source "drivers/pinctrl/nxp/Kconfig"
Marek Vasut910df4d2017-09-15 21:13:55 +0200358source "drivers/pinctrl/renesas/Kconfig"
Philipp Tomsich5a127322019-02-01 15:15:38 +0100359source "drivers/pinctrl/rockchip/Kconfig"
Samuel Hollandb799eab2021-08-12 20:09:43 -0500360source "drivers/pinctrl/sunxi/Kconfig"
Masahiro Yamada5dc626f2015-09-11 20:17:32 +0900361source "drivers/pinctrl/uniphier/Kconfig"
362
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900363endmenu